system.cc revision 8922
12689Sktlim@umich.edu/* 28703Sandreas.hansson@arm.com * Copyright (c) 2011-2012 ARM Limited 38666SPrakash.Ramrakhyani@arm.com * All rights reserved 48666SPrakash.Ramrakhyani@arm.com * 58666SPrakash.Ramrakhyani@arm.com * The license below extends only to copyright in the software and shall 68666SPrakash.Ramrakhyani@arm.com * not be construed as granting a license to any other intellectual 78666SPrakash.Ramrakhyani@arm.com * property including but not limited to intellectual property relating 88666SPrakash.Ramrakhyani@arm.com * to a hardware implementation of the functionality of the software 98666SPrakash.Ramrakhyani@arm.com * licensed hereunder. You may use the software subject to the license 108666SPrakash.Ramrakhyani@arm.com * terms below provided that you ensure that this notice is replicated 118666SPrakash.Ramrakhyani@arm.com * unmodified and in its entirety in all distributions of the software, 128666SPrakash.Ramrakhyani@arm.com * modified or unmodified, in source code or in binary form. 138666SPrakash.Ramrakhyani@arm.com * 142689Sktlim@umich.edu * Copyright (c) 2003-2006 The Regents of The University of Michigan 157897Shestness@cs.utexas.edu * Copyright (c) 2011 Regents of the University of California 162689Sktlim@umich.edu * All rights reserved. 172689Sktlim@umich.edu * 182689Sktlim@umich.edu * Redistribution and use in source and binary forms, with or without 192689Sktlim@umich.edu * modification, are permitted provided that the following conditions are 202689Sktlim@umich.edu * met: redistributions of source code must retain the above copyright 212689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer; 222689Sktlim@umich.edu * redistributions in binary form must reproduce the above copyright 232689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer in the 242689Sktlim@umich.edu * documentation and/or other materials provided with the distribution; 252689Sktlim@umich.edu * neither the name of the copyright holders nor the names of its 262689Sktlim@umich.edu * contributors may be used to endorse or promote products derived from 272689Sktlim@umich.edu * this software without specific prior written permission. 282689Sktlim@umich.edu * 292689Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302689Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312689Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322689Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332689Sktlim@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 342689Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 352689Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 362689Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372689Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382689Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 392689Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 402689Sktlim@umich.edu * 412689Sktlim@umich.edu * Authors: Steve Reinhardt 422689Sktlim@umich.edu * Lisa Hsu 432689Sktlim@umich.edu * Nathan Binkert 442689Sktlim@umich.edu * Ali Saidi 457897Shestness@cs.utexas.edu * Rick Strong 462689Sktlim@umich.edu */ 472689Sktlim@umich.edu 482521SN/A#include "arch/isa_traits.hh" 493960Sgblack@eecs.umich.edu#include "arch/remote_gdb.hh" 504194Ssaidi@eecs.umich.edu#include "arch/utility.hh" 518769Sgblack@eecs.umich.edu#include "arch/vtophys.hh" 521070SN/A#include "base/loader/object_file.hh" 531070SN/A#include "base/loader/symtab.hh" 542521SN/A#include "base/trace.hh" 556658Snate@binkert.org#include "config/the_isa.hh" 568229Snate@binkert.org#include "cpu/thread_context.hh" 578232Snate@binkert.org#include "debug/Loader.hh" 588666SPrakash.Ramrakhyani@arm.com#include "debug/WorkItems.hh" 598769Sgblack@eecs.umich.edu#include "kern/kernel_stats.hh" 602522SN/A#include "mem/physical.hh" 618769Sgblack@eecs.umich.edu#include "params/System.hh" 622037SN/A#include "sim/byteswap.hh" 638229Snate@binkert.org#include "sim/debug.hh" 648769Sgblack@eecs.umich.edu#include "sim/full_system.hh" 6556SN/A#include "sim/system.hh" 666658Snate@binkert.org 672SN/Ausing namespace std; 682107SN/Ausing namespace TheISA; 692SN/A 702SN/Avector<System *> System::systemList; 712SN/A 722SN/Aint System::numSystemsRunning = 0; 732SN/A 741070SN/ASystem::System(Params *p) 758703Sandreas.hansson@arm.com : MemObject(p), _systemPort("system_port", this), 768703Sandreas.hansson@arm.com physmem(p->physmem), 778703Sandreas.hansson@arm.com _numContexts(0), 788826Snilay@cs.wisc.edu pagePtr(0), 792521SN/A init_param(p->init_param), 808852Sandreas.hansson@arm.com physProxy(_systemPort), 818852Sandreas.hansson@arm.com virtProxy(_systemPort), 827580SAli.Saidi@arm.com loadAddrMask(p->load_addr_mask), 837770SAli.Saidi@ARM.com nextPID(0), 847914SBrad.Beckmann@amd.com memoryMode(p->mem_mode), 857914SBrad.Beckmann@amd.com workItemsBegin(0), 867914SBrad.Beckmann@amd.com workItemsEnd(0), 878666SPrakash.Ramrakhyani@arm.com numWorkIds(p->num_work_ids), 887914SBrad.Beckmann@amd.com _params(p), 898666SPrakash.Ramrakhyani@arm.com totalNumInsts(0), 907897Shestness@cs.utexas.edu instEventQueue("system instruction-based event queue") 912SN/A{ 921070SN/A // add self to global system list 931070SN/A systemList.push_back(this); 941070SN/A 958460SAli.Saidi@ARM.com /** Keep track of all memories we can execute code out of 968460SAli.Saidi@ARM.com * in our system 978460SAli.Saidi@ARM.com */ 988460SAli.Saidi@ARM.com for (int x = 0; x < p->memories.size(); x++) { 998460SAli.Saidi@ARM.com if (!p->memories[x]) 1008460SAli.Saidi@ARM.com continue; 1018460SAli.Saidi@ARM.com memRanges.push_back(RangeSize(p->memories[x]->start(), 1028460SAli.Saidi@ARM.com p->memories[x]->size())); 1038460SAli.Saidi@ARM.com } 1048460SAli.Saidi@ARM.com 1058769Sgblack@eecs.umich.edu if (FullSystem) { 1068769Sgblack@eecs.umich.edu kernelSymtab = new SymbolTable; 1078769Sgblack@eecs.umich.edu if (!debugSymbolTable) 1088769Sgblack@eecs.umich.edu debugSymbolTable = new SymbolTable; 1098666SPrakash.Ramrakhyani@arm.com } 1108832SAli.Saidi@ARM.com 1118832SAli.Saidi@ARM.com // Get the generic system master IDs 1128832SAli.Saidi@ARM.com MasterID tmp_id M5_VAR_USED; 1138832SAli.Saidi@ARM.com tmp_id = getMasterId("writebacks"); 1148832SAli.Saidi@ARM.com assert(tmp_id == Request::wbMasterId); 1158832SAli.Saidi@ARM.com tmp_id = getMasterId("functional"); 1168832SAli.Saidi@ARM.com assert(tmp_id == Request::funcMasterId); 1178832SAli.Saidi@ARM.com tmp_id = getMasterId("interrupt"); 1188832SAli.Saidi@ARM.com assert(tmp_id == Request::intMasterId); 1198832SAli.Saidi@ARM.com 1208885SAli.Saidi@ARM.com if (FullSystem) { 1218885SAli.Saidi@ARM.com if (params()->kernel == "") { 1228885SAli.Saidi@ARM.com inform("No kernel set for full system simulation. " 1238885SAli.Saidi@ARM.com "Assuming you know what you're doing if not SPARC ISA\n"); 1248885SAli.Saidi@ARM.com } else { 1258885SAli.Saidi@ARM.com // Get the kernel code 1268885SAli.Saidi@ARM.com kernel = createObjectFile(params()->kernel); 1278885SAli.Saidi@ARM.com inform("kernel located at: %s", params()->kernel); 1288885SAli.Saidi@ARM.com 1298885SAli.Saidi@ARM.com if (kernel == NULL) 1308885SAli.Saidi@ARM.com fatal("Could not load kernel file %s", params()->kernel); 1318885SAli.Saidi@ARM.com 1328885SAli.Saidi@ARM.com // setup entry points 1338885SAli.Saidi@ARM.com kernelStart = kernel->textBase(); 1348885SAli.Saidi@ARM.com kernelEnd = kernel->bssBase() + kernel->bssSize(); 1358885SAli.Saidi@ARM.com kernelEntry = kernel->entryPoint(); 1368885SAli.Saidi@ARM.com 1378885SAli.Saidi@ARM.com // load symbols 1388885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(kernelSymtab)) 1398885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1408885SAli.Saidi@ARM.com 1418885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(kernelSymtab)) 1428885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1438885SAli.Saidi@ARM.com 1448885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(debugSymbolTable)) 1458885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1468885SAli.Saidi@ARM.com 1478885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(debugSymbolTable)) 1488885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1498885SAli.Saidi@ARM.com 1508885SAli.Saidi@ARM.com // Loading only needs to happen once and after memory system is 1518885SAli.Saidi@ARM.com // connected so it will happen in initState() 1528885SAli.Saidi@ARM.com } 1538885SAli.Saidi@ARM.com } 1548885SAli.Saidi@ARM.com 1558885SAli.Saidi@ARM.com // increment the number of running systms 1568885SAli.Saidi@ARM.com numSystemsRunning++; 1578885SAli.Saidi@ARM.com 1582SN/A} 1592SN/A 1602SN/ASystem::~System() 1612SN/A{ 1621070SN/A delete kernelSymtab; 1631070SN/A delete kernel; 1648666SPrakash.Ramrakhyani@arm.com 1658666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds; j++) 1668666SPrakash.Ramrakhyani@arm.com delete workItemStats[j]; 1672SN/A} 1682SN/A 1698706Sandreas.hansson@arm.comvoid 1708706Sandreas.hansson@arm.comSystem::init() 1718706Sandreas.hansson@arm.com{ 1728706Sandreas.hansson@arm.com // check that the system port is connected 1738706Sandreas.hansson@arm.com if (!_systemPort.isConnected()) 1748706Sandreas.hansson@arm.com panic("System port on %s is not connected.\n", name()); 1758706Sandreas.hansson@arm.com} 1768706Sandreas.hansson@arm.com 1778922Swilliam.wang@arm.comMasterPort& 1788922Swilliam.wang@arm.comSystem::getMasterPort(const std::string &if_name, int idx) 1798703Sandreas.hansson@arm.com{ 1808703Sandreas.hansson@arm.com // no need to distinguish at the moment (besides checking) 1818922Swilliam.wang@arm.com return _systemPort; 1828703Sandreas.hansson@arm.com} 1838703Sandreas.hansson@arm.com 1842901Ssaidi@eecs.umich.eduvoid 1854762Snate@binkert.orgSystem::setMemoryMode(Enums::MemoryMode mode) 1862901Ssaidi@eecs.umich.edu{ 1872901Ssaidi@eecs.umich.edu assert(getState() == Drained); 1882901Ssaidi@eecs.umich.edu memoryMode = mode; 1892901Ssaidi@eecs.umich.edu} 1902901Ssaidi@eecs.umich.edu 1913960Sgblack@eecs.umich.edubool System::breakpoint() 1923960Sgblack@eecs.umich.edu{ 1934095Sbinkertn@umich.edu if (remoteGDB.size()) 1944095Sbinkertn@umich.edu return remoteGDB[0]->breakpoint(); 1954095Sbinkertn@umich.edu return false; 1963960Sgblack@eecs.umich.edu} 1973960Sgblack@eecs.umich.edu 1987445Ssteve.reinhardt@amd.com/** 1997445Ssteve.reinhardt@amd.com * Setting rgdb_wait to a positive integer waits for a remote debugger to 2007445Ssteve.reinhardt@amd.com * connect to that context ID before continuing. This should really 2017445Ssteve.reinhardt@amd.com be a parameter on the CPU object or something... 2027445Ssteve.reinhardt@amd.com */ 2037445Ssteve.reinhardt@amd.comint rgdb_wait = -1; 2047445Ssteve.reinhardt@amd.com 205180SN/Aint 2065718Shsul@eecs.umich.eduSystem::registerThreadContext(ThreadContext *tc, int assigned) 2072SN/A{ 2085712Shsul@eecs.umich.edu int id; 2095718Shsul@eecs.umich.edu if (assigned == -1) { 2105718Shsul@eecs.umich.edu for (id = 0; id < threadContexts.size(); id++) { 2115718Shsul@eecs.umich.edu if (!threadContexts[id]) 2125718Shsul@eecs.umich.edu break; 2135718Shsul@eecs.umich.edu } 2145718Shsul@eecs.umich.edu 2155718Shsul@eecs.umich.edu if (threadContexts.size() <= id) 2165718Shsul@eecs.umich.edu threadContexts.resize(id + 1); 2175718Shsul@eecs.umich.edu } else { 2185718Shsul@eecs.umich.edu if (threadContexts.size() <= assigned) 2195718Shsul@eecs.umich.edu threadContexts.resize(assigned + 1); 2205718Shsul@eecs.umich.edu id = assigned; 2211806SN/A } 2221806SN/A 2232680Sktlim@umich.edu if (threadContexts[id]) 2245823Ssaidi@eecs.umich.edu fatal("Cannot have two CPUs with the same id (%d)\n", id); 2251806SN/A 2262680Sktlim@umich.edu threadContexts[id] = tc; 2275714Shsul@eecs.umich.edu _numContexts++; 2281070SN/A 2295512SMichael.Adler@intel.com int port = getRemoteGDBPort(); 2307445Ssteve.reinhardt@amd.com if (port) { 2314095Sbinkertn@umich.edu RemoteGDB *rgdb = new RemoteGDB(this, tc); 2325512SMichael.Adler@intel.com GDBListener *gdbl = new GDBListener(rgdb, port + id); 2334095Sbinkertn@umich.edu gdbl->listen(); 2347445Ssteve.reinhardt@amd.com 2354095Sbinkertn@umich.edu if (rgdb_wait != -1 && rgdb_wait == id) 2364095Sbinkertn@umich.edu gdbl->accept(); 2371070SN/A 2384095Sbinkertn@umich.edu if (remoteGDB.size() <= id) { 2394095Sbinkertn@umich.edu remoteGDB.resize(id + 1); 2404095Sbinkertn@umich.edu } 2414095Sbinkertn@umich.edu 2424095Sbinkertn@umich.edu remoteGDB[id] = rgdb; 2431070SN/A } 2441070SN/A 2457914SBrad.Beckmann@amd.com activeCpus.push_back(false); 2467914SBrad.Beckmann@amd.com 2471806SN/A return id; 248180SN/A} 24975SN/A 2506029Ssteve.reinhardt@amd.comint 2516029Ssteve.reinhardt@amd.comSystem::numRunningContexts() 2526029Ssteve.reinhardt@amd.com{ 2536029Ssteve.reinhardt@amd.com int running = 0; 2546029Ssteve.reinhardt@amd.com for (int i = 0; i < _numContexts; ++i) { 2556029Ssteve.reinhardt@amd.com if (threadContexts[i]->status() != ThreadContext::Halted) 2566029Ssteve.reinhardt@amd.com ++running; 2576029Ssteve.reinhardt@amd.com } 2586029Ssteve.reinhardt@amd.com return running; 2596029Ssteve.reinhardt@amd.com} 2606029Ssteve.reinhardt@amd.com 261180SN/Avoid 2627733SAli.Saidi@ARM.comSystem::initState() 2631129SN/A{ 2648806Sgblack@eecs.umich.edu int i; 2658769Sgblack@eecs.umich.edu if (FullSystem) { 2668769Sgblack@eecs.umich.edu for (i = 0; i < threadContexts.size(); i++) 2678769Sgblack@eecs.umich.edu TheISA::startupCPU(threadContexts[i], i); 2688799Sgblack@eecs.umich.edu // Moved from the constructor to here since it relies on the 2698799Sgblack@eecs.umich.edu // address map being resolved in the interconnect 2708799Sgblack@eecs.umich.edu /** 2718799Sgblack@eecs.umich.edu * Load the kernel code into memory 2728799Sgblack@eecs.umich.edu */ 2738885SAli.Saidi@ARM.com if (params()->kernel != "") { 2748799Sgblack@eecs.umich.edu // Load program sections into memory 2758799Sgblack@eecs.umich.edu kernel->loadSections(physProxy, loadAddrMask); 2768706Sandreas.hansson@arm.com 2778799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel start = %#x\n", kernelStart); 2788799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd); 2798799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry); 2808799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel loaded...\n"); 2818799Sgblack@eecs.umich.edu } 2828706Sandreas.hansson@arm.com } 2838706Sandreas.hansson@arm.com 2848706Sandreas.hansson@arm.com activeCpus.clear(); 2858706Sandreas.hansson@arm.com 2868806Sgblack@eecs.umich.edu if (!FullSystem) 2878806Sgblack@eecs.umich.edu return; 2888806Sgblack@eecs.umich.edu 2898806Sgblack@eecs.umich.edu for (i = 0; i < threadContexts.size(); i++) 2908806Sgblack@eecs.umich.edu TheISA::startupCPU(threadContexts[i], i); 2911129SN/A} 2921129SN/A 2931129SN/Avoid 2945713Shsul@eecs.umich.eduSystem::replaceThreadContext(ThreadContext *tc, int context_id) 295180SN/A{ 2965713Shsul@eecs.umich.edu if (context_id >= threadContexts.size()) { 2972680Sktlim@umich.edu panic("replaceThreadContext: bad id, %d >= %d\n", 2985713Shsul@eecs.umich.edu context_id, threadContexts.size()); 299180SN/A } 300180SN/A 3015713Shsul@eecs.umich.edu threadContexts[context_id] = tc; 3025713Shsul@eecs.umich.edu if (context_id < remoteGDB.size()) 3035713Shsul@eecs.umich.edu remoteGDB[context_id]->replaceThreadContext(tc); 3042SN/A} 3052SN/A 3062378SN/AAddr 3078601Ssteve.reinhardt@amd.comSystem::allocPhysPages(int npages) 3082378SN/A{ 3097770SAli.Saidi@ARM.com Addr return_addr = pagePtr << LogVMPageSize; 3108601Ssteve.reinhardt@amd.com pagePtr += npages; 3118813Sgblack@eecs.umich.edu if (pagePtr > physmem->size()) 3123162Ssaidi@eecs.umich.edu fatal("Out of memory, please increase size of physical memory."); 3132378SN/A return return_addr; 3142378SN/A} 3155795Ssaidi@eecs.umich.edu 3165795Ssaidi@eecs.umich.eduAddr 3175795Ssaidi@eecs.umich.eduSystem::memSize() 3185795Ssaidi@eecs.umich.edu{ 3195795Ssaidi@eecs.umich.edu return physmem->size(); 3205795Ssaidi@eecs.umich.edu} 3215795Ssaidi@eecs.umich.edu 3225795Ssaidi@eecs.umich.eduAddr 3235795Ssaidi@eecs.umich.eduSystem::freeMemSize() 3245795Ssaidi@eecs.umich.edu{ 3257770SAli.Saidi@ARM.com return physmem->size() - (pagePtr << LogVMPageSize); 3265795Ssaidi@eecs.umich.edu} 3275795Ssaidi@eecs.umich.edu 3288460SAli.Saidi@ARM.combool 3298460SAli.Saidi@ARM.comSystem::isMemory(const Addr addr) const 3308460SAli.Saidi@ARM.com{ 3318460SAli.Saidi@ARM.com std::list<Range<Addr> >::const_iterator i; 3328460SAli.Saidi@ARM.com for (i = memRanges.begin(); i != memRanges.end(); i++) { 3338460SAli.Saidi@ARM.com if (*i == addr) 3348460SAli.Saidi@ARM.com return true; 3358460SAli.Saidi@ARM.com } 3368460SAli.Saidi@ARM.com return false; 3378460SAli.Saidi@ARM.com} 3388460SAli.Saidi@ARM.com 3391070SN/Avoid 3407897Shestness@cs.utexas.eduSystem::resume() 3417897Shestness@cs.utexas.edu{ 3427897Shestness@cs.utexas.edu SimObject::resume(); 3437897Shestness@cs.utexas.edu totalNumInsts = 0; 3447897Shestness@cs.utexas.edu} 3457897Shestness@cs.utexas.edu 3467897Shestness@cs.utexas.eduvoid 3471070SN/ASystem::serialize(ostream &os) 3481070SN/A{ 3498769Sgblack@eecs.umich.edu if (FullSystem) 3508769Sgblack@eecs.umich.edu kernelSymtab->serialize("kernel_symtab", os); 3517770SAli.Saidi@ARM.com SERIALIZE_SCALAR(pagePtr); 3527770SAli.Saidi@ARM.com SERIALIZE_SCALAR(nextPID); 3531070SN/A} 3541070SN/A 3551070SN/A 3561070SN/Avoid 3571070SN/ASystem::unserialize(Checkpoint *cp, const string §ion) 3581070SN/A{ 3598769Sgblack@eecs.umich.edu if (FullSystem) 3608769Sgblack@eecs.umich.edu kernelSymtab->unserialize("kernel_symtab", cp, section); 3617770SAli.Saidi@ARM.com UNSERIALIZE_SCALAR(pagePtr); 3627770SAli.Saidi@ARM.com UNSERIALIZE_SCALAR(nextPID); 3631070SN/A} 3642SN/A 3652SN/Avoid 3668666SPrakash.Ramrakhyani@arm.comSystem::regStats() 3678666SPrakash.Ramrakhyani@arm.com{ 3688666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds ; j++) { 3698666SPrakash.Ramrakhyani@arm.com workItemStats[j] = new Stats::Histogram(); 3708666SPrakash.Ramrakhyani@arm.com stringstream namestr; 3718666SPrakash.Ramrakhyani@arm.com ccprintf(namestr, "work_item_type%d", j); 3728666SPrakash.Ramrakhyani@arm.com workItemStats[j]->init(20) 3738666SPrakash.Ramrakhyani@arm.com .name(name() + "." + namestr.str()) 3748666SPrakash.Ramrakhyani@arm.com .desc("Run time stat for" + namestr.str()) 3758666SPrakash.Ramrakhyani@arm.com .prereq(*workItemStats[j]); 3768666SPrakash.Ramrakhyani@arm.com } 3778666SPrakash.Ramrakhyani@arm.com} 3788666SPrakash.Ramrakhyani@arm.com 3798666SPrakash.Ramrakhyani@arm.comvoid 3808666SPrakash.Ramrakhyani@arm.comSystem::workItemEnd(uint32_t tid, uint32_t workid) 3818666SPrakash.Ramrakhyani@arm.com{ 3828666SPrakash.Ramrakhyani@arm.com std::pair<uint32_t,uint32_t> p(tid, workid); 3838666SPrakash.Ramrakhyani@arm.com if (!lastWorkItemStarted.count(p)) 3848666SPrakash.Ramrakhyani@arm.com return; 3858666SPrakash.Ramrakhyani@arm.com 3868666SPrakash.Ramrakhyani@arm.com Tick samp = curTick() - lastWorkItemStarted[p]; 3878666SPrakash.Ramrakhyani@arm.com DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); 3888666SPrakash.Ramrakhyani@arm.com 3898666SPrakash.Ramrakhyani@arm.com if (workid >= numWorkIds) 3908666SPrakash.Ramrakhyani@arm.com fatal("Got workid greater than specified in system configuration\n"); 3918666SPrakash.Ramrakhyani@arm.com 3928666SPrakash.Ramrakhyani@arm.com workItemStats[workid]->sample(samp); 3938666SPrakash.Ramrakhyani@arm.com lastWorkItemStarted.erase(p); 3948666SPrakash.Ramrakhyani@arm.com} 3958666SPrakash.Ramrakhyani@arm.com 3968666SPrakash.Ramrakhyani@arm.comvoid 3972SN/ASystem::printSystems() 3982SN/A{ 3992SN/A vector<System *>::iterator i = systemList.begin(); 4002SN/A vector<System *>::iterator end = systemList.end(); 4012SN/A for (; i != end; ++i) { 4022SN/A System *sys = *i; 4032SN/A cerr << "System " << sys->name() << ": " << hex << sys << endl; 4042SN/A } 4052SN/A} 4062SN/A 4072SN/Avoid 4082SN/AprintSystems() 4092SN/A{ 4102SN/A System::printSystems(); 4112SN/A} 4122SN/A 4138832SAli.Saidi@ARM.comMasterID 4148832SAli.Saidi@ARM.comSystem::getMasterId(std::string master_name) 4158832SAli.Saidi@ARM.com{ 4168832SAli.Saidi@ARM.com // strip off system name if the string starts with it 4178832SAli.Saidi@ARM.com if (master_name.size() > name().size() && 4188832SAli.Saidi@ARM.com master_name.compare(0, name().size(), name()) == 0) 4198832SAli.Saidi@ARM.com master_name = master_name.erase(0, name().size() + 1); 4208832SAli.Saidi@ARM.com 4218832SAli.Saidi@ARM.com // CPUs in switch_cpus ask for ids again after switching 4228832SAli.Saidi@ARM.com for (int i = 0; i < masterIds.size(); i++) { 4238832SAli.Saidi@ARM.com if (masterIds[i] == master_name) { 4248832SAli.Saidi@ARM.com return i; 4258832SAli.Saidi@ARM.com } 4268832SAli.Saidi@ARM.com } 4278832SAli.Saidi@ARM.com 4288832SAli.Saidi@ARM.com // todo: Check if stats are enabled yet 4298832SAli.Saidi@ARM.com // I just don't know a good way to do it 4308832SAli.Saidi@ARM.com 4318832SAli.Saidi@ARM.com if (false) 4328832SAli.Saidi@ARM.com fatal("Can't request a masterId after regStats(). \ 4338832SAli.Saidi@ARM.com You must do so in init().\n"); 4348832SAli.Saidi@ARM.com 4358832SAli.Saidi@ARM.com masterIds.push_back(master_name); 4368832SAli.Saidi@ARM.com 4378832SAli.Saidi@ARM.com return masterIds.size() - 1; 4388832SAli.Saidi@ARM.com} 4398832SAli.Saidi@ARM.com 4408832SAli.Saidi@ARM.comstd::string 4418832SAli.Saidi@ARM.comSystem::getMasterName(MasterID master_id) 4428832SAli.Saidi@ARM.com{ 4438832SAli.Saidi@ARM.com if (master_id >= masterIds.size()) 4448832SAli.Saidi@ARM.com fatal("Invalid master_id passed to getMasterName()\n"); 4458832SAli.Saidi@ARM.com 4468832SAli.Saidi@ARM.com return masterIds[master_id]; 4478832SAli.Saidi@ARM.com} 4488832SAli.Saidi@ARM.com 4492902Ssaidi@eecs.umich.educonst char *System::MemoryModeStrings[3] = {"invalid", "atomic", 4502902Ssaidi@eecs.umich.edu "timing"}; 4512902Ssaidi@eecs.umich.edu 4524762Snate@binkert.orgSystem * 4534762Snate@binkert.orgSystemParams::create() 4542424SN/A{ 4555530Snate@binkert.org return new System(this); 4562424SN/A} 457