system.cc revision 12443
12689Sktlim@umich.edu/*
212272SGeoffrey.Blake@arm.com * Copyright (c) 2011-2014,2017 ARM Limited
38666SPrakash.Ramrakhyani@arm.com * All rights reserved
48666SPrakash.Ramrakhyani@arm.com *
58666SPrakash.Ramrakhyani@arm.com * The license below extends only to copyright in the software and shall
68666SPrakash.Ramrakhyani@arm.com * not be construed as granting a license to any other intellectual
78666SPrakash.Ramrakhyani@arm.com * property including but not limited to intellectual property relating
88666SPrakash.Ramrakhyani@arm.com * to a hardware implementation of the functionality of the software
98666SPrakash.Ramrakhyani@arm.com * licensed hereunder.  You may use the software subject to the license
108666SPrakash.Ramrakhyani@arm.com * terms below provided that you ensure that this notice is replicated
118666SPrakash.Ramrakhyani@arm.com * unmodified and in its entirety in all distributions of the software,
128666SPrakash.Ramrakhyani@arm.com * modified or unmodified, in source code or in binary form.
138666SPrakash.Ramrakhyani@arm.com *
142689Sktlim@umich.edu * Copyright (c) 2003-2006 The Regents of The University of Michigan
157897Shestness@cs.utexas.edu * Copyright (c) 2011 Regents of the University of California
162689Sktlim@umich.edu * All rights reserved.
172689Sktlim@umich.edu *
182689Sktlim@umich.edu * Redistribution and use in source and binary forms, with or without
192689Sktlim@umich.edu * modification, are permitted provided that the following conditions are
202689Sktlim@umich.edu * met: redistributions of source code must retain the above copyright
212689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer;
222689Sktlim@umich.edu * redistributions in binary form must reproduce the above copyright
232689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer in the
242689Sktlim@umich.edu * documentation and/or other materials provided with the distribution;
252689Sktlim@umich.edu * neither the name of the copyright holders nor the names of its
262689Sktlim@umich.edu * contributors may be used to endorse or promote products derived from
272689Sktlim@umich.edu * this software without specific prior written permission.
282689Sktlim@umich.edu *
292689Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
302689Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
312689Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
322689Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
332689Sktlim@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
342689Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
352689Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
362689Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
372689Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
382689Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
392689Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
402689Sktlim@umich.edu *
412689Sktlim@umich.edu * Authors: Steve Reinhardt
422689Sktlim@umich.edu *          Lisa Hsu
432689Sktlim@umich.edu *          Nathan Binkert
442689Sktlim@umich.edu *          Ali Saidi
457897Shestness@cs.utexas.edu *          Rick Strong
462689Sktlim@umich.edu */
472689Sktlim@umich.edu
4811793Sbrandon.potter@amd.com#include "sim/system.hh"
4911793Sbrandon.potter@amd.com
503960Sgblack@eecs.umich.edu#include "arch/remote_gdb.hh"
514194Ssaidi@eecs.umich.edu#include "arch/utility.hh"
521070SN/A#include "base/loader/object_file.hh"
531070SN/A#include "base/loader/symtab.hh"
549142Ssteve.reinhardt@amd.com#include "base/str.hh"
552521SN/A#include "base/trace.hh"
5611839SCurtis.Dunham@arm.com#include "config/use_kvm.hh"
5711839SCurtis.Dunham@arm.com#if USE_KVM
5812100SCurtis.Dunham@arm.com#include "cpu/kvm/base.hh"
5911839SCurtis.Dunham@arm.com#include "cpu/kvm/vm.hh"
6011839SCurtis.Dunham@arm.com#endif
6112122Sjose.marinho@arm.com#include "cpu/base.hh"
628229Snate@binkert.org#include "cpu/thread_context.hh"
638232Snate@binkert.org#include "debug/Loader.hh"
648666SPrakash.Ramrakhyani@arm.com#include "debug/WorkItems.hh"
659293Sandreas.hansson@arm.com#include "mem/abstract_mem.hh"
662522SN/A#include "mem/physical.hh"
678769Sgblack@eecs.umich.edu#include "params/System.hh"
682037SN/A#include "sim/byteswap.hh"
698229Snate@binkert.org#include "sim/debug.hh"
708769Sgblack@eecs.umich.edu#include "sim/full_system.hh"
716658Snate@binkert.org
7210494Sandreas.hansson@arm.com/**
7310494Sandreas.hansson@arm.com * To avoid linking errors with LTO, only include the header if we
7410494Sandreas.hansson@arm.com * actually have a definition.
7510494Sandreas.hansson@arm.com */
7610494Sandreas.hansson@arm.com#if THE_ISA != NULL_ISA
7710494Sandreas.hansson@arm.com#include "kern/kernel_stats.hh"
7811793Sbrandon.potter@amd.com
7910494Sandreas.hansson@arm.com#endif
8010494Sandreas.hansson@arm.com
812SN/Ausing namespace std;
822107SN/Ausing namespace TheISA;
832SN/A
842SN/Avector<System *> System::systemList;
852SN/A
862SN/Aint System::numSystemsRunning = 0;
872SN/A
881070SN/ASystem::System(Params *p)
898703Sandreas.hansson@arm.com    : MemObject(p), _systemPort("system_port", this),
908703Sandreas.hansson@arm.com      _numContexts(0),
9111146Smitch.hayenga@arm.com      multiThread(p->multi_thread),
928826Snilay@cs.wisc.edu      pagePtr(0),
932521SN/A      init_param(p->init_param),
949814Sandreas.hansson@arm.com      physProxy(_systemPort, p->cache_line_size),
9510360Sandreas.hansson@arm.com      kernelSymtab(nullptr),
9610360Sandreas.hansson@arm.com      kernel(nullptr),
977580SAli.Saidi@arm.com      loadAddrMask(p->load_addr_mask),
9810037SARM gem5 Developers      loadAddrOffset(p->load_offset),
9911839SCurtis.Dunham@arm.com#if USE_KVM
10011839SCurtis.Dunham@arm.com      kvmVM(p->kvm_vm),
10111839SCurtis.Dunham@arm.com#else
10211839SCurtis.Dunham@arm.com      kvmVM(nullptr),
10311839SCurtis.Dunham@arm.com#endif
10410700Sandreas.hansson@arm.com      physmem(name() + ".physmem", p->memories, p->mmap_using_noreserve),
1057914SBrad.Beckmann@amd.com      memoryMode(p->mem_mode),
1069814Sandreas.hansson@arm.com      _cacheLineSize(p->cache_line_size),
1077914SBrad.Beckmann@amd.com      workItemsBegin(0),
1087914SBrad.Beckmann@amd.com      workItemsEnd(0),
1098666SPrakash.Ramrakhyani@arm.com      numWorkIds(p->num_work_ids),
11011420Sdavid.guillen@arm.com      thermalModel(p->thermal_model),
1117914SBrad.Beckmann@amd.com      _params(p),
1128666SPrakash.Ramrakhyani@arm.com      totalNumInsts(0),
1137897Shestness@cs.utexas.edu      instEventQueue("system instruction-based event queue")
1142SN/A{
1151070SN/A    // add self to global system list
1161070SN/A    systemList.push_back(this);
1171070SN/A
11811839SCurtis.Dunham@arm.com#if USE_KVM
11911839SCurtis.Dunham@arm.com    if (kvmVM) {
12011839SCurtis.Dunham@arm.com        kvmVM->setSystem(this);
12111839SCurtis.Dunham@arm.com    }
12211839SCurtis.Dunham@arm.com#endif
12311839SCurtis.Dunham@arm.com
1248769Sgblack@eecs.umich.edu    if (FullSystem) {
1258769Sgblack@eecs.umich.edu        kernelSymtab = new SymbolTable;
1268769Sgblack@eecs.umich.edu        if (!debugSymbolTable)
1278769Sgblack@eecs.umich.edu            debugSymbolTable = new SymbolTable;
1288666SPrakash.Ramrakhyani@arm.com    }
1298832SAli.Saidi@ARM.com
1309814Sandreas.hansson@arm.com    // check if the cache line size is a value known to work
1319814Sandreas.hansson@arm.com    if (!(_cacheLineSize == 16 || _cacheLineSize == 32 ||
1329814Sandreas.hansson@arm.com          _cacheLineSize == 64 || _cacheLineSize == 128))
1339814Sandreas.hansson@arm.com        warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n");
1349814Sandreas.hansson@arm.com
1358832SAli.Saidi@ARM.com    // Get the generic system master IDs
1368832SAli.Saidi@ARM.com    MasterID tmp_id M5_VAR_USED;
1378832SAli.Saidi@ARM.com    tmp_id = getMasterId("writebacks");
1388832SAli.Saidi@ARM.com    assert(tmp_id == Request::wbMasterId);
1398832SAli.Saidi@ARM.com    tmp_id = getMasterId("functional");
1408832SAli.Saidi@ARM.com    assert(tmp_id == Request::funcMasterId);
1418832SAli.Saidi@ARM.com    tmp_id = getMasterId("interrupt");
1428832SAli.Saidi@ARM.com    assert(tmp_id == Request::intMasterId);
1438832SAli.Saidi@ARM.com
1448885SAli.Saidi@ARM.com    if (FullSystem) {
1458885SAli.Saidi@ARM.com        if (params()->kernel == "") {
1468885SAli.Saidi@ARM.com            inform("No kernel set for full system simulation. "
1479147Snilay@cs.wisc.edu                   "Assuming you know what you're doing\n");
1488885SAli.Saidi@ARM.com        } else {
1498885SAli.Saidi@ARM.com            // Get the kernel code
1508885SAli.Saidi@ARM.com            kernel = createObjectFile(params()->kernel);
1518885SAli.Saidi@ARM.com            inform("kernel located at: %s", params()->kernel);
1528885SAli.Saidi@ARM.com
1538885SAli.Saidi@ARM.com            if (kernel == NULL)
1548885SAli.Saidi@ARM.com                fatal("Could not load kernel file %s", params()->kernel);
1558885SAli.Saidi@ARM.com
1568885SAli.Saidi@ARM.com            // setup entry points
1578885SAli.Saidi@ARM.com            kernelStart = kernel->textBase();
1588885SAli.Saidi@ARM.com            kernelEnd = kernel->bssBase() + kernel->bssSize();
1598885SAli.Saidi@ARM.com            kernelEntry = kernel->entryPoint();
1608885SAli.Saidi@ARM.com
16112272SGeoffrey.Blake@arm.com            // If load_addr_mask is set to 0x0, then auto-calculate
16212272SGeoffrey.Blake@arm.com            // the smallest mask to cover all kernel addresses so gem5
16312272SGeoffrey.Blake@arm.com            // can relocate the kernel to a new offset.
16412272SGeoffrey.Blake@arm.com            if (loadAddrMask == 0) {
16512272SGeoffrey.Blake@arm.com                Addr shift_amt = findMsbSet(kernelEnd - kernelStart) + 1;
16612272SGeoffrey.Blake@arm.com                loadAddrMask = ((Addr)1 << shift_amt) - 1;
16712272SGeoffrey.Blake@arm.com            }
16812272SGeoffrey.Blake@arm.com
1698885SAli.Saidi@ARM.com            // load symbols
1708885SAli.Saidi@ARM.com            if (!kernel->loadGlobalSymbols(kernelSymtab))
1718885SAli.Saidi@ARM.com                fatal("could not load kernel symbols\n");
1728885SAli.Saidi@ARM.com
1738885SAli.Saidi@ARM.com            if (!kernel->loadLocalSymbols(kernelSymtab))
1748885SAli.Saidi@ARM.com                fatal("could not load kernel local symbols\n");
1758885SAli.Saidi@ARM.com
1768885SAli.Saidi@ARM.com            if (!kernel->loadGlobalSymbols(debugSymbolTable))
1778885SAli.Saidi@ARM.com                fatal("could not load kernel symbols\n");
1788885SAli.Saidi@ARM.com
1798885SAli.Saidi@ARM.com            if (!kernel->loadLocalSymbols(debugSymbolTable))
1808885SAli.Saidi@ARM.com                fatal("could not load kernel local symbols\n");
1818885SAli.Saidi@ARM.com
1828885SAli.Saidi@ARM.com            // Loading only needs to happen once and after memory system is
1838885SAli.Saidi@ARM.com            // connected so it will happen in initState()
1848885SAli.Saidi@ARM.com        }
18512262Sandreas.sandberg@arm.com
18612262Sandreas.sandberg@arm.com        for (const auto &obj_name : p->kernel_extras) {
18712262Sandreas.sandberg@arm.com            inform("Loading additional kernel object: %s", obj_name);
18812262Sandreas.sandberg@arm.com            ObjectFile *obj = createObjectFile(obj_name);
18912262Sandreas.sandberg@arm.com            fatal_if(!obj, "Failed to additional kernel object '%s'.\n",
19012262Sandreas.sandberg@arm.com                     obj_name);
19112262Sandreas.sandberg@arm.com            kernelExtras.push_back(obj);
19212262Sandreas.sandberg@arm.com        }
1938885SAli.Saidi@ARM.com    }
1948885SAli.Saidi@ARM.com
19511838SCurtis.Dunham@arm.com    // increment the number of running systems
1968885SAli.Saidi@ARM.com    numSystemsRunning++;
1978885SAli.Saidi@ARM.com
1989053Sdam.sunwoo@arm.com    // Set back pointers to the system in all memories
1999053Sdam.sunwoo@arm.com    for (int x = 0; x < params()->memories.size(); x++)
2009053Sdam.sunwoo@arm.com        params()->memories[x]->system(this);
2012SN/A}
2022SN/A
2032SN/ASystem::~System()
2042SN/A{
2051070SN/A    delete kernelSymtab;
2061070SN/A    delete kernel;
2078666SPrakash.Ramrakhyani@arm.com
2088666SPrakash.Ramrakhyani@arm.com    for (uint32_t j = 0; j < numWorkIds; j++)
2098666SPrakash.Ramrakhyani@arm.com        delete workItemStats[j];
2102SN/A}
2112SN/A
2128706Sandreas.hansson@arm.comvoid
2138706Sandreas.hansson@arm.comSystem::init()
2148706Sandreas.hansson@arm.com{
2158706Sandreas.hansson@arm.com    // check that the system port is connected
2168706Sandreas.hansson@arm.com    if (!_systemPort.isConnected())
2178706Sandreas.hansson@arm.com        panic("System port on %s is not connected.\n", name());
2188706Sandreas.hansson@arm.com}
2198706Sandreas.hansson@arm.com
2209294Sandreas.hansson@arm.comBaseMasterPort&
2219294Sandreas.hansson@arm.comSystem::getMasterPort(const std::string &if_name, PortID idx)
2228703Sandreas.hansson@arm.com{
2238703Sandreas.hansson@arm.com    // no need to distinguish at the moment (besides checking)
2248922Swilliam.wang@arm.com    return _systemPort;
2258703Sandreas.hansson@arm.com}
2268703Sandreas.hansson@arm.com
2272901Ssaidi@eecs.umich.eduvoid
2284762Snate@binkert.orgSystem::setMemoryMode(Enums::MemoryMode mode)
2292901Ssaidi@eecs.umich.edu{
23010913Sandreas.sandberg@arm.com    assert(drainState() == DrainState::Drained);
2312901Ssaidi@eecs.umich.edu    memoryMode = mode;
2322901Ssaidi@eecs.umich.edu}
2332901Ssaidi@eecs.umich.edu
2343960Sgblack@eecs.umich.edubool System::breakpoint()
2353960Sgblack@eecs.umich.edu{
2364095Sbinkertn@umich.edu    if (remoteGDB.size())
2374095Sbinkertn@umich.edu        return remoteGDB[0]->breakpoint();
2384095Sbinkertn@umich.edu    return false;
2393960Sgblack@eecs.umich.edu}
2403960Sgblack@eecs.umich.edu
24111005Sandreas.sandberg@arm.comContextID
24211005Sandreas.sandberg@arm.comSystem::registerThreadContext(ThreadContext *tc, ContextID assigned)
2432SN/A{
24412443Sgabeblack@google.com    int id = assigned;
24512443Sgabeblack@google.com    if (id == InvalidContextID) {
24612443Sgabeblack@google.com        // Find an unused context ID for this thread.
24712443Sgabeblack@google.com        id = 0;
24812443Sgabeblack@google.com        while (id < threadContexts.size() && threadContexts[id])
24912443Sgabeblack@google.com            id++;
2501806SN/A    }
2511806SN/A
25212443Sgabeblack@google.com    if (threadContexts.size() <= id)
25312443Sgabeblack@google.com        threadContexts.resize(id + 1);
25412443Sgabeblack@google.com
25512443Sgabeblack@google.com    fatal_if(threadContexts[id],
25612443Sgabeblack@google.com             "Cannot have two CPUs with the same id (%d)\n", id);
2571806SN/A
2582680Sktlim@umich.edu    threadContexts[id] = tc;
2595714Shsul@eecs.umich.edu    _numContexts++;
2601070SN/A
2619850Sandreas.hansson@arm.com#if THE_ISA != NULL_ISA
2625512SMichael.Adler@intel.com    int port = getRemoteGDBPort();
2637445Ssteve.reinhardt@amd.com    if (port) {
2644095Sbinkertn@umich.edu        RemoteGDB *rgdb = new RemoteGDB(this, tc);
2655512SMichael.Adler@intel.com        GDBListener *gdbl = new GDBListener(rgdb, port + id);
2664095Sbinkertn@umich.edu        gdbl->listen();
2677445Ssteve.reinhardt@amd.com
26812122Sjose.marinho@arm.com        BaseCPU *cpu = tc->getCpuPtr();
26912122Sjose.marinho@arm.com        if (cpu->waitForRemoteGDB()) {
27012122Sjose.marinho@arm.com            inform("%s: Waiting for a remote GDB connection on port %d.\n",
27112122Sjose.marinho@arm.com                   cpu->name(), gdbl->getPort());
27212122Sjose.marinho@arm.com
2734095Sbinkertn@umich.edu            gdbl->accept();
27412122Sjose.marinho@arm.com        }
2754095Sbinkertn@umich.edu        if (remoteGDB.size() <= id) {
2764095Sbinkertn@umich.edu            remoteGDB.resize(id + 1);
2774095Sbinkertn@umich.edu        }
2784095Sbinkertn@umich.edu
2794095Sbinkertn@umich.edu        remoteGDB[id] = rgdb;
2801070SN/A    }
2819850Sandreas.hansson@arm.com#endif
2821070SN/A
2837914SBrad.Beckmann@amd.com    activeCpus.push_back(false);
2847914SBrad.Beckmann@amd.com
2851806SN/A    return id;
286180SN/A}
28775SN/A
2886029Ssteve.reinhardt@amd.comint
2896029Ssteve.reinhardt@amd.comSystem::numRunningContexts()
2906029Ssteve.reinhardt@amd.com{
2916029Ssteve.reinhardt@amd.com    int running = 0;
2926029Ssteve.reinhardt@amd.com    for (int i = 0; i < _numContexts; ++i) {
2936029Ssteve.reinhardt@amd.com        if (threadContexts[i]->status() != ThreadContext::Halted)
2946029Ssteve.reinhardt@amd.com            ++running;
2956029Ssteve.reinhardt@amd.com    }
2966029Ssteve.reinhardt@amd.com    return running;
2976029Ssteve.reinhardt@amd.com}
2986029Ssteve.reinhardt@amd.com
299180SN/Avoid
3007733SAli.Saidi@ARM.comSystem::initState()
3011129SN/A{
3028769Sgblack@eecs.umich.edu    if (FullSystem) {
3039172Snilay@cs.wisc.edu        for (int i = 0; i < threadContexts.size(); i++)
3048769Sgblack@eecs.umich.edu            TheISA::startupCPU(threadContexts[i], i);
3058799Sgblack@eecs.umich.edu        // Moved from the constructor to here since it relies on the
3068799Sgblack@eecs.umich.edu        // address map being resolved in the interconnect
3078799Sgblack@eecs.umich.edu        /**
3088799Sgblack@eecs.umich.edu         * Load the kernel code into memory
3098799Sgblack@eecs.umich.edu         */
3108885SAli.Saidi@ARM.com        if (params()->kernel != "")  {
31110282Sdam.sunwoo@arm.com            if (params()->kernel_addr_check) {
31210282Sdam.sunwoo@arm.com                // Validate kernel mapping before loading binary
31310282Sdam.sunwoo@arm.com                if (!(isMemAddr((kernelStart & loadAddrMask) +
31410282Sdam.sunwoo@arm.com                                loadAddrOffset) &&
31510282Sdam.sunwoo@arm.com                      isMemAddr((kernelEnd & loadAddrMask) +
31610282Sdam.sunwoo@arm.com                                loadAddrOffset))) {
31710282Sdam.sunwoo@arm.com                    fatal("Kernel is mapped to invalid location (not memory). "
31810282Sdam.sunwoo@arm.com                          "kernelStart 0x(%x) - kernelEnd 0x(%x) %#x:%#x\n",
31910282Sdam.sunwoo@arm.com                          kernelStart,
32010282Sdam.sunwoo@arm.com                          kernelEnd, (kernelStart & loadAddrMask) +
32110282Sdam.sunwoo@arm.com                          loadAddrOffset,
32210282Sdam.sunwoo@arm.com                          (kernelEnd & loadAddrMask) + loadAddrOffset);
32310282Sdam.sunwoo@arm.com                }
3249187SKrishnendra.Nathella@arm.com            }
3258799Sgblack@eecs.umich.edu            // Load program sections into memory
32610037SARM gem5 Developers            kernel->loadSections(physProxy, loadAddrMask, loadAddrOffset);
32712262Sandreas.sandberg@arm.com            for (const auto &extra_kernel : kernelExtras) {
32812262Sandreas.sandberg@arm.com                extra_kernel->loadSections(physProxy, loadAddrMask,
32912262Sandreas.sandberg@arm.com                                           loadAddrOffset);
33012262Sandreas.sandberg@arm.com            }
3318706Sandreas.hansson@arm.com
3328799Sgblack@eecs.umich.edu            DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
3338799Sgblack@eecs.umich.edu            DPRINTF(Loader, "Kernel end   = %#x\n", kernelEnd);
3348799Sgblack@eecs.umich.edu            DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
3358799Sgblack@eecs.umich.edu            DPRINTF(Loader, "Kernel loaded...\n");
3368799Sgblack@eecs.umich.edu        }
3378706Sandreas.hansson@arm.com    }
3381129SN/A}
3391129SN/A
3401129SN/Avoid
34111005Sandreas.sandberg@arm.comSystem::replaceThreadContext(ThreadContext *tc, ContextID context_id)
342180SN/A{
3435713Shsul@eecs.umich.edu    if (context_id >= threadContexts.size()) {
3442680Sktlim@umich.edu        panic("replaceThreadContext: bad id, %d >= %d\n",
3455713Shsul@eecs.umich.edu              context_id, threadContexts.size());
346180SN/A    }
347180SN/A
3485713Shsul@eecs.umich.edu    threadContexts[context_id] = tc;
3495713Shsul@eecs.umich.edu    if (context_id < remoteGDB.size())
3505713Shsul@eecs.umich.edu        remoteGDB[context_id]->replaceThreadContext(tc);
3512SN/A}
3522SN/A
35312100SCurtis.Dunham@arm.combool
35412100SCurtis.Dunham@arm.comSystem::validKvmEnvironment() const
35512100SCurtis.Dunham@arm.com{
35612100SCurtis.Dunham@arm.com#if USE_KVM
35712100SCurtis.Dunham@arm.com    if (threadContexts.empty())
35812100SCurtis.Dunham@arm.com        return false;
35912100SCurtis.Dunham@arm.com
36012100SCurtis.Dunham@arm.com    for (auto tc : threadContexts) {
36112100SCurtis.Dunham@arm.com        if (dynamic_cast<BaseKvmCPU*>(tc->getCpuPtr()) == nullptr) {
36212100SCurtis.Dunham@arm.com            return false;
36312100SCurtis.Dunham@arm.com        }
36412100SCurtis.Dunham@arm.com    }
36512100SCurtis.Dunham@arm.com    return true;
36612100SCurtis.Dunham@arm.com#else
36712100SCurtis.Dunham@arm.com    return false;
36812100SCurtis.Dunham@arm.com#endif
36912100SCurtis.Dunham@arm.com}
37012100SCurtis.Dunham@arm.com
3712378SN/AAddr
3728601Ssteve.reinhardt@amd.comSystem::allocPhysPages(int npages)
3732378SN/A{
37410318Sandreas.hansson@arm.com    Addr return_addr = pagePtr << PageShift;
3758601Ssteve.reinhardt@amd.com    pagePtr += npages;
37610553Salexandru.dutu@amd.com
37710553Salexandru.dutu@amd.com    Addr next_return_addr = pagePtr << PageShift;
37810553Salexandru.dutu@amd.com
37910553Salexandru.dutu@amd.com    AddrRange m5opRange(0xffff0000, 0xffffffff);
38010553Salexandru.dutu@amd.com    if (m5opRange.contains(next_return_addr)) {
38110553Salexandru.dutu@amd.com        warn("Reached m5ops MMIO region\n");
38210553Salexandru.dutu@amd.com        return_addr = 0xffffffff;
38310553Salexandru.dutu@amd.com        pagePtr = 0xffffffff >> PageShift;
38410553Salexandru.dutu@amd.com    }
38510553Salexandru.dutu@amd.com
38610318Sandreas.hansson@arm.com    if ((pagePtr << PageShift) > physmem.totalSize())
3873162Ssaidi@eecs.umich.edu        fatal("Out of memory, please increase size of physical memory.");
3882378SN/A    return return_addr;
3892378SN/A}
3905795Ssaidi@eecs.umich.edu
3915795Ssaidi@eecs.umich.eduAddr
3928931Sandreas.hansson@arm.comSystem::memSize() const
3935795Ssaidi@eecs.umich.edu{
3948931Sandreas.hansson@arm.com    return physmem.totalSize();
3955795Ssaidi@eecs.umich.edu}
3965795Ssaidi@eecs.umich.edu
3975795Ssaidi@eecs.umich.eduAddr
3988931Sandreas.hansson@arm.comSystem::freeMemSize() const
3995795Ssaidi@eecs.umich.edu{
40010318Sandreas.hansson@arm.com   return physmem.totalSize() - (pagePtr << PageShift);
4015795Ssaidi@eecs.umich.edu}
4025795Ssaidi@eecs.umich.edu
4038460SAli.Saidi@ARM.combool
4048931Sandreas.hansson@arm.comSystem::isMemAddr(Addr addr) const
4058460SAli.Saidi@ARM.com{
4068931Sandreas.hansson@arm.com    return physmem.isMemAddr(addr);
4078460SAli.Saidi@ARM.com}
4088460SAli.Saidi@ARM.com
4091070SN/Avoid
4109342SAndreas.Sandberg@arm.comSystem::drainResume()
4117897Shestness@cs.utexas.edu{
4127897Shestness@cs.utexas.edu    totalNumInsts = 0;
4137897Shestness@cs.utexas.edu}
4147897Shestness@cs.utexas.edu
4157897Shestness@cs.utexas.eduvoid
41610905Sandreas.sandberg@arm.comSystem::serialize(CheckpointOut &cp) const
4171070SN/A{
4188769Sgblack@eecs.umich.edu    if (FullSystem)
41910905Sandreas.sandberg@arm.com        kernelSymtab->serialize("kernel_symtab", cp);
4207770SAli.Saidi@ARM.com    SERIALIZE_SCALAR(pagePtr);
42110905Sandreas.sandberg@arm.com    serializeSymtab(cp);
4229293Sandreas.hansson@arm.com
4239293Sandreas.hansson@arm.com    // also serialize the memories in the system
42410905Sandreas.sandberg@arm.com    physmem.serializeSection(cp, "physmem");
4251070SN/A}
4261070SN/A
4271070SN/A
4281070SN/Avoid
42910905Sandreas.sandberg@arm.comSystem::unserialize(CheckpointIn &cp)
4301070SN/A{
4318769Sgblack@eecs.umich.edu    if (FullSystem)
43210905Sandreas.sandberg@arm.com        kernelSymtab->unserialize("kernel_symtab", cp);
4337770SAli.Saidi@ARM.com    UNSERIALIZE_SCALAR(pagePtr);
43410905Sandreas.sandberg@arm.com    unserializeSymtab(cp);
4359293Sandreas.hansson@arm.com
4369293Sandreas.hansson@arm.com    // also unserialize the memories in the system
43710905Sandreas.sandberg@arm.com    physmem.unserializeSection(cp, "physmem");
4381070SN/A}
4392SN/A
4402SN/Avoid
4418666SPrakash.Ramrakhyani@arm.comSystem::regStats()
4428666SPrakash.Ramrakhyani@arm.com{
44311522Sstephan.diestelhorst@arm.com    MemObject::regStats();
44411522Sstephan.diestelhorst@arm.com
4458666SPrakash.Ramrakhyani@arm.com    for (uint32_t j = 0; j < numWorkIds ; j++) {
4468666SPrakash.Ramrakhyani@arm.com        workItemStats[j] = new Stats::Histogram();
4478666SPrakash.Ramrakhyani@arm.com        stringstream namestr;
4488666SPrakash.Ramrakhyani@arm.com        ccprintf(namestr, "work_item_type%d", j);
4498666SPrakash.Ramrakhyani@arm.com        workItemStats[j]->init(20)
4508666SPrakash.Ramrakhyani@arm.com                         .name(name() + "." + namestr.str())
4518666SPrakash.Ramrakhyani@arm.com                         .desc("Run time stat for" + namestr.str())
4528666SPrakash.Ramrakhyani@arm.com                         .prereq(*workItemStats[j]);
4538666SPrakash.Ramrakhyani@arm.com    }
4548666SPrakash.Ramrakhyani@arm.com}
4558666SPrakash.Ramrakhyani@arm.com
4568666SPrakash.Ramrakhyani@arm.comvoid
4578666SPrakash.Ramrakhyani@arm.comSystem::workItemEnd(uint32_t tid, uint32_t workid)
4588666SPrakash.Ramrakhyani@arm.com{
4598666SPrakash.Ramrakhyani@arm.com    std::pair<uint32_t,uint32_t> p(tid, workid);
4608666SPrakash.Ramrakhyani@arm.com    if (!lastWorkItemStarted.count(p))
4618666SPrakash.Ramrakhyani@arm.com        return;
4628666SPrakash.Ramrakhyani@arm.com
4638666SPrakash.Ramrakhyani@arm.com    Tick samp = curTick() - lastWorkItemStarted[p];
4648666SPrakash.Ramrakhyani@arm.com    DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
4658666SPrakash.Ramrakhyani@arm.com
4668666SPrakash.Ramrakhyani@arm.com    if (workid >= numWorkIds)
4678666SPrakash.Ramrakhyani@arm.com        fatal("Got workid greater than specified in system configuration\n");
4688666SPrakash.Ramrakhyani@arm.com
4698666SPrakash.Ramrakhyani@arm.com    workItemStats[workid]->sample(samp);
4708666SPrakash.Ramrakhyani@arm.com    lastWorkItemStarted.erase(p);
4718666SPrakash.Ramrakhyani@arm.com}
4728666SPrakash.Ramrakhyani@arm.com
4738666SPrakash.Ramrakhyani@arm.comvoid
4742SN/ASystem::printSystems()
4752SN/A{
47610375Sandreas.hansson@arm.com    ios::fmtflags flags(cerr.flags());
47710375Sandreas.hansson@arm.com
4782SN/A    vector<System *>::iterator i = systemList.begin();
4792SN/A    vector<System *>::iterator end = systemList.end();
4802SN/A    for (; i != end; ++i) {
4812SN/A        System *sys = *i;
4822SN/A        cerr << "System " << sys->name() << ": " << hex << sys << endl;
4832SN/A    }
48410375Sandreas.hansson@arm.com
48510375Sandreas.hansson@arm.com    cerr.flags(flags);
4862SN/A}
4872SN/A
4882SN/Avoid
4892SN/AprintSystems()
4902SN/A{
4912SN/A    System::printSystems();
4922SN/A}
4932SN/A
4948832SAli.Saidi@ARM.comMasterID
4958832SAli.Saidi@ARM.comSystem::getMasterId(std::string master_name)
4968832SAli.Saidi@ARM.com{
4978832SAli.Saidi@ARM.com    // strip off system name if the string starts with it
4989142Ssteve.reinhardt@amd.com    if (startswith(master_name, name()))
4998832SAli.Saidi@ARM.com        master_name = master_name.erase(0, name().size() + 1);
5008832SAli.Saidi@ARM.com
5018832SAli.Saidi@ARM.com    // CPUs in switch_cpus ask for ids again after switching
5028832SAli.Saidi@ARM.com    for (int i = 0; i < masterIds.size(); i++) {
5038832SAli.Saidi@ARM.com        if (masterIds[i] == master_name) {
5048832SAli.Saidi@ARM.com            return i;
5058832SAli.Saidi@ARM.com        }
5068832SAli.Saidi@ARM.com    }
5078832SAli.Saidi@ARM.com
5088986SAli.Saidi@ARM.com    // Verify that the statistics haven't been enabled yet
5098986SAli.Saidi@ARM.com    // Otherwise objects will have sized their stat buckets and
5108986SAli.Saidi@ARM.com    // they will be too small
5118832SAli.Saidi@ARM.com
51210367SAndrew.Bardsley@arm.com    if (Stats::enabled()) {
51310367SAndrew.Bardsley@arm.com        fatal("Can't request a masterId after regStats(). "
51410367SAndrew.Bardsley@arm.com                "You must do so in init().\n");
51510367SAndrew.Bardsley@arm.com    }
5168832SAli.Saidi@ARM.com
5178832SAli.Saidi@ARM.com    masterIds.push_back(master_name);
5188832SAli.Saidi@ARM.com
5198832SAli.Saidi@ARM.com    return masterIds.size() - 1;
5208832SAli.Saidi@ARM.com}
5218832SAli.Saidi@ARM.com
5228832SAli.Saidi@ARM.comstd::string
5238832SAli.Saidi@ARM.comSystem::getMasterName(MasterID master_id)
5248832SAli.Saidi@ARM.com{
5258832SAli.Saidi@ARM.com    if (master_id >= masterIds.size())
5268832SAli.Saidi@ARM.com        fatal("Invalid master_id passed to getMasterName()\n");
5278832SAli.Saidi@ARM.com
5288832SAli.Saidi@ARM.com    return masterIds[master_id];
5298832SAli.Saidi@ARM.com}
5308832SAli.Saidi@ARM.com
5314762Snate@binkert.orgSystem *
5324762Snate@binkert.orgSystemParams::create()
5332424SN/A{
5345530Snate@binkert.org    return new System(this);
5352424SN/A}
536