system.cc revision 12100
12689Sktlim@umich.edu/* 210282Sdam.sunwoo@arm.com * Copyright (c) 2011-2014 ARM Limited 38666SPrakash.Ramrakhyani@arm.com * All rights reserved 48666SPrakash.Ramrakhyani@arm.com * 58666SPrakash.Ramrakhyani@arm.com * The license below extends only to copyright in the software and shall 68666SPrakash.Ramrakhyani@arm.com * not be construed as granting a license to any other intellectual 78666SPrakash.Ramrakhyani@arm.com * property including but not limited to intellectual property relating 88666SPrakash.Ramrakhyani@arm.com * to a hardware implementation of the functionality of the software 98666SPrakash.Ramrakhyani@arm.com * licensed hereunder. You may use the software subject to the license 108666SPrakash.Ramrakhyani@arm.com * terms below provided that you ensure that this notice is replicated 118666SPrakash.Ramrakhyani@arm.com * unmodified and in its entirety in all distributions of the software, 128666SPrakash.Ramrakhyani@arm.com * modified or unmodified, in source code or in binary form. 138666SPrakash.Ramrakhyani@arm.com * 142689Sktlim@umich.edu * Copyright (c) 2003-2006 The Regents of The University of Michigan 157897Shestness@cs.utexas.edu * Copyright (c) 2011 Regents of the University of California 162689Sktlim@umich.edu * All rights reserved. 172689Sktlim@umich.edu * 182689Sktlim@umich.edu * Redistribution and use in source and binary forms, with or without 192689Sktlim@umich.edu * modification, are permitted provided that the following conditions are 202689Sktlim@umich.edu * met: redistributions of source code must retain the above copyright 212689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer; 222689Sktlim@umich.edu * redistributions in binary form must reproduce the above copyright 232689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer in the 242689Sktlim@umich.edu * documentation and/or other materials provided with the distribution; 252689Sktlim@umich.edu * neither the name of the copyright holders nor the names of its 262689Sktlim@umich.edu * contributors may be used to endorse or promote products derived from 272689Sktlim@umich.edu * this software without specific prior written permission. 282689Sktlim@umich.edu * 292689Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302689Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312689Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322689Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332689Sktlim@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 342689Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 352689Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 362689Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372689Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382689Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 392689Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 402689Sktlim@umich.edu * 412689Sktlim@umich.edu * Authors: Steve Reinhardt 422689Sktlim@umich.edu * Lisa Hsu 432689Sktlim@umich.edu * Nathan Binkert 442689Sktlim@umich.edu * Ali Saidi 457897Shestness@cs.utexas.edu * Rick Strong 462689Sktlim@umich.edu */ 472689Sktlim@umich.edu 4811793Sbrandon.potter@amd.com#include "sim/system.hh" 4911793Sbrandon.potter@amd.com 503960Sgblack@eecs.umich.edu#include "arch/remote_gdb.hh" 514194Ssaidi@eecs.umich.edu#include "arch/utility.hh" 521070SN/A#include "base/loader/object_file.hh" 531070SN/A#include "base/loader/symtab.hh" 549142Ssteve.reinhardt@amd.com#include "base/str.hh" 552521SN/A#include "base/trace.hh" 5611839SCurtis.Dunham@arm.com#include "config/use_kvm.hh" 5711839SCurtis.Dunham@arm.com#if USE_KVM 5812100SCurtis.Dunham@arm.com#include "cpu/kvm/base.hh" 5911839SCurtis.Dunham@arm.com#include "cpu/kvm/vm.hh" 6011839SCurtis.Dunham@arm.com#endif 618229Snate@binkert.org#include "cpu/thread_context.hh" 628232Snate@binkert.org#include "debug/Loader.hh" 638666SPrakash.Ramrakhyani@arm.com#include "debug/WorkItems.hh" 649293Sandreas.hansson@arm.com#include "mem/abstract_mem.hh" 652522SN/A#include "mem/physical.hh" 668769Sgblack@eecs.umich.edu#include "params/System.hh" 672037SN/A#include "sim/byteswap.hh" 688229Snate@binkert.org#include "sim/debug.hh" 698769Sgblack@eecs.umich.edu#include "sim/full_system.hh" 706658Snate@binkert.org 7110494Sandreas.hansson@arm.com/** 7210494Sandreas.hansson@arm.com * To avoid linking errors with LTO, only include the header if we 7310494Sandreas.hansson@arm.com * actually have a definition. 7410494Sandreas.hansson@arm.com */ 7510494Sandreas.hansson@arm.com#if THE_ISA != NULL_ISA 7610494Sandreas.hansson@arm.com#include "kern/kernel_stats.hh" 7711793Sbrandon.potter@amd.com 7810494Sandreas.hansson@arm.com#endif 7910494Sandreas.hansson@arm.com 802SN/Ausing namespace std; 812107SN/Ausing namespace TheISA; 822SN/A 832SN/Avector<System *> System::systemList; 842SN/A 852SN/Aint System::numSystemsRunning = 0; 862SN/A 871070SN/ASystem::System(Params *p) 888703Sandreas.hansson@arm.com : MemObject(p), _systemPort("system_port", this), 898703Sandreas.hansson@arm.com _numContexts(0), 9011146Smitch.hayenga@arm.com multiThread(p->multi_thread), 918826Snilay@cs.wisc.edu pagePtr(0), 922521SN/A init_param(p->init_param), 939814Sandreas.hansson@arm.com physProxy(_systemPort, p->cache_line_size), 9410360Sandreas.hansson@arm.com kernelSymtab(nullptr), 9510360Sandreas.hansson@arm.com kernel(nullptr), 967580SAli.Saidi@arm.com loadAddrMask(p->load_addr_mask), 9710037SARM gem5 Developers loadAddrOffset(p->load_offset), 9811839SCurtis.Dunham@arm.com#if USE_KVM 9911839SCurtis.Dunham@arm.com kvmVM(p->kvm_vm), 10011839SCurtis.Dunham@arm.com#else 10111839SCurtis.Dunham@arm.com kvmVM(nullptr), 10211839SCurtis.Dunham@arm.com#endif 10310700Sandreas.hansson@arm.com physmem(name() + ".physmem", p->memories, p->mmap_using_noreserve), 1047914SBrad.Beckmann@amd.com memoryMode(p->mem_mode), 1059814Sandreas.hansson@arm.com _cacheLineSize(p->cache_line_size), 1067914SBrad.Beckmann@amd.com workItemsBegin(0), 1077914SBrad.Beckmann@amd.com workItemsEnd(0), 1088666SPrakash.Ramrakhyani@arm.com numWorkIds(p->num_work_ids), 10911420Sdavid.guillen@arm.com thermalModel(p->thermal_model), 1107914SBrad.Beckmann@amd.com _params(p), 1118666SPrakash.Ramrakhyani@arm.com totalNumInsts(0), 1127897Shestness@cs.utexas.edu instEventQueue("system instruction-based event queue") 1132SN/A{ 1141070SN/A // add self to global system list 1151070SN/A systemList.push_back(this); 1161070SN/A 11711839SCurtis.Dunham@arm.com#if USE_KVM 11811839SCurtis.Dunham@arm.com if (kvmVM) { 11911839SCurtis.Dunham@arm.com kvmVM->setSystem(this); 12011839SCurtis.Dunham@arm.com } 12111839SCurtis.Dunham@arm.com#endif 12211839SCurtis.Dunham@arm.com 1238769Sgblack@eecs.umich.edu if (FullSystem) { 1248769Sgblack@eecs.umich.edu kernelSymtab = new SymbolTable; 1258769Sgblack@eecs.umich.edu if (!debugSymbolTable) 1268769Sgblack@eecs.umich.edu debugSymbolTable = new SymbolTable; 1278666SPrakash.Ramrakhyani@arm.com } 1288832SAli.Saidi@ARM.com 1299814Sandreas.hansson@arm.com // check if the cache line size is a value known to work 1309814Sandreas.hansson@arm.com if (!(_cacheLineSize == 16 || _cacheLineSize == 32 || 1319814Sandreas.hansson@arm.com _cacheLineSize == 64 || _cacheLineSize == 128)) 1329814Sandreas.hansson@arm.com warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n"); 1339814Sandreas.hansson@arm.com 1348832SAli.Saidi@ARM.com // Get the generic system master IDs 1358832SAli.Saidi@ARM.com MasterID tmp_id M5_VAR_USED; 1368832SAli.Saidi@ARM.com tmp_id = getMasterId("writebacks"); 1378832SAli.Saidi@ARM.com assert(tmp_id == Request::wbMasterId); 1388832SAli.Saidi@ARM.com tmp_id = getMasterId("functional"); 1398832SAli.Saidi@ARM.com assert(tmp_id == Request::funcMasterId); 1408832SAli.Saidi@ARM.com tmp_id = getMasterId("interrupt"); 1418832SAli.Saidi@ARM.com assert(tmp_id == Request::intMasterId); 1428832SAli.Saidi@ARM.com 1438885SAli.Saidi@ARM.com if (FullSystem) { 1448885SAli.Saidi@ARM.com if (params()->kernel == "") { 1458885SAli.Saidi@ARM.com inform("No kernel set for full system simulation. " 1469147Snilay@cs.wisc.edu "Assuming you know what you're doing\n"); 1478885SAli.Saidi@ARM.com } else { 1488885SAli.Saidi@ARM.com // Get the kernel code 1498885SAli.Saidi@ARM.com kernel = createObjectFile(params()->kernel); 1508885SAli.Saidi@ARM.com inform("kernel located at: %s", params()->kernel); 1518885SAli.Saidi@ARM.com 1528885SAli.Saidi@ARM.com if (kernel == NULL) 1538885SAli.Saidi@ARM.com fatal("Could not load kernel file %s", params()->kernel); 1548885SAli.Saidi@ARM.com 1558885SAli.Saidi@ARM.com // setup entry points 1568885SAli.Saidi@ARM.com kernelStart = kernel->textBase(); 1578885SAli.Saidi@ARM.com kernelEnd = kernel->bssBase() + kernel->bssSize(); 1588885SAli.Saidi@ARM.com kernelEntry = kernel->entryPoint(); 1598885SAli.Saidi@ARM.com 1608885SAli.Saidi@ARM.com // load symbols 1618885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(kernelSymtab)) 1628885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1638885SAli.Saidi@ARM.com 1648885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(kernelSymtab)) 1658885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1668885SAli.Saidi@ARM.com 1678885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(debugSymbolTable)) 1688885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1698885SAli.Saidi@ARM.com 1708885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(debugSymbolTable)) 1718885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1728885SAli.Saidi@ARM.com 1738885SAli.Saidi@ARM.com // Loading only needs to happen once and after memory system is 1748885SAli.Saidi@ARM.com // connected so it will happen in initState() 1758885SAli.Saidi@ARM.com } 1768885SAli.Saidi@ARM.com } 1778885SAli.Saidi@ARM.com 17811838SCurtis.Dunham@arm.com // increment the number of running systems 1798885SAli.Saidi@ARM.com numSystemsRunning++; 1808885SAli.Saidi@ARM.com 1819053Sdam.sunwoo@arm.com // Set back pointers to the system in all memories 1829053Sdam.sunwoo@arm.com for (int x = 0; x < params()->memories.size(); x++) 1839053Sdam.sunwoo@arm.com params()->memories[x]->system(this); 1842SN/A} 1852SN/A 1862SN/ASystem::~System() 1872SN/A{ 1881070SN/A delete kernelSymtab; 1891070SN/A delete kernel; 1908666SPrakash.Ramrakhyani@arm.com 1918666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds; j++) 1928666SPrakash.Ramrakhyani@arm.com delete workItemStats[j]; 1932SN/A} 1942SN/A 1958706Sandreas.hansson@arm.comvoid 1968706Sandreas.hansson@arm.comSystem::init() 1978706Sandreas.hansson@arm.com{ 1988706Sandreas.hansson@arm.com // check that the system port is connected 1998706Sandreas.hansson@arm.com if (!_systemPort.isConnected()) 2008706Sandreas.hansson@arm.com panic("System port on %s is not connected.\n", name()); 2018706Sandreas.hansson@arm.com} 2028706Sandreas.hansson@arm.com 2039294Sandreas.hansson@arm.comBaseMasterPort& 2049294Sandreas.hansson@arm.comSystem::getMasterPort(const std::string &if_name, PortID idx) 2058703Sandreas.hansson@arm.com{ 2068703Sandreas.hansson@arm.com // no need to distinguish at the moment (besides checking) 2078922Swilliam.wang@arm.com return _systemPort; 2088703Sandreas.hansson@arm.com} 2098703Sandreas.hansson@arm.com 2102901Ssaidi@eecs.umich.eduvoid 2114762Snate@binkert.orgSystem::setMemoryMode(Enums::MemoryMode mode) 2122901Ssaidi@eecs.umich.edu{ 21310913Sandreas.sandberg@arm.com assert(drainState() == DrainState::Drained); 2142901Ssaidi@eecs.umich.edu memoryMode = mode; 2152901Ssaidi@eecs.umich.edu} 2162901Ssaidi@eecs.umich.edu 2173960Sgblack@eecs.umich.edubool System::breakpoint() 2183960Sgblack@eecs.umich.edu{ 2194095Sbinkertn@umich.edu if (remoteGDB.size()) 2204095Sbinkertn@umich.edu return remoteGDB[0]->breakpoint(); 2214095Sbinkertn@umich.edu return false; 2223960Sgblack@eecs.umich.edu} 2233960Sgblack@eecs.umich.edu 2247445Ssteve.reinhardt@amd.com/** 2257445Ssteve.reinhardt@amd.com * Setting rgdb_wait to a positive integer waits for a remote debugger to 2267445Ssteve.reinhardt@amd.com * connect to that context ID before continuing. This should really 2277445Ssteve.reinhardt@amd.com be a parameter on the CPU object or something... 2287445Ssteve.reinhardt@amd.com */ 2297445Ssteve.reinhardt@amd.comint rgdb_wait = -1; 2307445Ssteve.reinhardt@amd.com 23111005Sandreas.sandberg@arm.comContextID 23211005Sandreas.sandberg@arm.comSystem::registerThreadContext(ThreadContext *tc, ContextID assigned) 2332SN/A{ 2345712Shsul@eecs.umich.edu int id; 23511005Sandreas.sandberg@arm.com if (assigned == InvalidContextID) { 2365718Shsul@eecs.umich.edu for (id = 0; id < threadContexts.size(); id++) { 2375718Shsul@eecs.umich.edu if (!threadContexts[id]) 2385718Shsul@eecs.umich.edu break; 2395718Shsul@eecs.umich.edu } 2405718Shsul@eecs.umich.edu 2415718Shsul@eecs.umich.edu if (threadContexts.size() <= id) 2425718Shsul@eecs.umich.edu threadContexts.resize(id + 1); 2435718Shsul@eecs.umich.edu } else { 2445718Shsul@eecs.umich.edu if (threadContexts.size() <= assigned) 2455718Shsul@eecs.umich.edu threadContexts.resize(assigned + 1); 2465718Shsul@eecs.umich.edu id = assigned; 2471806SN/A } 2481806SN/A 2492680Sktlim@umich.edu if (threadContexts[id]) 2505823Ssaidi@eecs.umich.edu fatal("Cannot have two CPUs with the same id (%d)\n", id); 2511806SN/A 2522680Sktlim@umich.edu threadContexts[id] = tc; 2535714Shsul@eecs.umich.edu _numContexts++; 2541070SN/A 2559850Sandreas.hansson@arm.com#if THE_ISA != NULL_ISA 2565512SMichael.Adler@intel.com int port = getRemoteGDBPort(); 2577445Ssteve.reinhardt@amd.com if (port) { 2584095Sbinkertn@umich.edu RemoteGDB *rgdb = new RemoteGDB(this, tc); 2595512SMichael.Adler@intel.com GDBListener *gdbl = new GDBListener(rgdb, port + id); 2604095Sbinkertn@umich.edu gdbl->listen(); 2617445Ssteve.reinhardt@amd.com 2624095Sbinkertn@umich.edu if (rgdb_wait != -1 && rgdb_wait == id) 2634095Sbinkertn@umich.edu gdbl->accept(); 2641070SN/A 2654095Sbinkertn@umich.edu if (remoteGDB.size() <= id) { 2664095Sbinkertn@umich.edu remoteGDB.resize(id + 1); 2674095Sbinkertn@umich.edu } 2684095Sbinkertn@umich.edu 2694095Sbinkertn@umich.edu remoteGDB[id] = rgdb; 2701070SN/A } 2719850Sandreas.hansson@arm.com#endif 2721070SN/A 2737914SBrad.Beckmann@amd.com activeCpus.push_back(false); 2747914SBrad.Beckmann@amd.com 2751806SN/A return id; 276180SN/A} 27775SN/A 2786029Ssteve.reinhardt@amd.comint 2796029Ssteve.reinhardt@amd.comSystem::numRunningContexts() 2806029Ssteve.reinhardt@amd.com{ 2816029Ssteve.reinhardt@amd.com int running = 0; 2826029Ssteve.reinhardt@amd.com for (int i = 0; i < _numContexts; ++i) { 2836029Ssteve.reinhardt@amd.com if (threadContexts[i]->status() != ThreadContext::Halted) 2846029Ssteve.reinhardt@amd.com ++running; 2856029Ssteve.reinhardt@amd.com } 2866029Ssteve.reinhardt@amd.com return running; 2876029Ssteve.reinhardt@amd.com} 2886029Ssteve.reinhardt@amd.com 289180SN/Avoid 2907733SAli.Saidi@ARM.comSystem::initState() 2911129SN/A{ 2928769Sgblack@eecs.umich.edu if (FullSystem) { 2939172Snilay@cs.wisc.edu for (int i = 0; i < threadContexts.size(); i++) 2948769Sgblack@eecs.umich.edu TheISA::startupCPU(threadContexts[i], i); 2958799Sgblack@eecs.umich.edu // Moved from the constructor to here since it relies on the 2968799Sgblack@eecs.umich.edu // address map being resolved in the interconnect 2978799Sgblack@eecs.umich.edu /** 2988799Sgblack@eecs.umich.edu * Load the kernel code into memory 2998799Sgblack@eecs.umich.edu */ 3008885SAli.Saidi@ARM.com if (params()->kernel != "") { 30110282Sdam.sunwoo@arm.com if (params()->kernel_addr_check) { 30210282Sdam.sunwoo@arm.com // Validate kernel mapping before loading binary 30310282Sdam.sunwoo@arm.com if (!(isMemAddr((kernelStart & loadAddrMask) + 30410282Sdam.sunwoo@arm.com loadAddrOffset) && 30510282Sdam.sunwoo@arm.com isMemAddr((kernelEnd & loadAddrMask) + 30610282Sdam.sunwoo@arm.com loadAddrOffset))) { 30710282Sdam.sunwoo@arm.com fatal("Kernel is mapped to invalid location (not memory). " 30810282Sdam.sunwoo@arm.com "kernelStart 0x(%x) - kernelEnd 0x(%x) %#x:%#x\n", 30910282Sdam.sunwoo@arm.com kernelStart, 31010282Sdam.sunwoo@arm.com kernelEnd, (kernelStart & loadAddrMask) + 31110282Sdam.sunwoo@arm.com loadAddrOffset, 31210282Sdam.sunwoo@arm.com (kernelEnd & loadAddrMask) + loadAddrOffset); 31310282Sdam.sunwoo@arm.com } 3149187SKrishnendra.Nathella@arm.com } 3158799Sgblack@eecs.umich.edu // Load program sections into memory 31610037SARM gem5 Developers kernel->loadSections(physProxy, loadAddrMask, loadAddrOffset); 3178706Sandreas.hansson@arm.com 3188799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel start = %#x\n", kernelStart); 3198799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd); 3208799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry); 3218799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel loaded...\n"); 3228799Sgblack@eecs.umich.edu } 3238706Sandreas.hansson@arm.com } 3241129SN/A} 3251129SN/A 3261129SN/Avoid 32711005Sandreas.sandberg@arm.comSystem::replaceThreadContext(ThreadContext *tc, ContextID context_id) 328180SN/A{ 3295713Shsul@eecs.umich.edu if (context_id >= threadContexts.size()) { 3302680Sktlim@umich.edu panic("replaceThreadContext: bad id, %d >= %d\n", 3315713Shsul@eecs.umich.edu context_id, threadContexts.size()); 332180SN/A } 333180SN/A 3345713Shsul@eecs.umich.edu threadContexts[context_id] = tc; 3355713Shsul@eecs.umich.edu if (context_id < remoteGDB.size()) 3365713Shsul@eecs.umich.edu remoteGDB[context_id]->replaceThreadContext(tc); 3372SN/A} 3382SN/A 33912100SCurtis.Dunham@arm.combool 34012100SCurtis.Dunham@arm.comSystem::validKvmEnvironment() const 34112100SCurtis.Dunham@arm.com{ 34212100SCurtis.Dunham@arm.com#if USE_KVM 34312100SCurtis.Dunham@arm.com if (threadContexts.empty()) 34412100SCurtis.Dunham@arm.com return false; 34512100SCurtis.Dunham@arm.com 34612100SCurtis.Dunham@arm.com for (auto tc : threadContexts) { 34712100SCurtis.Dunham@arm.com if (dynamic_cast<BaseKvmCPU*>(tc->getCpuPtr()) == nullptr) { 34812100SCurtis.Dunham@arm.com return false; 34912100SCurtis.Dunham@arm.com } 35012100SCurtis.Dunham@arm.com } 35112100SCurtis.Dunham@arm.com return true; 35212100SCurtis.Dunham@arm.com#else 35312100SCurtis.Dunham@arm.com return false; 35412100SCurtis.Dunham@arm.com#endif 35512100SCurtis.Dunham@arm.com} 35612100SCurtis.Dunham@arm.com 3572378SN/AAddr 3588601Ssteve.reinhardt@amd.comSystem::allocPhysPages(int npages) 3592378SN/A{ 36010318Sandreas.hansson@arm.com Addr return_addr = pagePtr << PageShift; 3618601Ssteve.reinhardt@amd.com pagePtr += npages; 36210553Salexandru.dutu@amd.com 36310553Salexandru.dutu@amd.com Addr next_return_addr = pagePtr << PageShift; 36410553Salexandru.dutu@amd.com 36510553Salexandru.dutu@amd.com AddrRange m5opRange(0xffff0000, 0xffffffff); 36610553Salexandru.dutu@amd.com if (m5opRange.contains(next_return_addr)) { 36710553Salexandru.dutu@amd.com warn("Reached m5ops MMIO region\n"); 36810553Salexandru.dutu@amd.com return_addr = 0xffffffff; 36910553Salexandru.dutu@amd.com pagePtr = 0xffffffff >> PageShift; 37010553Salexandru.dutu@amd.com } 37110553Salexandru.dutu@amd.com 37210318Sandreas.hansson@arm.com if ((pagePtr << PageShift) > physmem.totalSize()) 3733162Ssaidi@eecs.umich.edu fatal("Out of memory, please increase size of physical memory."); 3742378SN/A return return_addr; 3752378SN/A} 3765795Ssaidi@eecs.umich.edu 3775795Ssaidi@eecs.umich.eduAddr 3788931Sandreas.hansson@arm.comSystem::memSize() const 3795795Ssaidi@eecs.umich.edu{ 3808931Sandreas.hansson@arm.com return physmem.totalSize(); 3815795Ssaidi@eecs.umich.edu} 3825795Ssaidi@eecs.umich.edu 3835795Ssaidi@eecs.umich.eduAddr 3848931Sandreas.hansson@arm.comSystem::freeMemSize() const 3855795Ssaidi@eecs.umich.edu{ 38610318Sandreas.hansson@arm.com return physmem.totalSize() - (pagePtr << PageShift); 3875795Ssaidi@eecs.umich.edu} 3885795Ssaidi@eecs.umich.edu 3898460SAli.Saidi@ARM.combool 3908931Sandreas.hansson@arm.comSystem::isMemAddr(Addr addr) const 3918460SAli.Saidi@ARM.com{ 3928931Sandreas.hansson@arm.com return physmem.isMemAddr(addr); 3938460SAli.Saidi@ARM.com} 3948460SAli.Saidi@ARM.com 3951070SN/Avoid 3969342SAndreas.Sandberg@arm.comSystem::drainResume() 3977897Shestness@cs.utexas.edu{ 3987897Shestness@cs.utexas.edu totalNumInsts = 0; 3997897Shestness@cs.utexas.edu} 4007897Shestness@cs.utexas.edu 4017897Shestness@cs.utexas.eduvoid 40210905Sandreas.sandberg@arm.comSystem::serialize(CheckpointOut &cp) const 4031070SN/A{ 4048769Sgblack@eecs.umich.edu if (FullSystem) 40510905Sandreas.sandberg@arm.com kernelSymtab->serialize("kernel_symtab", cp); 4067770SAli.Saidi@ARM.com SERIALIZE_SCALAR(pagePtr); 40710905Sandreas.sandberg@arm.com serializeSymtab(cp); 4089293Sandreas.hansson@arm.com 4099293Sandreas.hansson@arm.com // also serialize the memories in the system 41010905Sandreas.sandberg@arm.com physmem.serializeSection(cp, "physmem"); 4111070SN/A} 4121070SN/A 4131070SN/A 4141070SN/Avoid 41510905Sandreas.sandberg@arm.comSystem::unserialize(CheckpointIn &cp) 4161070SN/A{ 4178769Sgblack@eecs.umich.edu if (FullSystem) 41810905Sandreas.sandberg@arm.com kernelSymtab->unserialize("kernel_symtab", cp); 4197770SAli.Saidi@ARM.com UNSERIALIZE_SCALAR(pagePtr); 42010905Sandreas.sandberg@arm.com unserializeSymtab(cp); 4219293Sandreas.hansson@arm.com 4229293Sandreas.hansson@arm.com // also unserialize the memories in the system 42310905Sandreas.sandberg@arm.com physmem.unserializeSection(cp, "physmem"); 4241070SN/A} 4252SN/A 4262SN/Avoid 4278666SPrakash.Ramrakhyani@arm.comSystem::regStats() 4288666SPrakash.Ramrakhyani@arm.com{ 42911522Sstephan.diestelhorst@arm.com MemObject::regStats(); 43011522Sstephan.diestelhorst@arm.com 4318666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds ; j++) { 4328666SPrakash.Ramrakhyani@arm.com workItemStats[j] = new Stats::Histogram(); 4338666SPrakash.Ramrakhyani@arm.com stringstream namestr; 4348666SPrakash.Ramrakhyani@arm.com ccprintf(namestr, "work_item_type%d", j); 4358666SPrakash.Ramrakhyani@arm.com workItemStats[j]->init(20) 4368666SPrakash.Ramrakhyani@arm.com .name(name() + "." + namestr.str()) 4378666SPrakash.Ramrakhyani@arm.com .desc("Run time stat for" + namestr.str()) 4388666SPrakash.Ramrakhyani@arm.com .prereq(*workItemStats[j]); 4398666SPrakash.Ramrakhyani@arm.com } 4408666SPrakash.Ramrakhyani@arm.com} 4418666SPrakash.Ramrakhyani@arm.com 4428666SPrakash.Ramrakhyani@arm.comvoid 4438666SPrakash.Ramrakhyani@arm.comSystem::workItemEnd(uint32_t tid, uint32_t workid) 4448666SPrakash.Ramrakhyani@arm.com{ 4458666SPrakash.Ramrakhyani@arm.com std::pair<uint32_t,uint32_t> p(tid, workid); 4468666SPrakash.Ramrakhyani@arm.com if (!lastWorkItemStarted.count(p)) 4478666SPrakash.Ramrakhyani@arm.com return; 4488666SPrakash.Ramrakhyani@arm.com 4498666SPrakash.Ramrakhyani@arm.com Tick samp = curTick() - lastWorkItemStarted[p]; 4508666SPrakash.Ramrakhyani@arm.com DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); 4518666SPrakash.Ramrakhyani@arm.com 4528666SPrakash.Ramrakhyani@arm.com if (workid >= numWorkIds) 4538666SPrakash.Ramrakhyani@arm.com fatal("Got workid greater than specified in system configuration\n"); 4548666SPrakash.Ramrakhyani@arm.com 4558666SPrakash.Ramrakhyani@arm.com workItemStats[workid]->sample(samp); 4568666SPrakash.Ramrakhyani@arm.com lastWorkItemStarted.erase(p); 4578666SPrakash.Ramrakhyani@arm.com} 4588666SPrakash.Ramrakhyani@arm.com 4598666SPrakash.Ramrakhyani@arm.comvoid 4602SN/ASystem::printSystems() 4612SN/A{ 46210375Sandreas.hansson@arm.com ios::fmtflags flags(cerr.flags()); 46310375Sandreas.hansson@arm.com 4642SN/A vector<System *>::iterator i = systemList.begin(); 4652SN/A vector<System *>::iterator end = systemList.end(); 4662SN/A for (; i != end; ++i) { 4672SN/A System *sys = *i; 4682SN/A cerr << "System " << sys->name() << ": " << hex << sys << endl; 4692SN/A } 47010375Sandreas.hansson@arm.com 47110375Sandreas.hansson@arm.com cerr.flags(flags); 4722SN/A} 4732SN/A 4742SN/Avoid 4752SN/AprintSystems() 4762SN/A{ 4772SN/A System::printSystems(); 4782SN/A} 4792SN/A 4808832SAli.Saidi@ARM.comMasterID 4818832SAli.Saidi@ARM.comSystem::getMasterId(std::string master_name) 4828832SAli.Saidi@ARM.com{ 4838832SAli.Saidi@ARM.com // strip off system name if the string starts with it 4849142Ssteve.reinhardt@amd.com if (startswith(master_name, name())) 4858832SAli.Saidi@ARM.com master_name = master_name.erase(0, name().size() + 1); 4868832SAli.Saidi@ARM.com 4878832SAli.Saidi@ARM.com // CPUs in switch_cpus ask for ids again after switching 4888832SAli.Saidi@ARM.com for (int i = 0; i < masterIds.size(); i++) { 4898832SAli.Saidi@ARM.com if (masterIds[i] == master_name) { 4908832SAli.Saidi@ARM.com return i; 4918832SAli.Saidi@ARM.com } 4928832SAli.Saidi@ARM.com } 4938832SAli.Saidi@ARM.com 4948986SAli.Saidi@ARM.com // Verify that the statistics haven't been enabled yet 4958986SAli.Saidi@ARM.com // Otherwise objects will have sized their stat buckets and 4968986SAli.Saidi@ARM.com // they will be too small 4978832SAli.Saidi@ARM.com 49810367SAndrew.Bardsley@arm.com if (Stats::enabled()) { 49910367SAndrew.Bardsley@arm.com fatal("Can't request a masterId after regStats(). " 50010367SAndrew.Bardsley@arm.com "You must do so in init().\n"); 50110367SAndrew.Bardsley@arm.com } 5028832SAli.Saidi@ARM.com 5038832SAli.Saidi@ARM.com masterIds.push_back(master_name); 5048832SAli.Saidi@ARM.com 5058832SAli.Saidi@ARM.com return masterIds.size() - 1; 5068832SAli.Saidi@ARM.com} 5078832SAli.Saidi@ARM.com 5088832SAli.Saidi@ARM.comstd::string 5098832SAli.Saidi@ARM.comSystem::getMasterName(MasterID master_id) 5108832SAli.Saidi@ARM.com{ 5118832SAli.Saidi@ARM.com if (master_id >= masterIds.size()) 5128832SAli.Saidi@ARM.com fatal("Invalid master_id passed to getMasterName()\n"); 5138832SAli.Saidi@ARM.com 5148832SAli.Saidi@ARM.com return masterIds[master_id]; 5158832SAli.Saidi@ARM.com} 5168832SAli.Saidi@ARM.com 5174762Snate@binkert.orgSystem * 5184762Snate@binkert.orgSystemParams::create() 5192424SN/A{ 5205530Snate@binkert.org return new System(this); 5212424SN/A} 522