sim_object.hh revision 7534
113481Sgiacomo.travaglini@arm.com/* 213481Sgiacomo.travaglini@arm.com * Copyright (c) 2001-2005 The Regents of The University of Michigan 313481Sgiacomo.travaglini@arm.com * Copyright (c) 2010 Advanced Micro Devices, Inc. 413481Sgiacomo.travaglini@arm.com * All rights reserved. 513481Sgiacomo.travaglini@arm.com * 613481Sgiacomo.travaglini@arm.com * Redistribution and use in source and binary forms, with or without 713481Sgiacomo.travaglini@arm.com * modification, are permitted provided that the following conditions are 813481Sgiacomo.travaglini@arm.com * met: redistributions of source code must retain the above copyright 913481Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer; 1013481Sgiacomo.travaglini@arm.com * redistributions in binary form must reproduce the above copyright 1113481Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer in the 1213481Sgiacomo.travaglini@arm.com * documentation and/or other materials provided with the distribution; 1313481Sgiacomo.travaglini@arm.com * neither the name of the copyright holders nor the names of its 1413481Sgiacomo.travaglini@arm.com * contributors may be used to endorse or promote products derived from 1513481Sgiacomo.travaglini@arm.com * this software without specific prior written permission. 1613481Sgiacomo.travaglini@arm.com * 1713481Sgiacomo.travaglini@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1813481Sgiacomo.travaglini@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1913481Sgiacomo.travaglini@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2013481Sgiacomo.travaglini@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2113481Sgiacomo.travaglini@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2213481Sgiacomo.travaglini@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2313481Sgiacomo.travaglini@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2413481Sgiacomo.travaglini@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2513481Sgiacomo.travaglini@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2613481Sgiacomo.travaglini@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2713481Sgiacomo.travaglini@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2813481Sgiacomo.travaglini@arm.com * 2913481Sgiacomo.travaglini@arm.com * Authors: Steve Reinhardt 3013481Sgiacomo.travaglini@arm.com * Nathan Binkert 3113481Sgiacomo.travaglini@arm.com */ 3213481Sgiacomo.travaglini@arm.com 3313481Sgiacomo.travaglini@arm.com/* @file 3413481Sgiacomo.travaglini@arm.com * User Console Definitions 3513481Sgiacomo.travaglini@arm.com */ 3613481Sgiacomo.travaglini@arm.com 3713481Sgiacomo.travaglini@arm.com#ifndef __SIM_OBJECT_HH__ 3813481Sgiacomo.travaglini@arm.com#define __SIM_OBJECT_HH__ 3913481Sgiacomo.travaglini@arm.com 4013481Sgiacomo.travaglini@arm.com#include <iostream> 4113481Sgiacomo.travaglini@arm.com#include <list> 4213481Sgiacomo.travaglini@arm.com#include <map> 4313481Sgiacomo.travaglini@arm.com#include <string> 4413481Sgiacomo.travaglini@arm.com#include <vector> 4513481Sgiacomo.travaglini@arm.com 4613481Sgiacomo.travaglini@arm.com#include "params/SimObject.hh" 4713481Sgiacomo.travaglini@arm.com#include "sim/eventq.hh" 4813481Sgiacomo.travaglini@arm.com#include "sim/serialize.hh" 4913481Sgiacomo.travaglini@arm.com 5013481Sgiacomo.travaglini@arm.comclass BaseCPU; 5113481Sgiacomo.travaglini@arm.comclass Event; 5213481Sgiacomo.travaglini@arm.com 5313481Sgiacomo.travaglini@arm.com/* 5413481Sgiacomo.travaglini@arm.com * Abstract superclass for simulation objects. Represents things that 5513481Sgiacomo.travaglini@arm.com * correspond to physical components and can be specified via the 5613481Sgiacomo.travaglini@arm.com * config file (CPUs, caches, etc.). 5713481Sgiacomo.travaglini@arm.com */ 5813481Sgiacomo.travaglini@arm.comclass SimObject : public EventManager, public Serializable 5913481Sgiacomo.travaglini@arm.com{ 6013481Sgiacomo.travaglini@arm.com public: 6113481Sgiacomo.travaglini@arm.com enum State { 6213481Sgiacomo.travaglini@arm.com Running, 6313481Sgiacomo.travaglini@arm.com Draining, 6413481Sgiacomo.travaglini@arm.com Drained 6513481Sgiacomo.travaglini@arm.com }; 6613481Sgiacomo.travaglini@arm.com 6713481Sgiacomo.travaglini@arm.com private: 6813481Sgiacomo.travaglini@arm.com State state; 6913481Sgiacomo.travaglini@arm.com 7013481Sgiacomo.travaglini@arm.com protected: 7113481Sgiacomo.travaglini@arm.com void changeState(State new_state) { state = new_state; } 7213481Sgiacomo.travaglini@arm.com 7313481Sgiacomo.travaglini@arm.com public: 7413481Sgiacomo.travaglini@arm.com State getState() { return state; } 7513481Sgiacomo.travaglini@arm.com 7613481Sgiacomo.travaglini@arm.com private: 7713481Sgiacomo.travaglini@arm.com typedef std::vector<SimObject *> SimObjectList; 7813481Sgiacomo.travaglini@arm.com 7913481Sgiacomo.travaglini@arm.com // list of all instantiated simulation objects 8013481Sgiacomo.travaglini@arm.com static SimObjectList simObjectList; 8113481Sgiacomo.travaglini@arm.com 8213481Sgiacomo.travaglini@arm.com protected: 8313481Sgiacomo.travaglini@arm.com const SimObjectParams *_params; 8413481Sgiacomo.travaglini@arm.com 8513481Sgiacomo.travaglini@arm.com public: 8613481Sgiacomo.travaglini@arm.com typedef SimObjectParams Params; 8713481Sgiacomo.travaglini@arm.com const Params *params() const { return _params; } 8813481Sgiacomo.travaglini@arm.com SimObject(const Params *_params); 8913481Sgiacomo.travaglini@arm.com virtual ~SimObject() {} 9013481Sgiacomo.travaglini@arm.com 9113481Sgiacomo.travaglini@arm.com public: 9213481Sgiacomo.travaglini@arm.com 9313481Sgiacomo.travaglini@arm.com virtual const std::string name() const { return params()->name; } 94 95 // The following SimObject initialization methods are called from 96 // the instantiate() method in src/python/m5/simulate.py. See 97 // that function for details on how/when these methods are 98 // invoked. 99 100 /** 101 * init() is called after all C++ SimObjects have been created and 102 * all ports are connected. Initializations that are independent 103 * of unserialization but rely on a fully instantiated and 104 * connected SimObject graph should be done here. 105 */ 106 virtual void init(); 107 108 /** 109 * loadState() is called on each SimObject when restoring from a 110 * checkpoint. The default implementation simply calls 111 * unserialize() if there is a corresponding section in the 112 * checkpoint. However, objects can override loadState() to get 113 * other behaviors, e.g., doing other programmed initializations 114 * after unserialize(), or complaining if no checkpoint section is 115 * found. 116 */ 117 virtual void loadState(Checkpoint *cp); 118 119 /** 120 * initState() is called on each SimObject when *not* restoring 121 * from a checkpoint. This provides a hook for state 122 * initializations that are only required for a "cold start". 123 */ 124 virtual void initState(); 125 126 // register statistics for this object 127 virtual void regStats(); 128 virtual void regFormulas(); 129 virtual void resetStats(); 130 131 /** 132 * startup() is the final initialization call before simulation. 133 * All state is initialized (including unserialized state, if any, 134 * such as the curTick value), so this is the appropriate place to 135 * schedule initial event(s) for objects that need them. 136 */ 137 virtual void startup(); 138 139 // static: call nameOut() & serialize() on all SimObjects 140 static void serializeAll(std::ostream &); 141 static void unserializeAll(Checkpoint *cp); 142 143 // Methods to drain objects in order to take checkpoints 144 // Or switch from timing -> atomic memory model 145 // Drain returns 0 if the simobject can drain immediately or 146 // the number of times the drain_event's process function will be called 147 // before the object will be done draining. Normally this should be 1 148 virtual unsigned int drain(Event *drain_event); 149 virtual void resume(); 150 virtual void setMemoryMode(State new_mode); 151 virtual void switchOut(); 152 virtual void takeOverFrom(BaseCPU *cpu); 153 154#ifdef DEBUG 155 public: 156 bool doDebugBreak; 157 static void debugObjectBreak(const std::string &objs); 158#endif 159 160 /** 161 * Find the SimObject with the given name and return a pointer to 162 * it. Primarily used for interactive debugging. Argument is 163 * char* rather than std::string to make it callable from gdb. 164 */ 165 static SimObject *find(const char *name); 166}; 167 168#endif // __SIM_OBJECT_HH__ 169