pseudo_inst.hh revision 9434:987d04d37a77 
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31#ifndef __SIM_PSEUDO_INST_HH__
32#define __SIM_PSEUDO_INST_HH__
33
34class ThreadContext;
35
36//We need the "Tick" and "Addr" data types from here
37#include "base/types.hh"
38
39namespace PseudoInst {
40
41void arm(ThreadContext *tc);
42void quiesce(ThreadContext *tc);
43void quiesceSkip(ThreadContext *tc);
44void quiesceNs(ThreadContext *tc, uint64_t ns);
45void quiesceCycles(ThreadContext *tc, uint64_t cycles);
46uint64_t quiesceTime(ThreadContext *tc);
47uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
48    uint64_t offset);
49uint64_t writefile(ThreadContext *tc, Addr vaddr, uint64_t len,
50    uint64_t offset, Addr filenameAddr);
51void loadsymbol(ThreadContext *xc);
52void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
53uint64_t initParam(ThreadContext *xc);
54uint64_t rpns(ThreadContext *tc);
55void wakeCPU(ThreadContext *tc, uint64_t cpuid);
56void m5exit(ThreadContext *tc, Tick delay);
57void resetstats(ThreadContext *tc, Tick delay, Tick period);
58void dumpstats(ThreadContext *tc, Tick delay, Tick period);
59void dumpresetstats(ThreadContext *tc, Tick delay, Tick period);
60void m5checkpoint(ThreadContext *tc, Tick delay, Tick period);
61void debugbreak(ThreadContext *tc);
62void switchcpu(ThreadContext *tc);
63void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid);
64void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid);
65
66} // namespace PseudoInst
67
68#endif // __SIM_PSEUDO_INST_HH__
69