pseudo_inst.hh revision 8734 
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31#ifndef __SIM_PSEUDO_INST_HH__
32#define __SIM_PSEUDO_INST_HH__
33
34class ThreadContext;
35
36//We need the "Tick" and "Addr" data types from here
37#include "base/types.hh"
38
39namespace PseudoInst {
40
41/**
42 * @todo these externs are only here for a hack in fullCPU::takeOver...
43 */
44extern bool doStatisticsInsts;
45extern bool doCheckpointInsts;
46extern bool doQuiesce;
47
48#if FULL_SYSTEM
49
50void arm(ThreadContext *tc);
51void quiesce(ThreadContext *tc);
52void quiesceSkip(ThreadContext *tc);
53void quiesceNs(ThreadContext *tc, uint64_t ns);
54void quiesceCycles(ThreadContext *tc, uint64_t cycles);
55uint64_t quiesceTime(ThreadContext *tc);
56uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
57    uint64_t offset);
58uint64_t writefile(ThreadContext *tc, Addr vaddr, uint64_t len,
59    uint64_t offset, Addr filenameAddr);
60void loadsymbol(ThreadContext *xc);
61void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
62uint64_t initParam(ThreadContext *xc);
63
64#else
65
66static inline void
67panicFsOnlyPseudoInst(const char *name)
68{
69    panic("Pseudo inst \"%s\" is only available in Full System mode.");
70}
71
72static inline void
73arm(ThreadContext *tc)
74{
75    panicFsOnlyPseudoInst("arm");
76}
77static inline void
78quiesce(ThreadContext *tc)
79{
80    panicFsOnlyPseudoInst("quiesce");
81}
82static inline void
83quiesceSkip(ThreadContext *tc)
84{
85    panicFsOnlyPseudoInst("quiesceSkip");
86}
87static inline void
88quiesceNs(ThreadContext *tc, uint64_t ns)
89{
90    panicFsOnlyPseudoInst("quiesceNs");
91}
92static inline void
93quiesceCycles(ThreadContext *tc, uint64_t cycles)
94{
95    panicFsOnlyPseudoInst("quiesceCycles");
96}
97static inline uint64_t
98quiesceTime(ThreadContext *tc)
99{
100    panicFsOnlyPseudoInst("quiesceTime");
101    return 0;
102}
103static inline uint64_t
104readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
105{
106    panicFsOnlyPseudoInst("readFile");
107    return 0;
108}
109static inline void
110loadsymbol(ThreadContext *xc)
111{
112    panicFsOnlyPseudoInst("loadSymbol");
113}
114static inline void
115addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
116{
117    panicFsOnlyPseudoInst("addSymbol");
118}
119static inline uint64_t
120initParam(ThreadContext *tc)
121{
122    panicFsOnlyPseudoInst("initParam");
123    return 0;
124}
125
126#endif
127
128uint64_t rpns(ThreadContext *tc);
129void wakeCPU(ThreadContext *tc, uint64_t cpuid);
130void m5exit(ThreadContext *tc, Tick delay);
131void resetstats(ThreadContext *tc, Tick delay, Tick period);
132void dumpstats(ThreadContext *tc, Tick delay, Tick period);
133void dumpresetstats(ThreadContext *tc, Tick delay, Tick period);
134void m5checkpoint(ThreadContext *tc, Tick delay, Tick period);
135void debugbreak(ThreadContext *tc);
136void switchcpu(ThreadContext *tc);
137void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid);
138void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid);
139
140} // namespace PseudoInst
141
142#endif // __SIM_PSEUDO_INST_HH__
143