SConscript revision 10458 
14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
234202Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
244202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
254202Sbinkertn@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Nathan Binkert
304202Sbinkertn@umich.edu
314202Sbinkertn@umich.eduImport('*')
324202Sbinkertn@umich.edu
335628Sgblack@eecs.umich.eduSimObject('BaseTLB.py')
344486Sbinkertn@umich.eduSimObject('ClockedObject.py')
354776Sgblack@eecs.umich.eduSimObject('TickedObject.py')
364486Sbinkertn@umich.eduSimObject('Root.py')
374202Sbinkertn@umich.eduSimObject('ClockDomain.py')
384202Sbinkertn@umich.eduSimObject('VoltageDomain.py')
394202Sbinkertn@umich.eduSimObject('System.py')
404202Sbinkertn@umich.eduSimObject('DVFSHandler.py')
415522Snate@binkert.orgSimObject('SubSystem.py')
426143Snate@binkert.org
434202Sbinkertn@umich.eduSource('arguments.cc')
444202Sbinkertn@umich.eduSource('async.cc')
454202Sbinkertn@umich.eduSource('core.cc')
464202Sbinkertn@umich.eduSource('cxx_config.cc')
474202Sbinkertn@umich.eduSource('cxx_manager.cc')
484202Sbinkertn@umich.eduSource('cxx_config_ini.cc')
497768SAli.Saidi@ARM.comSource('debug.cc')
507768SAli.Saidi@ARM.comSource('py_interact.cc', skip_no_python=True)
517768SAli.Saidi@ARM.comSource('eventq.cc')
527768SAli.Saidi@ARM.comSource('global_event.cc')
537768SAli.Saidi@ARM.comSource('init.cc', skip_no_python=True)
547768SAli.Saidi@ARM.comSource('init_signals.cc')
554202Sbinkertn@umich.eduSource('main.cc', main=True, skip_lib=True)
564202Sbinkertn@umich.eduSource('root.cc')
574826Ssaidi@eecs.umich.eduSource('serialize.cc')
587768SAli.Saidi@ARM.comSource('drain.cc')
595016Sgblack@eecs.umich.eduSource('sim_events.cc')
604486Sbinkertn@umich.eduSource('sim_object.cc')
614486Sbinkertn@umich.eduSource('sub_system.cc')
624202Sbinkertn@umich.eduSource('ticked_object.cc')
634202Sbinkertn@umich.eduSource('simulate.cc')
645192Ssaidi@eecs.umich.eduSource('stat_control.cc')
657733SAli.Saidi@ARM.comSource('stat_register.cc', skip_no_python=True)
665192Ssaidi@eecs.umich.eduSource('clock_domain.cc')
675192Ssaidi@eecs.umich.eduSource('voltage_domain.cc')
685192Ssaidi@eecs.umich.eduSource('system.cc')
695192Ssaidi@eecs.umich.eduSource('dvfs_handler.cc')
705192Ssaidi@eecs.umich.edu
715192Ssaidi@eecs.umich.eduif env['TARGET_ISA'] != 'null':
725192Ssaidi@eecs.umich.edu    SimObject('InstTracer.py')
735192Ssaidi@eecs.umich.edu    SimObject('Process.py')
745192Ssaidi@eecs.umich.edu    Source('faults.cc')
755192Ssaidi@eecs.umich.edu    Source('process.cc')
765192Ssaidi@eecs.umich.edu    Source('pseudo_inst.cc')
775192Ssaidi@eecs.umich.edu    Source('syscall_emul.cc')
785192Ssaidi@eecs.umich.edu    Source('tlb.cc')
795192Ssaidi@eecs.umich.edu
80DebugFlag('Checkpoint')
81DebugFlag('Config')
82DebugFlag('CxxConfig')
83DebugFlag('Drain')
84DebugFlag('Event')
85DebugFlag('Fault')
86DebugFlag('Flow')
87DebugFlag('IPI')
88DebugFlag('IPR')
89DebugFlag('Interrupt')
90DebugFlag('Loader')
91DebugFlag('PseudoInst')
92DebugFlag('Stack')
93DebugFlag('SyscallVerbose')
94DebugFlag('TimeSync')
95DebugFlag('TLB')
96DebugFlag('Thread')
97DebugFlag('Timer')
98DebugFlag('VtoPhys')
99DebugFlag('WorkItems')
100DebugFlag('ClockDomain')
101DebugFlag('VoltageDomain')
102DebugFlag('DVFS')
103