SConscript revision 10458
1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright 9# notice, this list of conditions and the following disclaimer; 10# redistributions in binary form must reproduce the above copyright 11# notice, this list of conditions and the following disclaimer in the 12# documentation and/or other materials provided with the distribution; 13# neither the name of the copyright holders nor the names of its 14# contributors may be used to endorse or promote products derived from 15# this software without specific prior written permission. 16# 17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28# 29# Authors: Nathan Binkert 30 31Import('*') 32 33SimObject('BaseTLB.py') 34SimObject('ClockedObject.py') 35SimObject('TickedObject.py') 36SimObject('Root.py') 37SimObject('ClockDomain.py') 38SimObject('VoltageDomain.py') 39SimObject('System.py') 40SimObject('DVFSHandler.py') 41SimObject('SubSystem.py') 42 43Source('arguments.cc') 44Source('async.cc') 45Source('core.cc') 46Source('cxx_config.cc') 47Source('cxx_manager.cc') 48Source('cxx_config_ini.cc') 49Source('debug.cc') 50Source('py_interact.cc', skip_no_python=True) 51Source('eventq.cc') 52Source('global_event.cc') 53Source('init.cc', skip_no_python=True) 54Source('init_signals.cc') 55Source('main.cc', main=True, skip_lib=True) 56Source('root.cc') 57Source('serialize.cc') 58Source('drain.cc') 59Source('sim_events.cc') 60Source('sim_object.cc') 61Source('sub_system.cc') 62Source('ticked_object.cc') 63Source('simulate.cc') 64Source('stat_control.cc') 65Source('stat_register.cc', skip_no_python=True) 66Source('clock_domain.cc') 67Source('voltage_domain.cc') 68Source('system.cc') 69Source('dvfs_handler.cc') 70 71if env['TARGET_ISA'] != 'null': 72 SimObject('InstTracer.py') 73 SimObject('Process.py') 74 Source('faults.cc') 75 Source('process.cc') 76 Source('pseudo_inst.cc') 77 Source('syscall_emul.cc') 78 Source('tlb.cc') 79 80DebugFlag('Checkpoint') 81DebugFlag('Config') 82DebugFlag('CxxConfig') 83DebugFlag('Drain') 84DebugFlag('Event') 85DebugFlag('Fault') 86DebugFlag('Flow') 87DebugFlag('IPI') 88DebugFlag('IPR') 89DebugFlag('Interrupt') 90DebugFlag('Loader') 91DebugFlag('PseudoInst') 92DebugFlag('Stack') 93DebugFlag('SyscallVerbose') 94DebugFlag('TimeSync') 95DebugFlag('TLB') 96DebugFlag('Thread') 97DebugFlag('Timer') 98DebugFlag('VtoPhys') 99DebugFlag('WorkItems') 100DebugFlag('ClockDomain') 101DebugFlag('VoltageDomain') 102DebugFlag('DVFS') 103