1# Copyright (c) 2012, 2015-2016 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Andreas Hansson 37 38from m5.SimObject import SimObject 39from m5.params import * 40from m5.proxy import * 41 42# Enumerate set of allowed power states that can be used by a clocked object. 43# The list is kept generic to express a base minimal set. 44# State definition :- 45# Undefined: Invalid state, no power state derived information is available. 46# On: The logic block is actively running and consuming dynamic and leakage 47# energy depending on the amount of processing required. 48# Clk_gated: The clock circuity within the block is gated to save dynamic 49# energy, the power supply to the block is still on and leakage 50# energy is being consumed by the block. 51# Sram_retention: The SRAMs within the logic blocks are pulled into retention 52# state to reduce leakage energy further. 53# Off: The logic block is power gated and is not consuming any energy. 54class PwrState(Enum): vals = ['UNDEFINED', 55 'ON', 56 'CLK_GATED', 57 'SRAM_RETENTION', 58 'OFF'] 59 60class ClockedObject(SimObject): 61 type = 'ClockedObject' 62 abstract = True 63 cxx_header = "sim/clocked_object.hh" 64 65 # The clock domain this clocked object belongs to, inheriting the 66 # parent's clock domain by default 67 clk_domain = Param.ClockDomain(Parent.clk_domain, "Clock domain") 68 69 # Power model for this ClockedObject 70 power_model = VectorParam.PowerModel([], "Power models") 71 72 # Provide initial power state, should ideally get redefined in startup 73 # routine 74 default_p_state = Param.PwrState("UNDEFINED", "Default Power State") 75 76 p_state_clk_gate_min = Param.Latency('1ns',"Min value of the distribution") 77 p_state_clk_gate_max = Param.Latency('1s',"Max value of the distribution") 78 p_state_clk_gate_bins = Param.Unsigned('20', 79 "# bins in clk gated distribution") 80