1# Copyright (c) 2013-2014 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Vasileios Spiliopoulos
37#          Akash Bagdia
38#          Stephan Diestelhorst
39
40from m5.params import *
41from m5.SimObject import SimObject
42from m5.proxy import *
43
44# Abstract clock domain
45class ClockDomain(SimObject):
46    type = 'ClockDomain'
47    cxx_header = "sim/clock_domain.hh"
48    abstract = True
49
50# Source clock domain with an actual clock, and a list of voltage and frequency
51# op points
52class SrcClockDomain(ClockDomain):
53    type = 'SrcClockDomain'
54    cxx_header = "sim/clock_domain.hh"
55
56    # Single clock frequency value, or list of frequencies for DVFS
57    # Frequencies must be ordered in descending order
58    # Note: Matching voltages should be defined in the voltage domain
59    clock = VectorParam.Clock("Clock period")
60
61    # A source clock must be associated with a voltage domain
62    voltage_domain = Param.VoltageDomain("Voltage domain")
63
64    # Domain ID is an identifier for the DVFS domain as understood by the
65    # necessary control logic (either software or hardware). For example, in
66    # case of software control via cpufreq framework the IDs should correspond
67    # to the neccessary identifier in the device tree blob which is interpretted
68    # by the device driver to communicate to the domain controller in hardware.
69    domain_id = Param.Int32(-1, "domain id")
70
71    # Initial performance level from the list of available operation points
72    # Defaults to maximum performance
73    init_perf_level = Param.UInt32(0, "Initial performance level")
74
75# Derived clock domain with a parent clock domain and a frequency
76# divider
77class DerivedClockDomain(ClockDomain):
78    type = 'DerivedClockDomain'
79    cxx_header = "sim/clock_domain.hh"
80    clk_domain = Param.ClockDomain("Parent clock domain")
81    clk_divider = Param.Unsigned(1, "Frequency divider")
82