dot_writer.py revision 11418:0aeca8f47eac 
1# Copyright (c) 2012-2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Andreas Hansson
37#          Uri Wiener
38#          Sascha Bischoff
39
40#####################################################################
41#
42# System visualization using DOT
43#
44# While config.ini and config.json provide an almost complete listing
45# of a system's components and connectivity, they lack a birds-eye
46# view. The output generated by do_dot() is a DOT-based figure (as a
47# pdf and an editable svg file) and its source dot code. Nodes are
48# components, and edges represent the memory hierarchy: the edges are
49# directed, from a master to slave. Initially all nodes are
50# generated, and then all edges are added. do_dot should be called
51# with the top-most SimObject (namely root but not necessarily), the
52# output folder and the output dot source filename. From the given
53# node, both processes (node and edge creation) is performed
54# recursivly, traversing all children of the given root.
55#
56# pydot is required. When missing, no output will be generated.
57#
58#####################################################################
59
60import m5, os, re
61from m5.SimObject import isRoot, isSimObjectVector
62from m5.params import PortRef
63from m5.util import warn
64try:
65    import pydot
66except:
67    pydot = False
68
69# need to create all nodes (components) before creating edges (memory channels)
70def dot_create_nodes(simNode, callgraph):
71    if isRoot(simNode):
72        label = "root"
73    else:
74        label = simNode._name
75    full_path = re.sub('\.', '_', simNode.path())
76    # add class name under the label
77    label = "\"" + label + " \\n: " + simNode.__class__.__name__ + "\""
78
79    # each component is a sub-graph (cluster)
80    cluster = dot_create_cluster(simNode, full_path, label)
81
82    # create nodes per port
83    for port_name in simNode._ports.keys():
84        port = simNode._port_refs.get(port_name, None)
85        if port != None:
86            full_port_name = full_path + "_" + port_name
87            port_node = dot_create_node(simNode, full_port_name, port_name)
88            cluster.add_node(port_node)
89
90    # recurse to children
91    if simNode._children:
92        for c in simNode._children:
93            child = simNode._children[c]
94            if isSimObjectVector(child):
95                for obj in child:
96                    dot_create_nodes(obj, cluster)
97            else:
98                dot_create_nodes(child, cluster)
99
100    callgraph.add_subgraph(cluster)
101
102# create all edges according to memory hierarchy
103def dot_create_edges(simNode, callgraph):
104    for port_name in simNode._ports.keys():
105        port = simNode._port_refs.get(port_name, None)
106        if port != None:
107            full_path = re.sub('\.', '_', simNode.path())
108            full_port_name = full_path + "_" + port_name
109            port_node = dot_create_node(simNode, full_port_name, port_name)
110            # create edges
111            if isinstance(port, PortRef):
112                dot_add_edge(simNode, callgraph, full_port_name, port)
113            else:
114                for p in port.elements:
115                    dot_add_edge(simNode, callgraph, full_port_name, p)
116
117    # recurse to children
118    if simNode._children:
119        for c in simNode._children:
120            child = simNode._children[c]
121            if isSimObjectVector(child):
122                for obj in child:
123                    dot_create_edges(obj, callgraph)
124            else:
125                dot_create_edges(child, callgraph)
126
127def dot_add_edge(simNode, callgraph, full_port_name, peerPort):
128    if peerPort.role == "MASTER":
129        peer_port_name = re.sub('\.', '_', peerPort.peer.simobj.path() \
130                + "." + peerPort.peer.name)
131        callgraph.add_edge(pydot.Edge(full_port_name, peer_port_name))
132
133def dot_create_cluster(simNode, full_path, label):
134    # get the parameter values of the node and use them as a tooltip
135    ini_strings = []
136    for param in sorted(simNode._params.keys()):
137        value = simNode._values.get(param)
138        if value != None:
139            # parameter name = value in HTML friendly format
140            ini_strings.append(str(param) + "=" +
141                               simNode._values[param].ini_str())
142    # join all the parameters with an HTML newline
143    tooltip = "
".join(ini_strings)
144
145    return pydot.Cluster( \
146                         full_path, \
147                         shape = "Mrecord", \
148                         label = label, \
149                         tooltip = "\"" + tooltip + "\"", \
150                         style = "\"rounded, filled\"", \
151                         color = "#000000", \
152                         fillcolor = dot_gen_colour(simNode), \
153                         fontname = "Arial", \
154                         fontsize = "14", \
155                         fontcolor = "#000000" \
156                         )
157
158def dot_create_node(simNode, full_path, label):
159    return pydot.Node( \
160                         full_path, \
161                         shape = "Mrecord", \
162                         label = label, \
163                         style = "\"rounded, filled\"", \
164                         color = "#000000", \
165                         fillcolor = dot_gen_colour(simNode, True), \
166                         fontname = "Arial", \
167                         fontsize = "14", \
168                         fontcolor = "#000000" \
169                         )
170
171# an enumerator for different kinds of node types, at the moment we
172# discern the majority of node types, with the caches being the
173# notable exception
174class NodeType:
175    SYS = 0
176    CPU = 1
177    XBAR = 2
178    MEM = 3
179    DEV = 4
180    OTHER = 5
181
182# based on the sim object, determine the node type
183def get_node_type(simNode):
184    if isinstance(simNode, m5.objects.System):
185        return NodeType.SYS
186    # NULL ISA has no BaseCPU or PioDevice, so check if these names
187    # exists before using them
188    elif 'BaseCPU' in dir(m5.objects) and \
189            isinstance(simNode, m5.objects.BaseCPU):
190        return NodeType.CPU
191    elif 'PioDevice' in dir(m5.objects) and \
192            isinstance(simNode, m5.objects.PioDevice):
193        return NodeType.DEV
194    elif isinstance(simNode, m5.objects.BaseXBar):
195        return NodeType.XBAR
196    elif isinstance(simNode, m5.objects.AbstractMemory):
197        return NodeType.MEM
198    else:
199        return NodeType.OTHER
200
201# based on the node type, determine the colour as an RGB tuple, the
202# palette is rather arbitrary at this point (some coherent natural
203# tones), and someone that feels artistic should probably have a look
204def get_type_colour(nodeType):
205    if nodeType == NodeType.SYS:
206        return (228, 231, 235)
207    elif nodeType == NodeType.CPU:
208        return (187, 198, 217)
209    elif nodeType == NodeType.XBAR:
210        return (111, 121, 140)
211    elif nodeType == NodeType.MEM:
212        return (94, 89, 88)
213    elif nodeType == NodeType.DEV:
214        return (199, 167, 147)
215    elif nodeType == NodeType.OTHER:
216        # use a relatively gray shade
217        return (186, 182, 174)
218
219# generate colour for a node, either corresponding to a sim object or a
220# port
221def dot_gen_colour(simNode, isPort = False):
222    # determine the type of the current node, and also its parent, if
223    # the node is not the same type as the parent then we use the base
224    # colour for its type
225    node_type = get_node_type(simNode)
226    if simNode._parent:
227        parent_type = get_node_type(simNode._parent)
228    else:
229        parent_type = NodeType.OTHER
230
231    # if this node is the same type as the parent, then scale the
232    # colour based on the depth such that the deeper levels in the
233    # hierarchy get darker colours
234    if node_type == parent_type:
235        # start out with a depth of zero
236        depth = 0
237        parent = simNode._parent
238        # find the closes parent that is not the same type
239        while parent and get_node_type(parent) == parent_type:
240            depth = depth + 1
241            parent = parent._parent
242        node_colour = get_type_colour(parent_type)
243        # slightly arbitrary, but assume that the depth is less than
244        # five levels
245        r, g, b = map(lambda x: x * max(1 - depth / 7.0, 0.3), node_colour)
246    else:
247        node_colour = get_type_colour(node_type)
248        r, g, b = node_colour
249
250    # if we are colouring a port, then make it a slightly darker shade
251    # than the node that encapsulates it, once again use a magic constant
252    if isPort:
253        r, g, b = map(lambda x: 0.8 * x, (r, g, b))
254
255    return dot_rgb_to_html(r, g, b)
256
257def dot_rgb_to_html(r, g, b):
258    return "#%.2x%.2x%.2x" % (r, g, b)
259
260# We need to create all of the clock domains. We abuse the alpha channel to get
261# the correct domain colouring.
262def dot_add_clk_domain(c_dom, v_dom):
263    label = "\"" + str(c_dom) + "\ :\ " + str(v_dom) + "\""
264    label = re.sub('\.', '_', str(label))
265    full_path = re.sub('\.', '_', str(c_dom))
266    return pydot.Cluster( \
267                     full_path, \
268                     shape = "Mrecord", \
269                     label = label, \
270                     style = "\"rounded, filled, dashed\"", \
271                     color = "#000000", \
272                     fillcolor = "#AFC8AF8F", \
273                     fontname = "Arial", \
274                     fontsize = "14", \
275                     fontcolor = "#000000" \
276                     )
277
278def dot_create_dvfs_nodes(simNode, callgraph, domain=None):
279    if isRoot(simNode):
280        label = "root"
281    else:
282        label = simNode._name
283    full_path = re.sub('\.', '_', simNode.path())
284    # add class name under the label
285    label = "\"" + label + " \\n: " + simNode.__class__.__name__ + "\""
286
287    # each component is a sub-graph (cluster)
288    cluster = dot_create_cluster(simNode, full_path, label)
289
290    # create nodes per port
291    for port_name in simNode._ports.keys():
292        port = simNode._port_refs.get(port_name, None)
293        if port != None:
294            full_port_name = full_path + "_" + port_name
295            port_node = dot_create_node(simNode, full_port_name, port_name)
296            cluster.add_node(port_node)
297
298    # Dictionary of DVFS domains
299    dvfs_domains = {}
300
301    # recurse to children
302    if simNode._children:
303        for c in simNode._children:
304            child = simNode._children[c]
305            if isSimObjectVector(child):
306                for obj in child:
307                    try:
308                        c_dom = obj.__getattr__('clk_domain')
309                        v_dom = c_dom.__getattr__('voltage_domain')
310                    except AttributeError:
311                        # Just re-use the domain from above
312                        c_dom = domain
313                        c_dom.__getattr__('voltage_domain')
314                        pass
315
316                    if c_dom == domain or c_dom == None:
317                        dot_create_dvfs_nodes(obj, cluster, domain)
318                    else:
319                        if c_dom not in dvfs_domains:
320                            dvfs_cluster = dot_add_clk_domain(c_dom, v_dom)
321                            dvfs_domains[c_dom] = dvfs_cluster
322                        else:
323                            dvfs_cluster = dvfs_domains[c_dom]
324                        dot_create_dvfs_nodes(obj, dvfs_cluster, c_dom)
325            else:
326                try:
327                    c_dom = child.__getattr__('clk_domain')
328                    v_dom = c_dom.__getattr__('voltage_domain')
329                except AttributeError:
330                    # Just re-use the domain from above
331                    c_dom = domain
332                    c_dom.__getattr__('voltage_domain')
333                    pass
334
335                if c_dom == domain or c_dom == None:
336                    dot_create_dvfs_nodes(child, cluster, domain)
337                else:
338                    if c_dom not in dvfs_domains:
339                        dvfs_cluster = dot_add_clk_domain(c_dom, v_dom)
340                        dvfs_domains[c_dom] = dvfs_cluster
341                    else:
342                        dvfs_cluster = dvfs_domains[c_dom]
343                    dot_create_dvfs_nodes(child, dvfs_cluster, c_dom)
344
345    for key in dvfs_domains:
346        cluster.add_subgraph(dvfs_domains[key])
347
348    callgraph.add_subgraph(cluster)
349
350def do_dot(root, outdir, dotFilename):
351    if not pydot:
352        return
353    # * use ranksep > 1.0 for for vertical separation between nodes
354    # especially useful if you need to annotate edges using e.g. visio
355    # which accepts svg format
356    # * no need for hoizontal separation as nothing moves horizonally
357    callgraph = pydot.Dot(graph_type='digraph', ranksep='1.3')
358    dot_create_nodes(root, callgraph)
359    dot_create_edges(root, callgraph)
360    dot_filename = os.path.join(outdir, dotFilename)
361    callgraph.write(dot_filename)
362    try:
363        # dot crashes if the figure is extremely wide.
364        # So avoid terminating simulation unnecessarily
365        callgraph.write_svg(dot_filename + ".svg")
366        callgraph.write_pdf(dot_filename + ".pdf")
367    except:
368        warn("failed to generate dot output from %s", dot_filename)
369
370def do_dvfs_dot(root, outdir, dotFilename):
371    if not pydot:
372        return
373    dvfsgraph = pydot.Dot(graph_type='digraph', ranksep='1.3')
374    dot_create_dvfs_nodes(root, dvfsgraph)
375    dot_create_edges(root, dvfsgraph)
376    dot_filename = os.path.join(outdir, dotFilename)
377    dvfsgraph.write(dot_filename)
378    try:
379        # dot crashes if the figure is extremely wide.
380        # So avoid terminating simulation unnecessarily
381        dvfsgraph.write_svg(dot_filename + ".svg")
382        dvfsgraph.write_pdf(dot_filename + ".pdf")
383    except:
384        warn("failed to generate dot output from %s", dot_filename)
385