dot_writer.py revision 11418
12155SN/A# Copyright (c) 2012-2013 ARM Limited 22155SN/A# All rights reserved. 32155SN/A# 42155SN/A# The license below extends only to copyright in the software and shall 52155SN/A# not be construed as granting a license to any other intellectual 62155SN/A# property including but not limited to intellectual property relating 72155SN/A# to a hardware implementation of the functionality of the software 82155SN/A# licensed hereunder. You may use the software subject to the license 92155SN/A# terms below provided that you ensure that this notice is replicated 102155SN/A# unmodified and in its entirety in all distributions of the software, 112155SN/A# modified or unmodified, in source code or in binary form. 122155SN/A# 132155SN/A# Redistribution and use in source and binary forms, with or without 142155SN/A# modification, are permitted provided that the following conditions are 152155SN/A# met: redistributions of source code must retain the above copyright 162155SN/A# notice, this list of conditions and the following disclaimer; 172155SN/A# redistributions in binary form must reproduce the above copyright 182155SN/A# notice, this list of conditions and the following disclaimer in the 192155SN/A# documentation and/or other materials provided with the distribution; 202155SN/A# neither the name of the copyright holders nor the names of its 212155SN/A# contributors may be used to endorse or promote products derived from 222155SN/A# this software without specific prior written permission. 232155SN/A# 242155SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 252155SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 262155SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 272155SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 282665Ssaidi@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 292665Ssaidi@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 302155SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 314202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 322155SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 332178SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 342178SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 352178SN/A# 362178SN/A# Authors: Andreas Hansson 372178SN/A# Uri Wiener 382178SN/A# Sascha Bischoff 392178SN/A 402178SN/A##################################################################### 412178SN/A# 422178SN/A# System visualization using DOT 432178SN/A# 442178SN/A# While config.ini and config.json provide an almost complete listing 452155SN/A# of a system's components and connectivity, they lack a birds-eye 462178SN/A# view. The output generated by do_dot() is a DOT-based figure (as a 472155SN/A# pdf and an editable svg file) and its source dot code. Nodes are 482155SN/A# components, and edges represent the memory hierarchy: the edges are 492178SN/A# directed, from a master to slave. Initially all nodes are 502155SN/A# generated, and then all edges are added. do_dot should be called 512155SN/A# with the top-most SimObject (namely root but not necessarily), the 522623SN/A# output folder and the output dot source filename. From the given 533918Ssaidi@eecs.umich.edu# node, both processes (node and edge creation) is performed 542623SN/A# recursivly, traversing all children of the given root. 552623SN/A# 563918Ssaidi@eecs.umich.edu# pydot is required. When missing, no output will be generated. 572155SN/A# 582155SN/A##################################################################### 592292SN/A 603918Ssaidi@eecs.umich.eduimport m5, os, re 612292SN/Afrom m5.SimObject import isRoot, isSimObjectVector 622292SN/Afrom m5.params import PortRef 632292SN/Afrom m5.util import warn 643918Ssaidi@eecs.umich.edutry: 652292SN/A import pydot 662292SN/Aexcept: 672766Sktlim@umich.edu pydot = False 682766Sktlim@umich.edu 692766Sktlim@umich.edu# need to create all nodes (components) before creating edges (memory channels) 702921Sktlim@umich.edudef dot_create_nodes(simNode, callgraph): 712921Sktlim@umich.edu if isRoot(simNode): 722766Sktlim@umich.edu label = "root" 732766Sktlim@umich.edu else: 742766Sktlim@umich.edu label = simNode._name 754762Snate@binkert.org full_path = re.sub('\.', '_', simNode.path()) 762155SN/A # add class name under the label 772155SN/A label = "\"" + label + " \\n: " + simNode.__class__.__name__ + "\"" 782155SN/A 792155SN/A # each component is a sub-graph (cluster) 802155SN/A cluster = dot_create_cluster(simNode, full_path, label) 812155SN/A 822766Sktlim@umich.edu # create nodes per port 832155SN/A for port_name in simNode._ports.keys(): 842623SN/A port = simNode._port_refs.get(port_name, None) 852155SN/A if port != None: 862155SN/A full_port_name = full_path + "_" + port_name 872155SN/A port_node = dot_create_node(simNode, full_port_name, port_name) 882155SN/A cluster.add_node(port_node) 892178SN/A 902178SN/A # recurse to children 912178SN/A if simNode._children: 922766Sktlim@umich.edu for c in simNode._children: 932178SN/A child = simNode._children[c] 942178SN/A if isSimObjectVector(child): 952178SN/A for obj in child: 962178SN/A dot_create_nodes(obj, cluster) 972766Sktlim@umich.edu else: 982766Sktlim@umich.edu dot_create_nodes(child, cluster) 992766Sktlim@umich.edu 1002788Sktlim@umich.edu callgraph.add_subgraph(cluster) 1012178SN/A 1022733Sktlim@umich.edu# create all edges according to memory hierarchy 1032733Sktlim@umich.edudef dot_create_edges(simNode, callgraph): 1042817Sksewell@umich.edu for port_name in simNode._ports.keys(): 1052733Sktlim@umich.edu port = simNode._port_refs.get(port_name, None) 1064486Sbinkertn@umich.edu if port != None: 1074486Sbinkertn@umich.edu full_path = re.sub('\.', '_', simNode.path()) 1084776Sgblack@eecs.umich.edu full_port_name = full_path + "_" + port_name 1094776Sgblack@eecs.umich.edu port_node = dot_create_node(simNode, full_port_name, port_name) 1104486Sbinkertn@umich.edu # create edges 1114202Sbinkertn@umich.edu if isinstance(port, PortRef): 1124202Sbinkertn@umich.edu dot_add_edge(simNode, callgraph, full_port_name, port) 1134202Sbinkertn@umich.edu else: 1144202Sbinkertn@umich.edu for p in port.elements: 1154202Sbinkertn@umich.edu dot_add_edge(simNode, callgraph, full_port_name, p) 1164776Sgblack@eecs.umich.edu 1174202Sbinkertn@umich.edu # recurse to children 1184202Sbinkertn@umich.edu if simNode._children: 1194202Sbinkertn@umich.edu for c in simNode._children: 1204202Sbinkertn@umich.edu child = simNode._children[c] 1215217Ssaidi@eecs.umich.edu if isSimObjectVector(child): 1224202Sbinkertn@umich.edu for obj in child: 1232155SN/A dot_create_edges(obj, callgraph) 1244202Sbinkertn@umich.edu else: 1254486Sbinkertn@umich.edu dot_create_edges(child, callgraph) 1264486Sbinkertn@umich.edu 1274202Sbinkertn@umich.edudef dot_add_edge(simNode, callgraph, full_port_name, peerPort): 1284202Sbinkertn@umich.edu if peerPort.role == "MASTER": 1292821Sktlim@umich.edu peer_port_name = re.sub('\.', '_', peerPort.peer.simobj.path() \ 1304776Sgblack@eecs.umich.edu + "." + peerPort.peer.name) 1314776Sgblack@eecs.umich.edu callgraph.add_edge(pydot.Edge(full_port_name, peer_port_name)) 1324776Sgblack@eecs.umich.edu 1334776Sgblack@eecs.umich.edudef dot_create_cluster(simNode, full_path, label): 1344776Sgblack@eecs.umich.edu # get the parameter values of the node and use them as a tooltip 1354776Sgblack@eecs.umich.edu ini_strings = [] 1364776Sgblack@eecs.umich.edu for param in sorted(simNode._params.keys()): 1374776Sgblack@eecs.umich.edu value = simNode._values.get(param) 1382766Sktlim@umich.edu if value != None: 1394202Sbinkertn@umich.edu # parameter name = value in HTML friendly format 1405192Ssaidi@eecs.umich.edu ini_strings.append(str(param) + "=" + 1412733Sktlim@umich.edu simNode._values[param].ini_str()) 1422733Sktlim@umich.edu # join all the parameters with an HTML newline 1432733Sktlim@umich.edu tooltip = " ".join(ini_strings) 1442733Sktlim@umich.edu 1452733Sktlim@umich.edu return pydot.Cluster( \ 1462874Sktlim@umich.edu full_path, \ 1472874Sktlim@umich.edu shape = "Mrecord", \ 1482874Sktlim@umich.edu label = label, \ 1494202Sbinkertn@umich.edu tooltip = "\"" + tooltip + "\"", \ 1502733Sktlim@umich.edu style = "\"rounded, filled\"", \ 1515192Ssaidi@eecs.umich.edu color = "#000000", \ 1525192Ssaidi@eecs.umich.edu fillcolor = dot_gen_colour(simNode), \ 1535192Ssaidi@eecs.umich.edu fontname = "Arial", \ 1545217Ssaidi@eecs.umich.edu fontsize = "14", \ 1555192Ssaidi@eecs.umich.edu fontcolor = "#000000" \ 1565192Ssaidi@eecs.umich.edu ) 1575192Ssaidi@eecs.umich.edu 1585192Ssaidi@eecs.umich.edudef dot_create_node(simNode, full_path, label): 1595192Ssaidi@eecs.umich.edu return pydot.Node( \ 1605192Ssaidi@eecs.umich.edu full_path, \ 1615192Ssaidi@eecs.umich.edu shape = "Mrecord", \ 1625192Ssaidi@eecs.umich.edu label = label, \ 1635192Ssaidi@eecs.umich.edu style = "\"rounded, filled\"", \ 1645192Ssaidi@eecs.umich.edu color = "#000000", \ 1655192Ssaidi@eecs.umich.edu fillcolor = dot_gen_colour(simNode, True), \ 1665192Ssaidi@eecs.umich.edu fontname = "Arial", \ 1675192Ssaidi@eecs.umich.edu fontsize = "14", \ 1685192Ssaidi@eecs.umich.edu fontcolor = "#000000" \ 1695192Ssaidi@eecs.umich.edu ) 1705192Ssaidi@eecs.umich.edu 1715192Ssaidi@eecs.umich.edu# an enumerator for different kinds of node types, at the moment we 1725192Ssaidi@eecs.umich.edu# discern the majority of node types, with the caches being the 1735192Ssaidi@eecs.umich.edu# notable exception 1745192Ssaidi@eecs.umich.educlass NodeType: 175 SYS = 0 176 CPU = 1 177 XBAR = 2 178 MEM = 3 179 DEV = 4 180 OTHER = 5 181 182# based on the sim object, determine the node type 183def get_node_type(simNode): 184 if isinstance(simNode, m5.objects.System): 185 return NodeType.SYS 186 # NULL ISA has no BaseCPU or PioDevice, so check if these names 187 # exists before using them 188 elif 'BaseCPU' in dir(m5.objects) and \ 189 isinstance(simNode, m5.objects.BaseCPU): 190 return NodeType.CPU 191 elif 'PioDevice' in dir(m5.objects) and \ 192 isinstance(simNode, m5.objects.PioDevice): 193 return NodeType.DEV 194 elif isinstance(simNode, m5.objects.BaseXBar): 195 return NodeType.XBAR 196 elif isinstance(simNode, m5.objects.AbstractMemory): 197 return NodeType.MEM 198 else: 199 return NodeType.OTHER 200 201# based on the node type, determine the colour as an RGB tuple, the 202# palette is rather arbitrary at this point (some coherent natural 203# tones), and someone that feels artistic should probably have a look 204def get_type_colour(nodeType): 205 if nodeType == NodeType.SYS: 206 return (228, 231, 235) 207 elif nodeType == NodeType.CPU: 208 return (187, 198, 217) 209 elif nodeType == NodeType.XBAR: 210 return (111, 121, 140) 211 elif nodeType == NodeType.MEM: 212 return (94, 89, 88) 213 elif nodeType == NodeType.DEV: 214 return (199, 167, 147) 215 elif nodeType == NodeType.OTHER: 216 # use a relatively gray shade 217 return (186, 182, 174) 218 219# generate colour for a node, either corresponding to a sim object or a 220# port 221def dot_gen_colour(simNode, isPort = False): 222 # determine the type of the current node, and also its parent, if 223 # the node is not the same type as the parent then we use the base 224 # colour for its type 225 node_type = get_node_type(simNode) 226 if simNode._parent: 227 parent_type = get_node_type(simNode._parent) 228 else: 229 parent_type = NodeType.OTHER 230 231 # if this node is the same type as the parent, then scale the 232 # colour based on the depth such that the deeper levels in the 233 # hierarchy get darker colours 234 if node_type == parent_type: 235 # start out with a depth of zero 236 depth = 0 237 parent = simNode._parent 238 # find the closes parent that is not the same type 239 while parent and get_node_type(parent) == parent_type: 240 depth = depth + 1 241 parent = parent._parent 242 node_colour = get_type_colour(parent_type) 243 # slightly arbitrary, but assume that the depth is less than 244 # five levels 245 r, g, b = map(lambda x: x * max(1 - depth / 7.0, 0.3), node_colour) 246 else: 247 node_colour = get_type_colour(node_type) 248 r, g, b = node_colour 249 250 # if we are colouring a port, then make it a slightly darker shade 251 # than the node that encapsulates it, once again use a magic constant 252 if isPort: 253 r, g, b = map(lambda x: 0.8 * x, (r, g, b)) 254 255 return dot_rgb_to_html(r, g, b) 256 257def dot_rgb_to_html(r, g, b): 258 return "#%.2x%.2x%.2x" % (r, g, b) 259 260# We need to create all of the clock domains. We abuse the alpha channel to get 261# the correct domain colouring. 262def dot_add_clk_domain(c_dom, v_dom): 263 label = "\"" + str(c_dom) + "\ :\ " + str(v_dom) + "\"" 264 label = re.sub('\.', '_', str(label)) 265 full_path = re.sub('\.', '_', str(c_dom)) 266 return pydot.Cluster( \ 267 full_path, \ 268 shape = "Mrecord", \ 269 label = label, \ 270 style = "\"rounded, filled, dashed\"", \ 271 color = "#000000", \ 272 fillcolor = "#AFC8AF8F", \ 273 fontname = "Arial", \ 274 fontsize = "14", \ 275 fontcolor = "#000000" \ 276 ) 277 278def dot_create_dvfs_nodes(simNode, callgraph, domain=None): 279 if isRoot(simNode): 280 label = "root" 281 else: 282 label = simNode._name 283 full_path = re.sub('\.', '_', simNode.path()) 284 # add class name under the label 285 label = "\"" + label + " \\n: " + simNode.__class__.__name__ + "\"" 286 287 # each component is a sub-graph (cluster) 288 cluster = dot_create_cluster(simNode, full_path, label) 289 290 # create nodes per port 291 for port_name in simNode._ports.keys(): 292 port = simNode._port_refs.get(port_name, None) 293 if port != None: 294 full_port_name = full_path + "_" + port_name 295 port_node = dot_create_node(simNode, full_port_name, port_name) 296 cluster.add_node(port_node) 297 298 # Dictionary of DVFS domains 299 dvfs_domains = {} 300 301 # recurse to children 302 if simNode._children: 303 for c in simNode._children: 304 child = simNode._children[c] 305 if isSimObjectVector(child): 306 for obj in child: 307 try: 308 c_dom = obj.__getattr__('clk_domain') 309 v_dom = c_dom.__getattr__('voltage_domain') 310 except AttributeError: 311 # Just re-use the domain from above 312 c_dom = domain 313 c_dom.__getattr__('voltage_domain') 314 pass 315 316 if c_dom == domain or c_dom == None: 317 dot_create_dvfs_nodes(obj, cluster, domain) 318 else: 319 if c_dom not in dvfs_domains: 320 dvfs_cluster = dot_add_clk_domain(c_dom, v_dom) 321 dvfs_domains[c_dom] = dvfs_cluster 322 else: 323 dvfs_cluster = dvfs_domains[c_dom] 324 dot_create_dvfs_nodes(obj, dvfs_cluster, c_dom) 325 else: 326 try: 327 c_dom = child.__getattr__('clk_domain') 328 v_dom = c_dom.__getattr__('voltage_domain') 329 except AttributeError: 330 # Just re-use the domain from above 331 c_dom = domain 332 c_dom.__getattr__('voltage_domain') 333 pass 334 335 if c_dom == domain or c_dom == None: 336 dot_create_dvfs_nodes(child, cluster, domain) 337 else: 338 if c_dom not in dvfs_domains: 339 dvfs_cluster = dot_add_clk_domain(c_dom, v_dom) 340 dvfs_domains[c_dom] = dvfs_cluster 341 else: 342 dvfs_cluster = dvfs_domains[c_dom] 343 dot_create_dvfs_nodes(child, dvfs_cluster, c_dom) 344 345 for key in dvfs_domains: 346 cluster.add_subgraph(dvfs_domains[key]) 347 348 callgraph.add_subgraph(cluster) 349 350def do_dot(root, outdir, dotFilename): 351 if not pydot: 352 return 353 # * use ranksep > 1.0 for for vertical separation between nodes 354 # especially useful if you need to annotate edges using e.g. visio 355 # which accepts svg format 356 # * no need for hoizontal separation as nothing moves horizonally 357 callgraph = pydot.Dot(graph_type='digraph', ranksep='1.3') 358 dot_create_nodes(root, callgraph) 359 dot_create_edges(root, callgraph) 360 dot_filename = os.path.join(outdir, dotFilename) 361 callgraph.write(dot_filename) 362 try: 363 # dot crashes if the figure is extremely wide. 364 # So avoid terminating simulation unnecessarily 365 callgraph.write_svg(dot_filename + ".svg") 366 callgraph.write_pdf(dot_filename + ".pdf") 367 except: 368 warn("failed to generate dot output from %s", dot_filename) 369 370def do_dvfs_dot(root, outdir, dotFilename): 371 if not pydot: 372 return 373 dvfsgraph = pydot.Dot(graph_type='digraph', ranksep='1.3') 374 dot_create_dvfs_nodes(root, dvfsgraph) 375 dot_create_edges(root, dvfsgraph) 376 dot_filename = os.path.join(outdir, dotFilename) 377 dvfsgraph.write(dot_filename) 378 try: 379 # dot crashes if the figure is extremely wide. 380 # So avoid terminating simulation unnecessarily 381 dvfsgraph.write_svg(dot_filename + ".svg") 382 dvfsgraph.write_pdf(dot_filename + ".pdf") 383 except: 384 warn("failed to generate dot output from %s", dot_filename) 385