111807Snikos.nikoleris@arm.com// Copyright (c) 2014,2017 ARM Limited
210695SAli.Saidi@ARM.com// All rights reserved
310695SAli.Saidi@ARM.com//
410695SAli.Saidi@ARM.com// The license below extends only to copyright in the software and shall
510695SAli.Saidi@ARM.com// not be construed as granting a license to any other intellectual
610695SAli.Saidi@ARM.com// property including but not limited to intellectual property relating
710695SAli.Saidi@ARM.com// to a hardware implementation of the functionality of the software
810695SAli.Saidi@ARM.com// licensed hereunder.  You may use the software subject to the license
910695SAli.Saidi@ARM.com// terms below provided that you ensure that this notice is replicated
1010695SAli.Saidi@ARM.com// unmodified and in its entirety in all distributions of the software,
1110695SAli.Saidi@ARM.com// modified or unmodified, in source code or in binary form.
1210695SAli.Saidi@ARM.com//
1310695SAli.Saidi@ARM.com// Redistribution and use in source and binary forms, with or without
1410695SAli.Saidi@ARM.com// modification, are permitted provided that the following conditions are
1510695SAli.Saidi@ARM.com// met: redistributions of source code must retain the above copyright
1610695SAli.Saidi@ARM.com// notice, this list of conditions and the following disclaimer;
1710695SAli.Saidi@ARM.com// redistributions in binary form must reproduce the above copyright
1810695SAli.Saidi@ARM.com// notice, this list of conditions and the following disclaimer in the
1910695SAli.Saidi@ARM.com// documentation and/or other materials provided with the distribution;
2010695SAli.Saidi@ARM.com// neither the name of the copyright holders nor the names of its
2110695SAli.Saidi@ARM.com// contributors may be used to endorse or promote products derived from
2210695SAli.Saidi@ARM.com// this software without specific prior written permission.
2310695SAli.Saidi@ARM.com//
2410695SAli.Saidi@ARM.com// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
2510695SAli.Saidi@ARM.com// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2610695SAli.Saidi@ARM.com// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2710695SAli.Saidi@ARM.com// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2810695SAli.Saidi@ARM.com// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2910695SAli.Saidi@ARM.com// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
3010695SAli.Saidi@ARM.com// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
3110695SAli.Saidi@ARM.com// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
3210695SAli.Saidi@ARM.com// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3310695SAli.Saidi@ARM.com// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3410695SAli.Saidi@ARM.com// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3510695SAli.Saidi@ARM.com//
3610695SAli.Saidi@ARM.com// Authors: Ali Saidi
3710695SAli.Saidi@ARM.com
3811807Snikos.nikoleris@arm.comsyntax = "proto2";
3910695SAli.Saidi@ARM.com
4010695SAli.Saidi@ARM.com// Put all the generated messages in a namespace
4110695SAli.Saidi@ARM.compackage ProtoMessage;
4210695SAli.Saidi@ARM.com
4310695SAli.Saidi@ARM.com// Packet header with the identifier describing what object captured
4410695SAli.Saidi@ARM.com// the trace, the version of this file format, and the tick frequency
4510695SAli.Saidi@ARM.com// for all the packet time stamps.
4610695SAli.Saidi@ARM.commessage InstHeader {
4710695SAli.Saidi@ARM.com  required string obj_id = 1;
4810695SAli.Saidi@ARM.com  required uint32 ver = 2 [default = 0];
4910695SAli.Saidi@ARM.com  required uint64 tick_freq = 3;
5010695SAli.Saidi@ARM.com  required bool has_mem = 4;
5110695SAli.Saidi@ARM.com}
5210695SAli.Saidi@ARM.com
5310695SAli.Saidi@ARM.commessage Inst {
5410695SAli.Saidi@ARM.com  required uint64 pc = 1;
5512618Sgabeblack@google.com
5612618Sgabeblack@google.com  // Either inst or inst_bytes must be used, but never both. That should be
5712618Sgabeblack@google.com  // enforced by the oneof keyword, but that's not supported in all versions
5812618Sgabeblack@google.com  // of protobuf syntax we need to work with for now.
5912618Sgabeblack@google.com  optional fixed32 inst = 2;
6012618Sgabeblack@google.com  optional bytes inst_bytes = 9;
6112618Sgabeblack@google.com
6210695SAli.Saidi@ARM.com  optional uint32 nodeid = 3;
6310695SAli.Saidi@ARM.com  optional uint32 cpuid = 4;
6410695SAli.Saidi@ARM.com  optional fixed64 tick = 5;
6510695SAli.Saidi@ARM.com
6610695SAli.Saidi@ARM.com  enum InstType {
6710695SAli.Saidi@ARM.com    None = 0;
6810695SAli.Saidi@ARM.com    IntAlu = 1;
6910695SAli.Saidi@ARM.com    IntMul = 2;
7010695SAli.Saidi@ARM.com    IntDiv = 3;
7110695SAli.Saidi@ARM.com    FloatAdd = 4;
7210695SAli.Saidi@ARM.com    FloatCmp = 5;
7310695SAli.Saidi@ARM.com    FloatCvt = 6;
7410695SAli.Saidi@ARM.com    FloatMult = 7;
7510695SAli.Saidi@ARM.com    FloatDiv = 8;
7610695SAli.Saidi@ARM.com    FloatSqrt = 9;
7710695SAli.Saidi@ARM.com    SIMDIntAdd = 10;
7810695SAli.Saidi@ARM.com    SIMDIntAddAcc = 11;
7910695SAli.Saidi@ARM.com    SIMDIntAlu = 12;
8010695SAli.Saidi@ARM.com    SIMDIntCmp = 13;
8110695SAli.Saidi@ARM.com    SIMDIntCvt = 14;
8210695SAli.Saidi@ARM.com    SIMDMisc = 15;
8310695SAli.Saidi@ARM.com    SIMDIntMult = 16;
8410695SAli.Saidi@ARM.com    SIMDIntMultAcc = 17;
8510695SAli.Saidi@ARM.com    SIMDIntShift = 18;
8610695SAli.Saidi@ARM.com    SIMDIntShiftAcc = 19;
8710695SAli.Saidi@ARM.com    SIMDSqrt = 20;
8810695SAli.Saidi@ARM.com    SIMDFloatAdd = 21;
8910695SAli.Saidi@ARM.com    SIMDFloatAlu = 22;
9010695SAli.Saidi@ARM.com    SIMDFloatCmp = 23;
9110695SAli.Saidi@ARM.com    SIMDFloatCvt = 24;
9210695SAli.Saidi@ARM.com    SIMDFloatDiv = 25;
9310695SAli.Saidi@ARM.com    SIMDFloatMisc = 26;
9410695SAli.Saidi@ARM.com    SIMDFloatMult = 27;
9510695SAli.Saidi@ARM.com    SIMDFloatMultAdd = 28;
9610695SAli.Saidi@ARM.com    SIMDFloatSqrt = 29;
9710695SAli.Saidi@ARM.com    MemRead = 30;
9810695SAli.Saidi@ARM.com    MemWrite = 31;
9910695SAli.Saidi@ARM.com    IprAccess = 32;
10010695SAli.Saidi@ARM.com    InstPrefetch = 33;
10110695SAli.Saidi@ARM.com  }
10210695SAli.Saidi@ARM.com
10310695SAli.Saidi@ARM.com  optional InstType type = 6; // add, mul, fp add, load, store, simd add, …
10412619Sgabeblack@google.com
10512619Sgabeblack@google.com  // Deprecated:
10610695SAli.Saidi@ARM.com  optional uint32 inst_flags = 7; // execution mode information
10710695SAli.Saidi@ARM.com
10810695SAli.Saidi@ARM.com  // If the operation does one or more memory accesses
10910695SAli.Saidi@ARM.com  message MemAccess {
11010695SAli.Saidi@ARM.com      required uint64 addr = 1;
11110695SAli.Saidi@ARM.com      required uint32 size = 2;
11210695SAli.Saidi@ARM.com      optional uint32 mem_flags = 3;
11310695SAli.Saidi@ARM.com  }
11410695SAli.Saidi@ARM.com  repeated MemAccess mem_access = 8;
11510695SAli.Saidi@ARM.com}
11610695SAli.Saidi@ARM.com
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