1// Copyright (c) 2014,2017 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder.  You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated
10// unmodified and in its entirety in all distributions of the software,
11// modified or unmodified, in source code or in binary form.
12//
13// Redistribution and use in source and binary forms, with or without
14// modification, are permitted provided that the following conditions are
15// met: redistributions of source code must retain the above copyright
16// notice, this list of conditions and the following disclaimer;
17// redistributions in binary form must reproduce the above copyright
18// notice, this list of conditions and the following disclaimer in the
19// documentation and/or other materials provided with the distribution;
20// neither the name of the copyright holders nor the names of its
21// contributors may be used to endorse or promote products derived from
22// this software without specific prior written permission.
23//
24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35//
36// Authors: Ali Saidi
37
38syntax = "proto2";
39
40// Put all the generated messages in a namespace
41package ProtoMessage;
42
43// Packet header with the identifier describing what object captured
44// the trace, the version of this file format, and the tick frequency
45// for all the packet time stamps.
46message InstHeader {
47  required string obj_id = 1;
48  required uint32 ver = 2 [default = 0];
49  required uint64 tick_freq = 3;
50  required bool has_mem = 4;
51}
52
53message Inst {
54  required uint64 pc = 1;
55
56  // Either inst or inst_bytes must be used, but never both. That should be
57  // enforced by the oneof keyword, but that's not supported in all versions
58  // of protobuf syntax we need to work with for now.
59  optional fixed32 inst = 2;
60  optional bytes inst_bytes = 9;
61
62  optional uint32 nodeid = 3;
63  optional uint32 cpuid = 4;
64  optional fixed64 tick = 5;
65
66  enum InstType {
67    None = 0;
68    IntAlu = 1;
69    IntMul = 2;
70    IntDiv = 3;
71    FloatAdd = 4;
72    FloatCmp = 5;
73    FloatCvt = 6;
74    FloatMult = 7;
75    FloatDiv = 8;
76    FloatSqrt = 9;
77    SIMDIntAdd = 10;
78    SIMDIntAddAcc = 11;
79    SIMDIntAlu = 12;
80    SIMDIntCmp = 13;
81    SIMDIntCvt = 14;
82    SIMDMisc = 15;
83    SIMDIntMult = 16;
84    SIMDIntMultAcc = 17;
85    SIMDIntShift = 18;
86    SIMDIntShiftAcc = 19;
87    SIMDSqrt = 20;
88    SIMDFloatAdd = 21;
89    SIMDFloatAlu = 22;
90    SIMDFloatCmp = 23;
91    SIMDFloatCvt = 24;
92    SIMDFloatDiv = 25;
93    SIMDFloatMisc = 26;
94    SIMDFloatMult = 27;
95    SIMDFloatMultAdd = 28;
96    SIMDFloatSqrt = 29;
97    MemRead = 30;
98    MemWrite = 31;
99    IprAccess = 32;
100    InstPrefetch = 33;
101  }
102
103  optional InstType type = 6; // add, mul, fp add, load, store, simd add, …
104
105  // Deprecated:
106  optional uint32 inst_flags = 7; // execution mode information
107
108  // If the operation does one or more memory accesses
109  message MemAccess {
110      required uint64 addr = 1;
111      required uint32 size = 2;
112      optional uint32 mem_flags = 3;
113  }
114  repeated MemAccess mem_access = 8;
115}
116
117