simple_mem.hh revision 5399
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IN NO EVENT SHALL THE COPYRIGHT 202650Ssaidi@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212650Ssaidi@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222650Ssaidi@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232650Ssaidi@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242650Ssaidi@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252650Ssaidi@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262650Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 284070Ssaidi@eecs.umich.edu * Authors: Ron Dreslinski 292650Ssaidi@eecs.umich.edu */ 302650Ssaidi@eecs.umich.edu 312650Ssaidi@eecs.umich.edu/* @file 322650Ssaidi@eecs.umich.edu */ 333529Sgblack@eecs.umich.edu 344070Ssaidi@eecs.umich.edu#ifndef __PHYSICAL_MEMORY_HH__ 354070Ssaidi@eecs.umich.edu#define __PHYSICAL_MEMORY_HH__ 362650Ssaidi@eecs.umich.edu 372650Ssaidi@eecs.umich.edu#include <map> 382680Sktlim@umich.edu#include <string> 392650Ssaidi@eecs.umich.edu 402650Ssaidi@eecs.umich.edu#include "base/range.hh" 412650Ssaidi@eecs.umich.edu#include "mem/mem_object.hh" 422650Ssaidi@eecs.umich.edu#include "mem/packet.hh" 435560Snate@binkert.org#include "mem/tport.hh" 445560Snate@binkert.org#include "params/PhysicalMemory.hh" 455560Snate@binkert.org#include "sim/eventq.hh" 465560Snate@binkert.org 472650Ssaidi@eecs.umich.edu// 485560Snate@binkert.org// Functional model for a contiguous block of physical memory. (i.e. RAM) 495560Snate@binkert.org// 505560Snate@binkert.orgclass PhysicalMemory : public MemObject 515560Snate@binkert.org{ 525560Snate@binkert.org class MemoryPort : public SimpleTimingPort 534070Ssaidi@eecs.umich.edu { 545560Snate@binkert.org PhysicalMemory *memory; 555560Snate@binkert.org 565560Snate@binkert.org public: 575560Snate@binkert.org 585560Snate@binkert.org MemoryPort(const std::string &_name, PhysicalMemory *_memory); 595560Snate@binkert.org 605560Snate@binkert.org protected: 615560Snate@binkert.org 625560Snate@binkert.org virtual Tick recvAtomic(PacketPtr pkt); 635560Snate@binkert.org 645560Snate@binkert.org virtual void recvFunctional(PacketPtr pkt); 655560Snate@binkert.org 665560Snate@binkert.org virtual void recvStatusChange(Status status); 675560Snate@binkert.org 685560Snate@binkert.org virtual void getDeviceAddressRanges(AddrRangeList &resp, 695560Snate@binkert.org bool &snoop); 705560Snate@binkert.org 715560Snate@binkert.org virtual int deviceBlockSize(); 725560Snate@binkert.org }; 735560Snate@binkert.org 745560Snate@binkert.org int numPorts; 755560Snate@binkert.org 765560Snate@binkert.org 775560Snate@binkert.org private: 785560Snate@binkert.org // prevent copying of a MainMemory object 795560Snate@binkert.org PhysicalMemory(const PhysicalMemory &specmem); 805560Snate@binkert.org const PhysicalMemory &operator=(const PhysicalMemory &specmem); 815560Snate@binkert.org 825560Snate@binkert.org protected: 835560Snate@binkert.org 846022Sgblack@eecs.umich.edu class LockedAddr { 856022Sgblack@eecs.umich.edu public: 865560Snate@binkert.org // on alpha, minimum LL/SC granularity is 16 bytes, so lower 875560Snate@binkert.org // bits need to masked off. 885560Snate@binkert.org static const Addr Addr_Mask = 0xf; 895560Snate@binkert.org 905560Snate@binkert.org static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 915560Snate@binkert.org 925560Snate@binkert.org Addr addr; // locked address 935560Snate@binkert.org int cpuNum; // locking CPU 945560Snate@binkert.org int threadNum; // locking thread ID within CPU 955560Snate@binkert.org 965560Snate@binkert.org // check for matching execution context 975560Snate@binkert.org bool matchesContext(Request *req) 985560Snate@binkert.org { 995560Snate@binkert.org return (cpuNum == req->getCpuNum() && 1005560Snate@binkert.org threadNum == req->getThreadNum()); 1015560Snate@binkert.org } 1025560Snate@binkert.org 1035560Snate@binkert.org LockedAddr(Request *req) 1045560Snate@binkert.org : addr(mask(req->getPaddr())), 1055560Snate@binkert.org cpuNum(req->getCpuNum()), 1065560Snate@binkert.org threadNum(req->getThreadNum()) 1075560Snate@binkert.org { 1085560Snate@binkert.org } 1095560Snate@binkert.org }; 1105560Snate@binkert.org 1115560Snate@binkert.org std::list<LockedAddr> lockedAddrList; 1125560Snate@binkert.org 1135560Snate@binkert.org // helper function for checkLockedAddrs(): we really want to 1145560Snate@binkert.org // inline a quick check for an empty locked addr list (hopefully 1155560Snate@binkert.org // the common case), and do the full list search (if necessary) in 1165560Snate@binkert.org // this out-of-line function 1175560Snate@binkert.org bool checkLockedAddrList(PacketPtr pkt); 1185560Snate@binkert.org 1195560Snate@binkert.org // Record the address of a load-locked operation so that we can 1205560Snate@binkert.org // clear the execution context's lock flag if a matching store is 1212650Ssaidi@eecs.umich.edu // performed 1225560Snate@binkert.org void trackLoadLocked(PacketPtr pkt); 1232650Ssaidi@eecs.umich.edu 1245560Snate@binkert.org // Compare a store address with any locked addresses so we can 1255560Snate@binkert.org // clear the lock flag appropriately. Return value set to 'false' 1265560Snate@binkert.org // if store operation should be suppressed (because it was a 1275560Snate@binkert.org // conditional store and the address was no longer locked by the 1285560Snate@binkert.org // requesting execution context), 'true' otherwise. Note that 1295560Snate@binkert.org // this method must be called on *all* stores since even 1305560Snate@binkert.org // non-conditional stores must clear any matching lock addresses. 1312650Ssaidi@eecs.umich.edu bool writeOK(PacketPtr pkt) { 1325560Snate@binkert.org Request *req = pkt->req; 133 if (lockedAddrList.empty()) { 134 // no locked addrs: nothing to check, store_conditional fails 135 bool isLocked = pkt->isLocked(); 136 if (isLocked) { 137 req->setExtraData(0); 138 } 139 return !isLocked; // only do write if not an sc 140 } else { 141 // iterate over list... 142 return checkLockedAddrList(pkt); 143 } 144 } 145 146 uint8_t *pmemAddr; 147 int pagePtr; 148 Tick lat; 149 Tick lat_var; 150 std::vector<MemoryPort*> ports; 151 typedef std::vector<MemoryPort*>::iterator PortIterator; 152 153 uint64_t cachedSize; 154 uint64_t cachedStart; 155 public: 156 Addr new_page(); 157 uint64_t size() { return cachedSize; } 158 uint64_t start() { return cachedStart; } 159 160 public: 161 typedef PhysicalMemoryParams Params; 162 PhysicalMemory(const Params *p); 163 virtual ~PhysicalMemory(); 164 165 const Params * 166 params() const 167 { 168 return dynamic_cast<const Params *>(_params); 169 } 170 171 public: 172 int deviceBlockSize(); 173 void getAddressRanges(AddrRangeList &resp, bool &snoop); 174 virtual Port *getPort(const std::string &if_name, int idx = -1); 175 void virtual init(); 176 unsigned int drain(Event *de); 177 178 protected: 179 Tick doAtomicAccess(PacketPtr pkt); 180 void doFunctionalAccess(PacketPtr pkt); 181 virtual Tick calculateLatency(PacketPtr pkt); 182 void recvStatusChange(Port::Status status); 183 184 public: 185 virtual void serialize(std::ostream &os); 186 virtual void unserialize(Checkpoint *cp, const std::string §ion); 187 188}; 189 190#endif //__PHYSICAL_MEMORY_HH__ 191