Controller.py revision 10524:fff17530cef6
1# Copyright (c) 2009 Advanced Micro Devices, Inc.
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Steve Reinhardt
28#          Brad Beckmann
29
30from m5.params import *
31from m5.proxy import *
32from MemObject import MemObject
33
34class RubyController(MemObject):
35    type = 'RubyController'
36    cxx_class = 'AbstractController'
37    cxx_header = "mem/ruby/slicc_interface/AbstractController.hh"
38    abstract = True
39    version = Param.Int("")
40    cluster_id = Param.UInt32(0, "Id of this controller's cluster")
41
42    transitions_per_cycle = \
43        Param.Int(32, "no. of  SLICC state machine transitions per cycle")
44    buffer_size = Param.UInt32(0, "max buffer size 0 means infinite")
45
46    recycle_latency = Param.Cycles(10, "")
47    number_of_TBEs = Param.Int(256, "")
48    ruby_system = Param.RubySystem("")
49
50    memory = MasterPort("Port for attaching a memory controller")
51    system = Param.System(Parent.any, "system object parameter")
52