AbstractController.cc revision 9996:150338b8ba12
18931Sandreas.hansson@arm.com/* 28931Sandreas.hansson@arm.com * Copyright (c) 2011 Mark D. Hill and David A. Wood 38931Sandreas.hansson@arm.com * All rights reserved. 48931Sandreas.hansson@arm.com * 58931Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 68931Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 78931Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 88931Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 98931Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 108931Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 118931Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 128931Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 135399SN/A * contributors may be used to endorse or promote products derived from 144486SN/A * this software without specific prior written permission. 154486SN/A * 164486SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174486SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184486SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194486SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204486SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214486SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224486SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234486SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244486SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254486SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264486SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274486SN/A */ 284486SN/A 294486SN/A#include "mem/ruby/slicc_interface/AbstractController.hh" 304486SN/A#include "mem/ruby/system/Sequencer.hh" 314486SN/A#include "mem/ruby/system/System.hh" 324486SN/A 334486SN/AAbstractController::AbstractController(const Params *p) 344486SN/A : ClockedObject(p), Consumer(this), m_fully_busy_cycles(0), 354486SN/A m_request_count(0) 364486SN/A{ 374486SN/A m_version = p->version; 384486SN/A m_transitions_per_cycle = p->transitions_per_cycle; 394486SN/A m_buffer_size = p->buffer_size; 408931Sandreas.hansson@arm.com m_recycle_latency = p->recycle_latency; 414486SN/A m_number_of_TBEs = p->number_of_TBEs; 423102SN/A m_is_blocking = false; 438931Sandreas.hansson@arm.com 441310SN/A if (m_version == 0) { 458931Sandreas.hansson@arm.com // Combine the statistics from all controllers 468931Sandreas.hansson@arm.com // of this particular type. 478931Sandreas.hansson@arm.com Stats::registerDumpCallback(new StatsCallback(this)); 489338SAndreas.Sandberg@arm.com } 498931Sandreas.hansson@arm.com} 508931Sandreas.hansson@arm.com 518931Sandreas.hansson@arm.comvoid 528931Sandreas.hansson@arm.comAbstractController::init() 538931Sandreas.hansson@arm.com{ 548931Sandreas.hansson@arm.com params()->ruby_system->registerAbstractController(this); 558931Sandreas.hansson@arm.com} 568931Sandreas.hansson@arm.com 578931Sandreas.hansson@arm.comvoid 588931Sandreas.hansson@arm.comAbstractController::clearStats() 598931Sandreas.hansson@arm.com{ 608931Sandreas.hansson@arm.com m_requestProfileMap.clear(); 618931Sandreas.hansson@arm.com m_request_count = 0; 62 63 m_delayHistogram.clear(); 64 65 uint32_t size = Network::getNumberOfVirtualNetworks(); 66 m_delayVCHistogram.resize(size); 67 for (uint32_t i = 0; i < size; i++) { 68 m_delayVCHistogram[i].clear(); 69 } 70 71 Sequencer *seq = getSequencer(); 72 if (seq != NULL) { 73 seq->clearStats(); 74 } 75} 76 77void 78AbstractController::profileRequest(const std::string &request) 79{ 80 m_request_count++; 81 82 // if it doesn't exist, conveniently, it will be created with the 83 // default value which is 0 84 m_requestProfileMap[request]++; 85} 86 87void 88AbstractController::profileMsgDelay(uint32_t virtualNetwork, Cycles delay) 89{ 90 assert(virtualNetwork < m_delayVCHistogram.size()); 91 m_delayHistogram.add(delay); 92 m_delayVCHistogram[virtualNetwork].add(delay); 93} 94 95void 96AbstractController::connectWithPeer(AbstractController *c) 97{ 98 getQueuesFromPeer(c); 99 c->getQueuesFromPeer(this); 100} 101 102void 103AbstractController::stallBuffer(MessageBuffer* buf, Address addr) 104{ 105 if (m_waiting_buffers.count(addr) == 0) { 106 MsgVecType* msgVec = new MsgVecType; 107 msgVec->resize(m_in_ports, NULL); 108 m_waiting_buffers[addr] = msgVec; 109 } 110 (*(m_waiting_buffers[addr]))[m_cur_in_port] = buf; 111} 112 113void 114AbstractController::wakeUpBuffers(Address addr) 115{ 116 if (m_waiting_buffers.count(addr) > 0) { 117 // 118 // Wake up all possible lower rank (i.e. lower priority) buffers that could 119 // be waiting on this message. 120 // 121 for (int in_port_rank = m_cur_in_port - 1; 122 in_port_rank >= 0; 123 in_port_rank--) { 124 if ((*(m_waiting_buffers[addr]))[in_port_rank] != NULL) { 125 (*(m_waiting_buffers[addr]))[in_port_rank]->reanalyzeMessages(addr); 126 } 127 } 128 delete m_waiting_buffers[addr]; 129 m_waiting_buffers.erase(addr); 130 } 131} 132 133void 134AbstractController::wakeUpAllBuffers(Address addr) 135{ 136 if (m_waiting_buffers.count(addr) > 0) { 137 // 138 // Wake up all possible lower rank (i.e. lower priority) buffers that could 139 // be waiting on this message. 140 // 141 for (int in_port_rank = m_in_ports - 1; 142 in_port_rank >= 0; 143 in_port_rank--) { 144 if ((*(m_waiting_buffers[addr]))[in_port_rank] != NULL) { 145 (*(m_waiting_buffers[addr]))[in_port_rank]->reanalyzeMessages(addr); 146 } 147 } 148 delete m_waiting_buffers[addr]; 149 m_waiting_buffers.erase(addr); 150 } 151} 152 153void 154AbstractController::wakeUpAllBuffers() 155{ 156 // 157 // Wake up all possible buffers that could be waiting on any message. 158 // 159 160 std::vector<MsgVecType*> wokeUpMsgVecs; 161 162 if(m_waiting_buffers.size() > 0) { 163 for (WaitingBufType::iterator buf_iter = m_waiting_buffers.begin(); 164 buf_iter != m_waiting_buffers.end(); 165 ++buf_iter) { 166 for (MsgVecType::iterator vec_iter = buf_iter->second->begin(); 167 vec_iter != buf_iter->second->end(); 168 ++vec_iter) { 169 if (*vec_iter != NULL) { 170 (*vec_iter)->reanalyzeAllMessages(); 171 } 172 } 173 wokeUpMsgVecs.push_back(buf_iter->second); 174 } 175 176 for (std::vector<MsgVecType*>::iterator wb_iter = wokeUpMsgVecs.begin(); 177 wb_iter != wokeUpMsgVecs.end(); 178 ++wb_iter) { 179 delete (*wb_iter); 180 } 181 182 m_waiting_buffers.clear(); 183 } 184} 185 186void 187AbstractController::blockOnQueue(Address addr, MessageBuffer* port) 188{ 189 m_is_blocking = true; 190 m_block_map[addr] = port; 191} 192 193void 194AbstractController::unblock(Address addr) 195{ 196 m_block_map.erase(addr); 197 if (m_block_map.size() == 0) { 198 m_is_blocking = false; 199 } 200} 201