1/*
2 * Copyright (c) 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Sandberg
38 */
39
40#ifndef __MEM_PROBES_BASE_HH__
41#define __MEM_PROBES_BASE_HH__
42
43#include <memory>
44#include <vector>
45
46#include "sim/probe/mem.hh"
47#include "sim/sim_object.hh"
48
49struct BaseMemProbeParams;
50
51/**
52 * Base class for memory system probes accepting Packet instances.
53 *
54 * This is a helper base class for memory system probes that
55 * instrument Packet handling. Unlike the ProbeListenerObject base
56 * class, this class supports instrumentation of multiple ProbeManager
57 * instances. However, it's limited to one probe point name. This
58 * enables features like tracing or stack distance analysis of packets
59 * from multiple components using the same probe. For example, a stack
60 * distance probe could be hooked up to multiple memories in a
61 * multi-channel configuration.
62 */
63class BaseMemProbe : public SimObject
64{
65  public:
66    BaseMemProbe(BaseMemProbeParams *params);
67
68    void regProbeListeners() override;
69
70  protected:
71    /**
72     * Callback to analyse intercepted Packets.
73     */
74    virtual void handleRequest(const ProbePoints::PacketInfo &pkt_info) = 0;
75
76  private:
77    class PacketListener : public ProbeListenerArgBase<ProbePoints::PacketInfo>
78    {
79      public:
80        PacketListener(BaseMemProbe &_parent,
81                       ProbeManager *pm, const std::string &name)
82            : ProbeListenerArgBase(pm, name),
83              parent(_parent) {}
84
85        void notify(const ProbePoints::PacketInfo &pkt_info) override {
86            parent.handleRequest(pkt_info);
87        }
88
89      protected:
90        BaseMemProbe &parent;
91    };
92
93    std::vector<std::unique_ptr<PacketListener>> listeners;
94};
95
96#endif //  __MEM_PROBES_BASE_HH__
97