page_table.cc revision 6820:2980bd04e6df 
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Ron Dreslinski
30 *          Ali Saidi
31 */
32
33/**
34 * @file
35 * Definitions of page table.
36 */
37#include <string>
38#include <map>
39#include <fstream>
40
41#include "arch/faults.hh"
42#include "base/bitfield.hh"
43#include "base/intmath.hh"
44#include "base/trace.hh"
45#include "config/the_isa.hh"
46#include "mem/page_table.hh"
47#include "sim/process.hh"
48#include "sim/sim_object.hh"
49#include "sim/system.hh"
50
51using namespace std;
52using namespace TheISA;
53
54PageTable::PageTable(Process *_process, Addr _pageSize)
55    : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
56      process(_process)
57{
58    assert(isPowerOf2(pageSize));
59    pTableCache[0].vaddr = 0;
60    pTableCache[1].vaddr = 0;
61    pTableCache[2].vaddr = 0;
62}
63
64PageTable::~PageTable()
65{
66}
67
68void
69PageTable::allocate(Addr vaddr, int64_t size)
70{
71    // starting address must be page aligned
72    assert(pageOffset(vaddr) == 0);
73
74    DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
75
76    for (; size > 0; size -= pageSize, vaddr += pageSize) {
77        PTableItr iter = pTable.find(vaddr);
78
79        if (iter != pTable.end()) {
80            // already mapped
81            fatal("PageTable::allocate: address 0x%x already mapped",
82                    vaddr);
83        }
84
85        pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
86                process->system->new_page());
87        updateCache(vaddr, pTable[vaddr]);
88    }
89}
90
91void
92PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
93{
94    assert(pageOffset(vaddr) == 0);
95    assert(pageOffset(new_vaddr) == 0);
96
97    DPRINTF(MMU, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr,
98            new_vaddr, size);
99
100    for (; size > 0; size -= pageSize, vaddr += pageSize, new_vaddr += pageSize) {
101        PTableItr iter = pTable.find(vaddr);
102
103        assert(iter != pTable.end());
104
105        pTable[new_vaddr] = pTable[vaddr];
106        pTable.erase(vaddr);
107        pTable[new_vaddr].updateVaddr(new_vaddr);
108        updateCache(new_vaddr, pTable[new_vaddr]);
109    }
110}
111
112void
113PageTable::deallocate(Addr vaddr, int64_t size)
114{
115    assert(pageOffset(vaddr) == 0);
116
117    DPRINTF(MMU, "Deallocating page: %#x-%#x\n", vaddr, vaddr+ size);
118
119    for (; size > 0; size -= pageSize, vaddr += pageSize) {
120        PTableItr iter = pTable.find(vaddr);
121
122        assert(iter != pTable.end());
123
124        pTable.erase(vaddr);
125    }
126
127}
128
129bool
130PageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
131{
132    Addr page_addr = pageAlign(vaddr);
133
134    if (pTableCache[0].vaddr == page_addr) {
135        entry = pTableCache[0].entry;
136        return true;
137    }
138    if (pTableCache[1].vaddr == page_addr) {
139        entry = pTableCache[1].entry;
140        return true;
141    }
142    if (pTableCache[2].vaddr == page_addr) {
143        entry = pTableCache[2].entry;
144        return true;
145    }
146
147    PTableItr iter = pTable.find(page_addr);
148
149    if (iter == pTable.end()) {
150        return false;
151    }
152
153    updateCache(page_addr, iter->second);
154    entry = iter->second;
155    return true;
156}
157
158bool
159PageTable::translate(Addr vaddr, Addr &paddr)
160{
161    TheISA::TlbEntry entry;
162    if (!lookup(vaddr, entry)) {
163        DPRINTF(MMU, "Couldn't Translate: %#x\n", vaddr);
164        return false;
165    }
166    paddr = pageOffset(vaddr) + entry.pageStart();
167    DPRINTF(MMU, "Translating: %#x->%#x\n", vaddr, paddr);
168    return true;
169}
170
171Fault
172PageTable::translate(RequestPtr req)
173{
174    Addr paddr;
175    assert(pageAlign(req->getVaddr() + req->getSize() - 1)
176           == pageAlign(req->getVaddr()));
177    if (!translate(req->getVaddr(), paddr)) {
178        return Fault(new GenericPageTableFault(req->getVaddr()));
179    }
180    req->setPaddr(paddr);
181    if ((paddr & (pageSize - 1)) + req->getSize() > pageSize) {
182        panic("Request spans page boundaries!\n");
183        return NoFault;
184    }
185    return NoFault;
186}
187
188void
189PageTable::serialize(std::ostream &os)
190{
191    paramOut(os, "ptable.size", pTable.size());
192
193    PTable::size_type count = 0;
194
195    PTableItr iter = pTable.begin();
196    PTableItr end = pTable.end();
197    while (iter != end) {
198        os << "\n[" << csprintf("%s.Entry%d", process->name(), count) << "]\n";
199
200        paramOut(os, "vaddr", iter->first);
201        iter->second.serialize(os);
202
203        ++iter;
204        ++count;
205    }
206    assert(count == pTable.size());
207}
208
209void
210PageTable::unserialize(Checkpoint *cp, const std::string &section)
211{
212    int i = 0, count;
213    paramIn(cp, section, "ptable.size", count);
214    Addr vaddr;
215    TheISA::TlbEntry *entry;
216
217    pTable.clear();
218
219    while(i < count) {
220        paramIn(cp, csprintf("%s.Entry%d", process->name(), i), "vaddr", vaddr);
221        entry = new TheISA::TlbEntry();
222        entry->unserialize(cp, csprintf("%s.Entry%d", process->name(), i));
223        pTable[vaddr] = *entry;
224        ++i;
225    }
226}
227
228