page_table.cc revision 12448:b299e560f1d8 
1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 * Copyright (c) 2003 The Regents of The University of Michigan
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 *          Ron Dreslinski
31 *          Ali Saidi
32 */
33
34/**
35 * @file
36 * Definitions of functional page table.
37 */
38#include "mem/page_table.hh"
39
40#include <string>
41
42#include "base/trace.hh"
43#include "config/the_isa.hh"
44#include "debug/MMU.hh"
45#include "sim/faults.hh"
46#include "sim/serialize.hh"
47
48using namespace std;
49using namespace TheISA;
50
51EmulationPageTable::~EmulationPageTable()
52{
53    for (auto &iter : pTable)
54        delete iter.second;
55}
56
57void
58EmulationPageTable::map(Addr vaddr, Addr paddr, int64_t size, uint64_t flags)
59{
60    bool clobber = flags & Clobber;
61    // starting address must be page aligned
62    assert(pageOffset(vaddr) == 0);
63
64    DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr + size);
65
66    while (size > 0) {
67        auto it = pTable.find(vaddr);
68        if (it != pTable.end()) {
69            if (clobber) {
70                delete it->second;
71            } else {
72                // already mapped
73                fatal("EmulationPageTable::allocate: addr %#x already mapped",
74                      vaddr);
75            }
76        } else {
77            it = pTable.emplace(vaddr, nullptr).first;
78        }
79
80        it->second = new TheISA::TlbEntry(pid, vaddr, paddr,
81                                         flags & Uncacheable,
82                                         flags & ReadOnly);
83        size -= pageSize;
84        vaddr += pageSize;
85        paddr += pageSize;
86    }
87}
88
89void
90EmulationPageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
91{
92    assert(pageOffset(vaddr) == 0);
93    assert(pageOffset(new_vaddr) == 0);
94
95    DPRINTF(MMU, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr,
96            new_vaddr, size);
97
98    while (size > 0) {
99        auto new_it = pTable.find(new_vaddr);
100        auto old_it = pTable.find(vaddr);
101        assert(old_it != pTable.end() && new_it == pTable.end());
102
103        new_it->second = old_it->second;
104        pTable.erase(old_it);
105        new_it->second->updateVaddr(new_vaddr);
106        size -= pageSize;
107        vaddr += pageSize;
108        new_vaddr += pageSize;
109    }
110}
111
112void
113EmulationPageTable::getMappings(std::vector<std::pair<Addr, Addr>> *addr_maps)
114{
115    for (auto &iter : pTable)
116        addr_maps->push_back(make_pair(iter.first, iter.second->pageStart()));
117}
118
119void
120EmulationPageTable::unmap(Addr vaddr, int64_t size)
121{
122    assert(pageOffset(vaddr) == 0);
123
124    DPRINTF(MMU, "Unmapping page: %#x-%#x\n", vaddr, vaddr+ size);
125
126    while (size > 0) {
127        auto it = pTable.find(vaddr);
128        assert(it != pTable.end());
129        delete it->second;
130        pTable.erase(it);
131        size -= pageSize;
132        vaddr += pageSize;
133    }
134}
135
136bool
137EmulationPageTable::isUnmapped(Addr vaddr, int64_t size)
138{
139    // starting address must be page aligned
140    assert(pageOffset(vaddr) == 0);
141
142    for (int64_t offset = 0; offset < size; offset += pageSize)
143        if (pTable.find(vaddr + offset) != pTable.end())
144            return false;
145
146    return true;
147}
148
149bool
150EmulationPageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
151{
152    Addr page_addr = pageAlign(vaddr);
153
154    PTableItr iter = pTable.find(page_addr);
155
156    if (iter == pTable.end())
157        return false;
158
159    entry = *iter->second;
160    return true;
161}
162
163bool
164EmulationPageTable::translate(Addr vaddr, Addr &paddr)
165{
166    TheISA::TlbEntry entry;
167    if (!lookup(vaddr, entry)) {
168        DPRINTF(MMU, "Couldn't Translate: %#x\n", vaddr);
169        return false;
170    }
171    paddr = pageOffset(vaddr) + entry.pageStart();
172    DPRINTF(MMU, "Translating: %#x->%#x\n", vaddr, paddr);
173    return true;
174}
175
176Fault
177EmulationPageTable::translate(RequestPtr req)
178{
179    Addr paddr;
180    assert(pageAlign(req->getVaddr() + req->getSize() - 1) ==
181           pageAlign(req->getVaddr()));
182    if (!translate(req->getVaddr(), paddr))
183        return Fault(new GenericPageTableFault(req->getVaddr()));
184    req->setPaddr(paddr);
185    if ((paddr & (pageSize - 1)) + req->getSize() > pageSize) {
186        panic("Request spans page boundaries!\n");
187        return NoFault;
188    }
189    return NoFault;
190}
191
192void
193EmulationPageTable::serialize(CheckpointOut &cp) const
194{
195    paramOut(cp, "ptable.size", pTable.size());
196
197    PTable::size_type count = 0;
198    for (auto &pte : pTable) {
199        ScopedCheckpointSection sec(cp, csprintf("Entry%d", count++));
200
201        paramOut(cp, "vaddr", pte.first);
202        pte.second->serialize(cp);
203    }
204    assert(count == pTable.size());
205}
206
207void
208EmulationPageTable::unserialize(CheckpointIn &cp)
209{
210    int count;
211    paramIn(cp, "ptable.size", count);
212
213    for (int i = 0; i < count; ++i) {
214        ScopedCheckpointSection sec(cp, csprintf("Entry%d", i));
215
216        TheISA::TlbEntry *entry = new TheISA::TlbEntry();
217        entry->unserialize(cp);
218
219        Addr vaddr;
220        paramIn(cp, "vaddr", vaddr);
221
222        pTable[vaddr] = entry;
223    }
224}
225
226