page_table.cc revision 10298:77af86f37337 
1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 * Copyright (c) 2003 The Regents of The University of Michigan
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 *          Ron Dreslinski
31 *          Ali Saidi
32 */
33
34/**
35 * @file
36 * Definitions of functional page table.
37 */
38#include <fstream>
39#include <map>
40#include <string>
41
42#include "base/bitfield.hh"
43#include "base/intmath.hh"
44#include "base/trace.hh"
45#include "config/the_isa.hh"
46#include "debug/MMU.hh"
47#include "mem/page_table.hh"
48#include "sim/faults.hh"
49#include "sim/sim_object.hh"
50
51using namespace std;
52using namespace TheISA;
53
54FuncPageTable::FuncPageTable(const std::string &__name, uint64_t _pid, Addr _pageSize)
55        : PageTableBase(__name, _pid, _pageSize)
56{
57}
58
59FuncPageTable::~FuncPageTable()
60{
61}
62
63void
64FuncPageTable::map(Addr vaddr, Addr paddr, int64_t size, bool clobber)
65{
66    // starting address must be page aligned
67    assert(pageOffset(vaddr) == 0);
68
69    DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
70
71    for (; size > 0; size -= pageSize, vaddr += pageSize, paddr += pageSize) {
72        if (!clobber && (pTable.find(vaddr) != pTable.end())) {
73            // already mapped
74            fatal("FuncPageTable::allocate: address 0x%x already mapped", vaddr);
75        }
76
77        pTable[vaddr] = TheISA::TlbEntry(pid, vaddr, paddr);
78        eraseCacheEntry(vaddr);
79        updateCache(vaddr, pTable[vaddr]);
80    }
81}
82
83void
84FuncPageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
85{
86    assert(pageOffset(vaddr) == 0);
87    assert(pageOffset(new_vaddr) == 0);
88
89    DPRINTF(MMU, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr,
90            new_vaddr, size);
91
92    for (; size > 0; size -= pageSize, vaddr += pageSize, new_vaddr += pageSize) {
93        assert(pTable.find(vaddr) != pTable.end());
94
95        pTable[new_vaddr] = pTable[vaddr];
96        pTable.erase(vaddr);
97        eraseCacheEntry(vaddr);
98        pTable[new_vaddr].updateVaddr(new_vaddr);
99        updateCache(new_vaddr, pTable[new_vaddr]);
100    }
101}
102
103void
104FuncPageTable::unmap(Addr vaddr, int64_t size)
105{
106    assert(pageOffset(vaddr) == 0);
107
108    DPRINTF(MMU, "Unmapping page: %#x-%#x\n", vaddr, vaddr+ size);
109
110    for (; size > 0; size -= pageSize, vaddr += pageSize) {
111        assert(pTable.find(vaddr) != pTable.end());
112        pTable.erase(vaddr);
113        eraseCacheEntry(vaddr);
114    }
115
116}
117
118bool
119FuncPageTable::isUnmapped(Addr vaddr, int64_t size)
120{
121    // starting address must be page aligned
122    assert(pageOffset(vaddr) == 0);
123
124    for (; size > 0; size -= pageSize, vaddr += pageSize) {
125        if (pTable.find(vaddr) != pTable.end()) {
126            return false;
127        }
128    }
129
130    return true;
131}
132
133bool
134FuncPageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
135{
136    Addr page_addr = pageAlign(vaddr);
137
138    if (pTableCache[0].valid && pTableCache[0].vaddr == page_addr) {
139        entry = pTableCache[0].entry;
140        return true;
141    }
142    if (pTableCache[1].valid && pTableCache[1].vaddr == page_addr) {
143        entry = pTableCache[1].entry;
144        return true;
145    }
146    if (pTableCache[2].valid && pTableCache[2].vaddr == page_addr) {
147        entry = pTableCache[2].entry;
148        return true;
149    }
150
151    PTableItr iter = pTable.find(page_addr);
152
153    if (iter == pTable.end()) {
154        return false;
155    }
156
157    updateCache(page_addr, iter->second);
158    entry = iter->second;
159    return true;
160}
161
162bool
163PageTableBase::translate(Addr vaddr, Addr &paddr)
164{
165    TheISA::TlbEntry entry;
166    if (!lookup(vaddr, entry)) {
167        DPRINTF(MMU, "Couldn't Translate: %#x\n", vaddr);
168        return false;
169    }
170    paddr = pageOffset(vaddr) + entry.pageStart();
171    DPRINTF(MMU, "Translating: %#x->%#x\n", vaddr, paddr);
172    return true;
173}
174
175Fault
176PageTableBase::translate(RequestPtr req)
177{
178    Addr paddr;
179    assert(pageAlign(req->getVaddr() + req->getSize() - 1)
180           == pageAlign(req->getVaddr()));
181    if (!translate(req->getVaddr(), paddr)) {
182        return Fault(new GenericPageTableFault(req->getVaddr()));
183    }
184    req->setPaddr(paddr);
185    if ((paddr & (pageSize - 1)) + req->getSize() > pageSize) {
186        panic("Request spans page boundaries!\n");
187        return NoFault;
188    }
189    return NoFault;
190}
191
192void
193FuncPageTable::serialize(std::ostream &os)
194{
195    paramOut(os, "ptable.size", pTable.size());
196
197    PTable::size_type count = 0;
198
199    PTableItr iter = pTable.begin();
200    PTableItr end = pTable.end();
201    while (iter != end) {
202        os << "\n[" << csprintf("%s.Entry%d", name(), count) << "]\n";
203
204        paramOut(os, "vaddr", iter->first);
205        iter->second.serialize(os);
206
207        ++iter;
208        ++count;
209    }
210    assert(count == pTable.size());
211}
212
213void
214FuncPageTable::unserialize(Checkpoint *cp, const std::string &section)
215{
216    int i = 0, count;
217    paramIn(cp, section, "ptable.size", count);
218
219    pTable.clear();
220
221    while (i < count) {
222        TheISA::TlbEntry *entry;
223        Addr vaddr;
224
225        paramIn(cp, csprintf("%s.Entry%d", name(), i), "vaddr", vaddr);
226        entry = new TheISA::TlbEntry();
227        entry->unserialize(cp, csprintf("%s.Entry%d", name(), i));
228        pTable[vaddr] = *entry;
229        delete entry;
230        ++i;
231    }
232}
233
234