page_table.cc revision 2665
12379SN/A/* 22379SN/A * Copyright (c) 2003 The Regents of The University of Michigan 32379SN/A * All rights reserved. 42379SN/A * 52379SN/A * Redistribution and use in source and binary forms, with or without 62379SN/A * modification, are permitted provided that the following conditions are 72379SN/A * met: redistributions of source code must retain the above copyright 82379SN/A * notice, this list of conditions and the following disclaimer; 92379SN/A * redistributions in binary form must reproduce the above copyright 102379SN/A * notice, this list of conditions and the following disclaimer in the 112379SN/A * documentation and/or other materials provided with the distribution; 122379SN/A * neither the name of the copyright holders nor the names of its 132379SN/A * contributors may be used to endorse or promote products derived from 142379SN/A * this software without specific prior written permission. 152379SN/A * 162379SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172379SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182379SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192379SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202379SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212379SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222379SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232379SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242379SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252379SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262379SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Ron Dreslinski 302379SN/A */ 312379SN/A 322379SN/A/** 332379SN/A * @file 342379SN/A * Definitions of page table. 352379SN/A */ 362379SN/A#include <string> 372379SN/A#include <map> 382379SN/A#include <fstream> 392379SN/A 402423SN/A#include "arch/faults.hh" 412399SN/A#include "base/bitfield.hh" 422379SN/A#include "base/intmath.hh" 432379SN/A#include "base/trace.hh" 442379SN/A#include "mem/page_table.hh" 452379SN/A#include "sim/builder.hh" 462379SN/A#include "sim/sim_object.hh" 472399SN/A#include "sim/system.hh" 482379SN/A 492399SN/Ausing namespace std; 502423SN/Ausing namespace TheISA; 512399SN/A 522399SN/APageTable::PageTable(System *_system, Addr _pageSize) 532399SN/A : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))), 542399SN/A system(_system) 552379SN/A{ 562399SN/A assert(isPowerOf2(pageSize)); 572379SN/A} 582379SN/A 592379SN/APageTable::~PageTable() 602379SN/A{ 612379SN/A} 622379SN/A 632379SN/AFault 642423SN/APageTable::page_check(Addr addr, int size) const 652379SN/A{ 662379SN/A if (size < sizeof(uint64_t)) { 672394SN/A if (!isPowerOf2(size)) { 682379SN/A panic("Invalid request size!\n"); 692423SN/A return genMachineCheckFault(); 702379SN/A } 712379SN/A 722423SN/A if ((size - 1) & addr) 732423SN/A return genAlignmentFault(); 742379SN/A } 752379SN/A else { 762379SN/A if ((addr & (VMPageSize - 1)) + size > VMPageSize) { 772379SN/A panic("Invalid request size!\n"); 782423SN/A return genMachineCheckFault(); 792379SN/A } 802379SN/A 812423SN/A if ((sizeof(uint64_t) - 1) & addr) 822423SN/A return genAlignmentFault(); 832379SN/A } 842379SN/A 852423SN/A return NoFault; 862379SN/A} 872379SN/A 882379SN/A 892399SN/A 902399SN/A 912399SN/Avoid 922399SN/APageTable::allocate(Addr vaddr, int size) 932399SN/A{ 942399SN/A // starting address must be page aligned 952399SN/A assert(pageOffset(vaddr) == 0); 962399SN/A 972399SN/A for (; size > 0; size -= pageSize, vaddr += pageSize) { 982399SN/A std::map<Addr,Addr>::iterator iter = pTable.find(vaddr); 992399SN/A 1002399SN/A if (iter != pTable.end()) { 1012399SN/A // already mapped 1022399SN/A fatal("PageTable::allocate: address 0x%x already mapped", vaddr); 1032399SN/A } 1042399SN/A 1052399SN/A pTable[vaddr] = system->new_page(); 1062399SN/A } 1072399SN/A} 1082399SN/A 1092399SN/A 1102399SN/A 1112399SN/Abool 1122399SN/APageTable::translate(Addr vaddr, Addr &paddr) 1132399SN/A{ 1142399SN/A Addr page_addr = pageAlign(vaddr); 1152399SN/A std::map<Addr,Addr>::iterator iter = pTable.find(page_addr); 1162399SN/A 1172399SN/A if (iter == pTable.end()) { 1182399SN/A return false; 1192399SN/A } 1202399SN/A 1212399SN/A paddr = iter->second + pageOffset(vaddr); 1222399SN/A return true; 1232399SN/A} 1242399SN/A 1252399SN/A 1262394SN/AFault 1272532SN/APageTable::translate(RequestPtr &req) 1282394SN/A{ 1292532SN/A Addr paddr; 1302532SN/A assert(pageAlign(req->getVaddr() + req->getSize() - 1) 1312532SN/A == pageAlign(req->getVaddr())); 1322532SN/A if (!translate(req->getVaddr(), paddr)) { 1332423SN/A return genMachineCheckFault(); 1342399SN/A } 1352532SN/A req->setPaddr(paddr); 1362532SN/A return page_check(req->getPaddr(), req->getSize()); 1372394SN/A} 138