page_table.cc revision 11793
12379SN/A/* 210298Salexandru.dutu@amd.com * Copyright (c) 2014 Advanced Micro Devices, Inc. 32379SN/A * Copyright (c) 2003 The Regents of The University of Michigan 42379SN/A * All rights reserved. 52379SN/A * 62379SN/A * Redistribution and use in source and binary forms, with or without 72379SN/A * modification, are permitted provided that the following conditions are 82379SN/A * met: redistributions of source code must retain the above copyright 92379SN/A * notice, this list of conditions and the following disclaimer; 102379SN/A * redistributions in binary form must reproduce the above copyright 112379SN/A * notice, this list of conditions and the following disclaimer in the 122379SN/A * documentation and/or other materials provided with the distribution; 132379SN/A * neither the name of the copyright holders nor the names of its 142379SN/A * contributors may be used to endorse or promote products derived from 152379SN/A * this software without specific prior written permission. 162379SN/A * 172379SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182379SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192379SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202379SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212379SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222379SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232379SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242379SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252379SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262379SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272379SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu * 292665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 302665Ssaidi@eecs.umich.edu * Ron Dreslinski 313311Ssaidi@eecs.umich.edu * Ali Saidi 322379SN/A */ 332379SN/A 342379SN/A/** 352379SN/A * @file 3610298Salexandru.dutu@amd.com * Definitions of functional page table. 372379SN/A */ 3811793Sbrandon.potter@amd.com#include "mem/page_table.hh" 3911793Sbrandon.potter@amd.com 408229Snate@binkert.org#include <fstream> 418229Snate@binkert.org#include <map> 4210905Sandreas.sandberg@arm.com#include <memory> 432379SN/A#include <string> 442379SN/A 452399SN/A#include "base/bitfield.hh" 462379SN/A#include "base/intmath.hh" 472379SN/A#include "base/trace.hh" 486658Snate@binkert.org#include "config/the_isa.hh" 498232Snate@binkert.org#include "debug/MMU.hh" 507678Sgblack@eecs.umich.edu#include "sim/faults.hh" 512379SN/A#include "sim/sim_object.hh" 522379SN/A 532399SN/Ausing namespace std; 542423SN/Ausing namespace TheISA; 552399SN/A 5610556Salexandru.dutu@amd.comFuncPageTable::FuncPageTable(const std::string &__name, 5710556Salexandru.dutu@amd.com uint64_t _pid, Addr _pageSize) 5810298Salexandru.dutu@amd.com : PageTableBase(__name, _pid, _pageSize) 592379SN/A{ 602379SN/A} 612379SN/A 6210298Salexandru.dutu@amd.comFuncPageTable::~FuncPageTable() 632379SN/A{ 642379SN/A} 652379SN/A 662399SN/Avoid 6710558Salexandru.dutu@amd.comFuncPageTable::map(Addr vaddr, Addr paddr, int64_t size, uint64_t flags) 682399SN/A{ 6910558Salexandru.dutu@amd.com bool clobber = flags & Clobber; 702399SN/A // starting address must be page aligned 712399SN/A assert(pageOffset(vaddr) == 0); 722399SN/A 733311Ssaidi@eecs.umich.edu DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size); 743311Ssaidi@eecs.umich.edu 758601Ssteve.reinhardt@amd.com for (; size > 0; size -= pageSize, vaddr += pageSize, paddr += pageSize) { 768600Ssteve.reinhardt@amd.com if (!clobber && (pTable.find(vaddr) != pTable.end())) { 772399SN/A // already mapped 7810556Salexandru.dutu@amd.com fatal("FuncPageTable::allocate: addr 0x%x already mapped", vaddr); 792399SN/A } 802399SN/A 8110558Salexandru.dutu@amd.com pTable[vaddr] = TheISA::TlbEntry(pid, vaddr, paddr, 8210558Salexandru.dutu@amd.com flags & Uncacheable, 8310558Salexandru.dutu@amd.com flags & ReadOnly); 849676Smitch.hayenga+gem5@gmail.com eraseCacheEntry(vaddr); 854521Ssaidi@eecs.umich.edu updateCache(vaddr, pTable[vaddr]); 862399SN/A } 872399SN/A} 882399SN/A 895877Shsul@eecs.umich.eduvoid 9010298Salexandru.dutu@amd.comFuncPageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr) 915877Shsul@eecs.umich.edu{ 925877Shsul@eecs.umich.edu assert(pageOffset(vaddr) == 0); 935877Shsul@eecs.umich.edu assert(pageOffset(new_vaddr) == 0); 945877Shsul@eecs.umich.edu 955877Shsul@eecs.umich.edu DPRINTF(MMU, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr, 965877Shsul@eecs.umich.edu new_vaddr, size); 975877Shsul@eecs.umich.edu 9810556Salexandru.dutu@amd.com for (; size > 0; 9910556Salexandru.dutu@amd.com size -= pageSize, vaddr += pageSize, new_vaddr += pageSize) 10010556Salexandru.dutu@amd.com { 1018641Snate@binkert.org assert(pTable.find(vaddr) != pTable.end()); 1025877Shsul@eecs.umich.edu 1035877Shsul@eecs.umich.edu pTable[new_vaddr] = pTable[vaddr]; 1045877Shsul@eecs.umich.edu pTable.erase(vaddr); 1059676Smitch.hayenga+gem5@gmail.com eraseCacheEntry(vaddr); 1065877Shsul@eecs.umich.edu pTable[new_vaddr].updateVaddr(new_vaddr); 1075877Shsul@eecs.umich.edu updateCache(new_vaddr, pTable[new_vaddr]); 1085877Shsul@eecs.umich.edu } 1095877Shsul@eecs.umich.edu} 1105877Shsul@eecs.umich.edu 1115877Shsul@eecs.umich.eduvoid 11210298Salexandru.dutu@amd.comFuncPageTable::unmap(Addr vaddr, int64_t size) 1135877Shsul@eecs.umich.edu{ 1145877Shsul@eecs.umich.edu assert(pageOffset(vaddr) == 0); 1155877Shsul@eecs.umich.edu 1168601Ssteve.reinhardt@amd.com DPRINTF(MMU, "Unmapping page: %#x-%#x\n", vaddr, vaddr+ size); 1175877Shsul@eecs.umich.edu 1185877Shsul@eecs.umich.edu for (; size > 0; size -= pageSize, vaddr += pageSize) { 1198641Snate@binkert.org assert(pTable.find(vaddr) != pTable.end()); 1205877Shsul@eecs.umich.edu pTable.erase(vaddr); 1219676Smitch.hayenga+gem5@gmail.com eraseCacheEntry(vaddr); 1225877Shsul@eecs.umich.edu } 1235877Shsul@eecs.umich.edu 1245877Shsul@eecs.umich.edu} 1255877Shsul@eecs.umich.edu 1262399SN/Abool 12710298Salexandru.dutu@amd.comFuncPageTable::isUnmapped(Addr vaddr, int64_t size) 1288600Ssteve.reinhardt@amd.com{ 1298600Ssteve.reinhardt@amd.com // starting address must be page aligned 1308600Ssteve.reinhardt@amd.com assert(pageOffset(vaddr) == 0); 1318600Ssteve.reinhardt@amd.com 1328600Ssteve.reinhardt@amd.com for (; size > 0; size -= pageSize, vaddr += pageSize) { 1338600Ssteve.reinhardt@amd.com if (pTable.find(vaddr) != pTable.end()) { 1348600Ssteve.reinhardt@amd.com return false; 1358600Ssteve.reinhardt@amd.com } 1368600Ssteve.reinhardt@amd.com } 1378600Ssteve.reinhardt@amd.com 1388600Ssteve.reinhardt@amd.com return true; 1398600Ssteve.reinhardt@amd.com} 1408600Ssteve.reinhardt@amd.com 1418600Ssteve.reinhardt@amd.combool 14210298Salexandru.dutu@amd.comFuncPageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry) 1432399SN/A{ 1442399SN/A Addr page_addr = pageAlign(vaddr); 1452809Ssaidi@eecs.umich.edu 1469676Smitch.hayenga+gem5@gmail.com if (pTableCache[0].valid && pTableCache[0].vaddr == page_addr) { 1475004Sgblack@eecs.umich.edu entry = pTableCache[0].entry; 1482809Ssaidi@eecs.umich.edu return true; 1492809Ssaidi@eecs.umich.edu } 1509676Smitch.hayenga+gem5@gmail.com if (pTableCache[1].valid && pTableCache[1].vaddr == page_addr) { 1515004Sgblack@eecs.umich.edu entry = pTableCache[1].entry; 1522809Ssaidi@eecs.umich.edu return true; 1532809Ssaidi@eecs.umich.edu } 1549676Smitch.hayenga+gem5@gmail.com if (pTableCache[2].valid && pTableCache[2].vaddr == page_addr) { 1555004Sgblack@eecs.umich.edu entry = pTableCache[2].entry; 1562809Ssaidi@eecs.umich.edu return true; 1572809Ssaidi@eecs.umich.edu } 1582809Ssaidi@eecs.umich.edu 1595004Sgblack@eecs.umich.edu PTableItr iter = pTable.find(page_addr); 1602399SN/A 1612399SN/A if (iter == pTable.end()) { 1622399SN/A return false; 1632399SN/A } 1642399SN/A 1654521Ssaidi@eecs.umich.edu updateCache(page_addr, iter->second); 1665004Sgblack@eecs.umich.edu entry = iter->second; 1672399SN/A return true; 1682399SN/A} 1692399SN/A 1705004Sgblack@eecs.umich.edubool 17110298Salexandru.dutu@amd.comPageTableBase::translate(Addr vaddr, Addr &paddr) 1725004Sgblack@eecs.umich.edu{ 1735004Sgblack@eecs.umich.edu TheISA::TlbEntry entry; 1745183Ssaidi@eecs.umich.edu if (!lookup(vaddr, entry)) { 1755183Ssaidi@eecs.umich.edu DPRINTF(MMU, "Couldn't Translate: %#x\n", vaddr); 1765004Sgblack@eecs.umich.edu return false; 1775183Ssaidi@eecs.umich.edu } 1785184Sgblack@eecs.umich.edu paddr = pageOffset(vaddr) + entry.pageStart(); 1795183Ssaidi@eecs.umich.edu DPRINTF(MMU, "Translating: %#x->%#x\n", vaddr, paddr); 1805004Sgblack@eecs.umich.edu return true; 1815004Sgblack@eecs.umich.edu} 1822399SN/A 1832394SN/AFault 18410298Salexandru.dutu@amd.comPageTableBase::translate(RequestPtr req) 1852394SN/A{ 1862532SN/A Addr paddr; 1872532SN/A assert(pageAlign(req->getVaddr() + req->getSize() - 1) 1882532SN/A == pageAlign(req->getVaddr())); 1892532SN/A if (!translate(req->getVaddr(), paddr)) { 1905004Sgblack@eecs.umich.edu return Fault(new GenericPageTableFault(req->getVaddr())); 1912399SN/A } 1922532SN/A req->setPaddr(paddr); 1935004Sgblack@eecs.umich.edu if ((paddr & (pageSize - 1)) + req->getSize() > pageSize) { 1945004Sgblack@eecs.umich.edu panic("Request spans page boundaries!\n"); 1955004Sgblack@eecs.umich.edu return NoFault; 1965004Sgblack@eecs.umich.edu } 1975004Sgblack@eecs.umich.edu return NoFault; 1982394SN/A} 1993311Ssaidi@eecs.umich.edu 2003311Ssaidi@eecs.umich.eduvoid 20110905Sandreas.sandberg@arm.comFuncPageTable::serialize(CheckpointOut &cp) const 2023311Ssaidi@eecs.umich.edu{ 20310905Sandreas.sandberg@arm.com paramOut(cp, "ptable.size", pTable.size()); 2043320Shsul@eecs.umich.edu 2056227Snate@binkert.org PTable::size_type count = 0; 20610905Sandreas.sandberg@arm.com for (auto &pte : pTable) { 20710905Sandreas.sandberg@arm.com ScopedCheckpointSection sec(cp, csprintf("Entry%d", count++)); 2083311Ssaidi@eecs.umich.edu 20910905Sandreas.sandberg@arm.com paramOut(cp, "vaddr", pte.first); 21010905Sandreas.sandberg@arm.com pte.second.serialize(cp); 2113311Ssaidi@eecs.umich.edu } 2123311Ssaidi@eecs.umich.edu assert(count == pTable.size()); 2133311Ssaidi@eecs.umich.edu} 2143311Ssaidi@eecs.umich.edu 2153311Ssaidi@eecs.umich.eduvoid 21610905Sandreas.sandberg@arm.comFuncPageTable::unserialize(CheckpointIn &cp) 2173311Ssaidi@eecs.umich.edu{ 21810905Sandreas.sandberg@arm.com int count; 21910905Sandreas.sandberg@arm.com paramIn(cp, "ptable.size", count); 2203311Ssaidi@eecs.umich.edu 22110905Sandreas.sandberg@arm.com for (int i = 0; i < count; ++i) { 22210905Sandreas.sandberg@arm.com ScopedCheckpointSection sec(cp, csprintf("Entry%d", i)); 2233311Ssaidi@eecs.umich.edu 22410905Sandreas.sandberg@arm.com std::unique_ptr<TheISA::TlbEntry> entry; 2258763Sgblack@eecs.umich.edu Addr vaddr; 2268763Sgblack@eecs.umich.edu 22710905Sandreas.sandberg@arm.com paramIn(cp, "vaddr", vaddr); 22810905Sandreas.sandberg@arm.com entry.reset(new TheISA::TlbEntry()); 22910905Sandreas.sandberg@arm.com entry->unserialize(cp); 23010905Sandreas.sandberg@arm.com 2315183Ssaidi@eecs.umich.edu pTable[vaddr] = *entry; 2326818SLisa.Hsu@amd.com } 2333311Ssaidi@eecs.umich.edu} 2343311Ssaidi@eecs.umich.edu 235