1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andrew Bardsley
38 *          Curtis Dunham
39 *          Christian Menard
40 */
41
42/**
43 * @file
44 *
45 * ExternalMaster is a memory object representing a binding from
46 * a gem5 slave to a master port in a system external to gem5.
47 *
48 * During initialisation, a `handler' for the port type specified in the
49 * port's port_type parameter is found from the registered port handlers
50 * provided with registerHandler.  Once a handler is found, it is passed the
51 * port_data parameter of the port which can be used to identify the external
52 * port which is to be bound to.  A port handler will usually construct a
53 * bridge object in the external system to accomodate the port-to-port
54 * mapping but this bridge is not exposed to gem5 other than be the
55 * presentation of the MasterPort which can be bound.
56 *
57 * The external port must provide a gem5 MasterPort interface.
58 */
59
60#ifndef __MEM_EXTERNAL_MASTER_HH__
61#define __MEM_EXTERNAL_MASTER_HH__
62
63#include "mem/port.hh"
64#include "params/ExternalMaster.hh"
65#include "sim/sim_object.hh"
66
67class ExternalMaster : public SimObject
68{
69  public:
70    /** Derive from this class to create an external port interface */
71    class ExternalPort : public MasterPort
72    {
73      protected:
74        ExternalMaster &owner;
75
76      public:
77        ExternalPort(const std::string &name_,
78            ExternalMaster &owner_) :
79            MasterPort(name_, &owner_), owner(owner_)
80        { }
81
82        ~ExternalPort() { }
83
84        /** Any or all of recv... can be overloaded to provide the port's
85         *  functionality */
86    };
87
88    /* Handlers are specific to *types* of port not specific port
89     * instantiations.  A handler will typically build a bridge to the
90     * external port from gem5 and provide gem5 with a MasterPort that can be
91     * bound to for each call to Handler::getExternalPort.*/
92    class Handler
93    {
94      public:
95        /** Create or find an external port which can be bound.  Returns
96         *  NULL on failure */
97        virtual ExternalPort *getExternalPort(
98            const std::string &name, ExternalMaster &owner,
99            const std::string &port_data) = 0;
100    };
101
102  protected:
103    /** The peer port for the gem5 port "port" */
104    ExternalPort *externalPort;
105
106    /** Name of the bound port.  This will be name() + ".port" */
107    std::string portName;
108
109    /** Key to select a port handler */
110    std::string portType;
111
112    /** Handler-specific port configuration */
113    std::string portData;
114
115    /** Registered handlers.  Handlers are chosen using the port_type
116     *  parameter on ExternalMasters.  port_types form a global namespace
117     *  across the simulation and so handlers are registered into a global
118     *  structure */
119    static std::map<std::string, Handler *> portHandlers;
120
121  public:
122    ExternalMaster(ExternalMasterParams *params);
123
124    /** Port interface.  Responds only to port "port" */
125    Port &getPort(const std::string &if_name,
126                  PortID idx=InvalidPortID) override;
127
128    /** Register a handler which can provide ports with port_type ==
129     *  handler_name */
130    static void registerHandler(const std::string &handler_name,
131        Handler *handler);
132
133    void init() override;
134
135    const MasterID masterId;
136};
137
138
139#endif //__MEM_EXTERNAL_MASTER_HH__
140