coherent_xbar.cc revision 9549
14776Sgblack@eecs.umich.edu/* 213610Sgiacomo.gabrielli@arm.com * Copyright (c) 2011-2012 ARM Limited 310665SAli.Saidi@ARM.com * All rights reserved 410665SAli.Saidi@ARM.com * 510665SAli.Saidi@ARM.com * The license below extends only to copyright in the software and shall 610665SAli.Saidi@ARM.com * not be construed as granting a license to any other intellectual 710665SAli.Saidi@ARM.com * property including but not limited to intellectual property relating 810665SAli.Saidi@ARM.com * to a hardware implementation of the functionality of the software 910665SAli.Saidi@ARM.com * licensed hereunder. You may use the software subject to the license 1010665SAli.Saidi@ARM.com * terms below provided that you ensure that this notice is replicated 1110665SAli.Saidi@ARM.com * unmodified and in its entirety in all distributions of the software, 1210665SAli.Saidi@ARM.com * modified or unmodified, in source code or in binary form. 1310665SAli.Saidi@ARM.com * 144776Sgblack@eecs.umich.edu * Copyright (c) 2006 The Regents of The University of Michigan 154776Sgblack@eecs.umich.edu * All rights reserved. 164776Sgblack@eecs.umich.edu * 174776Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 184776Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 194776Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 204776Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 214776Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 224776Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 234776Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 244776Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 254776Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 264776Sgblack@eecs.umich.edu * this software without specific prior written permission. 274776Sgblack@eecs.umich.edu * 284776Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 294776Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 304776Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 314776Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 324776Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 334776Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 344776Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 354776Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 364776Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 374776Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 384776Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 394776Sgblack@eecs.umich.edu * 404776Sgblack@eecs.umich.edu * Authors: Ali Saidi 414776Sgblack@eecs.umich.edu * Andreas Hansson 424776Sgblack@eecs.umich.edu * William Wang 434776Sgblack@eecs.umich.edu */ 444776Sgblack@eecs.umich.edu 454776Sgblack@eecs.umich.edu/** 464776Sgblack@eecs.umich.edu * @file 4713610Sgiacomo.gabrielli@arm.com * Definition of a bus object. 4813610Sgiacomo.gabrielli@arm.com */ 496216Snate@binkert.org 5011800Sbrandon.potter@amd.com#include "base/misc.hh" 514776Sgblack@eecs.umich.edu#include "base/trace.hh" 524776Sgblack@eecs.umich.edu#include "debug/BusAddrRanges.hh" 534776Sgblack@eecs.umich.edu#include "debug/CoherentBus.hh" 544776Sgblack@eecs.umich.edu#include "mem/coherent_bus.hh" 554776Sgblack@eecs.umich.edu#include "sim/system.hh" 564776Sgblack@eecs.umich.edu 574776Sgblack@eecs.umich.eduCoherentBus::CoherentBus(const CoherentBusParams *p) 584776Sgblack@eecs.umich.edu : BaseBus(p), reqLayer(*this, ".reqLayer"), 594776Sgblack@eecs.umich.edu respLayer(*this, ".respLayer"), 604776Sgblack@eecs.umich.edu snoopRespLayer(*this, ".snoopRespLayer"), 614776Sgblack@eecs.umich.edu system(p->system) 624776Sgblack@eecs.umich.edu{ 634776Sgblack@eecs.umich.edu // create the ports based on the size of the master and slave 644776Sgblack@eecs.umich.edu // vector ports, and the presence of the default port, the ports 654776Sgblack@eecs.umich.edu // are enumerated starting from zero 664776Sgblack@eecs.umich.edu for (int i = 0; i < p->port_master_connection_count; ++i) { 674776Sgblack@eecs.umich.edu std::string portName = csprintf("%s.master[%d]", name(), i); 684776Sgblack@eecs.umich.edu MasterPort* bp = new CoherentBusMasterPort(portName, *this, i); 697720Sgblack@eecs.umich.edu masterPorts.push_back(bp); 705784Sgblack@eecs.umich.edu } 714776Sgblack@eecs.umich.edu 724776Sgblack@eecs.umich.edu // see if we have a default slave device connected and if so add 734776Sgblack@eecs.umich.edu // our corresponding master port 744776Sgblack@eecs.umich.edu if (p->port_default_connection_count) { 754776Sgblack@eecs.umich.edu defaultPortID = masterPorts.size(); 764776Sgblack@eecs.umich.edu std::string portName = name() + ".default"; 774776Sgblack@eecs.umich.edu MasterPort* bp = new CoherentBusMasterPort(portName, *this, 7810665SAli.Saidi@ARM.com defaultPortID); 7910665SAli.Saidi@ARM.com masterPorts.push_back(bp); 8010665SAli.Saidi@ARM.com } 8110665SAli.Saidi@ARM.com 8210665SAli.Saidi@ARM.com // create the slave ports, once again starting at zero 8310665SAli.Saidi@ARM.com for (int i = 0; i < p->port_slave_connection_count; ++i) { 8410665SAli.Saidi@ARM.com std::string portName = csprintf("%s.slave[%d]", name(), i); 8510665SAli.Saidi@ARM.com SlavePort* bp = new CoherentBusSlavePort(portName, *this, i); 8610665SAli.Saidi@ARM.com slavePorts.push_back(bp); 8710665SAli.Saidi@ARM.com } 8810665SAli.Saidi@ARM.com 8910665SAli.Saidi@ARM.com clearPortCache(); 9010665SAli.Saidi@ARM.com} 9110665SAli.Saidi@ARM.com 9210665SAli.Saidi@ARM.comvoid 9310665SAli.Saidi@ARM.comCoherentBus::init() 9410665SAli.Saidi@ARM.com{ 9510665SAli.Saidi@ARM.com // the base class is responsible for determining the block size 9610665SAli.Saidi@ARM.com BaseBus::init(); 974776Sgblack@eecs.umich.edu 984776Sgblack@eecs.umich.edu // iterate over our slave ports and determine which of our 994776Sgblack@eecs.umich.edu // neighbouring master ports are snooping and add them as snoopers 10013610Sgiacomo.gabrielli@arm.com for (SlavePortConstIter p = slavePorts.begin(); p != slavePorts.end(); 10113610Sgiacomo.gabrielli@arm.com ++p) { 10213610Sgiacomo.gabrielli@arm.com // check if the connected master port is snooping 1034776Sgblack@eecs.umich.edu if ((*p)->isSnooping()) { 10410665SAli.Saidi@ARM.com DPRINTF(BusAddrRanges, "Adding snooping master %s\n", 10510665SAli.Saidi@ARM.com (*p)->getMasterPort().name()); 10610665SAli.Saidi@ARM.com snoopPorts.push_back(*p); 10710665SAli.Saidi@ARM.com } 10810665SAli.Saidi@ARM.com } 10910665SAli.Saidi@ARM.com 11010665SAli.Saidi@ARM.com if (snoopPorts.empty()) 11110665SAli.Saidi@ARM.com warn("CoherentBus %s has no snooping ports attached!\n", name()); 11210665SAli.Saidi@ARM.com} 11310665SAli.Saidi@ARM.com 11410665SAli.Saidi@ARM.combool 11510665SAli.Saidi@ARM.comCoherentBus::recvTimingReq(PacketPtr pkt, PortID slave_port_id) 11610665SAli.Saidi@ARM.com{ 11710665SAli.Saidi@ARM.com // determine the source port based on the id 11810665SAli.Saidi@ARM.com SlavePort *src_port = slavePorts[slave_port_id]; 11910665SAli.Saidi@ARM.com 12012386Sgabeblack@google.com // remember if the packet is an express snoop 1214776Sgblack@eecs.umich.edu bool is_express_snoop = pkt->isExpressSnoop(); 1225543Ssaidi@eecs.umich.edu 1234776Sgblack@eecs.umich.edu // test if the bus should be considered occupied for the current 1244776Sgblack@eecs.umich.edu // port, and exclude express snoops from the check 1254776Sgblack@eecs.umich.edu if (!is_express_snoop && !reqLayer.tryTiming(src_port)) { 12613610Sgiacomo.gabrielli@arm.com DPRINTF(CoherentBus, "recvTimingReq: src %s %s 0x%x BUSY\n", 12713610Sgiacomo.gabrielli@arm.com src_port->name(), pkt->cmdString(), pkt->getAddr()); 12813610Sgiacomo.gabrielli@arm.com return false; 1294776Sgblack@eecs.umich.edu } 1304776Sgblack@eecs.umich.edu 13110665SAli.Saidi@ARM.com DPRINTF(CoherentBus, "recvTimingReq: src %s %s expr %d 0x%x\n", 13210665SAli.Saidi@ARM.com src_port->name(), pkt->cmdString(), is_express_snoop, 13310665SAli.Saidi@ARM.com pkt->getAddr()); 13410665SAli.Saidi@ARM.com 13510665SAli.Saidi@ARM.com // set the source port for routing of the response 13610665SAli.Saidi@ARM.com pkt->setSrc(slave_port_id); 13710665SAli.Saidi@ARM.com 13810665SAli.Saidi@ARM.com calcPacketTiming(pkt); 1394776Sgblack@eecs.umich.edu Tick packetFinishTime = pkt->busLastWordDelay + curTick(); 14010665SAli.Saidi@ARM.com 14110665SAli.Saidi@ARM.com // uncacheable requests need never be snooped 14210665SAli.Saidi@ARM.com if (!pkt->req->isUncacheable() && !system->bypassCaches()) { 14310665SAli.Saidi@ARM.com // the packet is a memory-mapped request and should be 1444776Sgblack@eecs.umich.edu // broadcasted to our snoopers but the source 14510665SAli.Saidi@ARM.com forwardTiming(pkt, slave_port_id); 14610665SAli.Saidi@ARM.com } 14710665SAli.Saidi@ARM.com 1484776Sgblack@eecs.umich.edu // remember if we add an outstanding req so we can undo it if 1494776Sgblack@eecs.umich.edu // necessary, if the packet needs a response, we should add it 1504776Sgblack@eecs.umich.edu // as outstanding and express snoops never fail so there is 1515784Sgblack@eecs.umich.edu // not need to worry about them 15210664SAli.Saidi@ARM.com bool add_outstanding = !is_express_snoop && pkt->needsResponse(); 1537720Sgblack@eecs.umich.edu 15410665SAli.Saidi@ARM.com // keep track that we have an outstanding request packet 15510665SAli.Saidi@ARM.com // matching this request, this is used by the coherency 15610665SAli.Saidi@ARM.com // mechanism in determining what to do with snoop responses 15710665SAli.Saidi@ARM.com // (in recvTimingSnoop) 15810665SAli.Saidi@ARM.com if (add_outstanding) { 1594776Sgblack@eecs.umich.edu // we should never have an exsiting request outstanding 16013610Sgiacomo.gabrielli@arm.com assert(outstandingReq.find(pkt->req) == outstandingReq.end()); 16113610Sgiacomo.gabrielli@arm.com outstandingReq.insert(pkt->req); 16213610Sgiacomo.gabrielli@arm.com } 16313610Sgiacomo.gabrielli@arm.com 16413610Sgiacomo.gabrielli@arm.com // since it is a normal request, determine the destination 16513610Sgiacomo.gabrielli@arm.com // based on the address and attempt to send the packet 16613610Sgiacomo.gabrielli@arm.com bool success = masterPorts[findPort(pkt->getAddr())]->sendTimingReq(pkt); 16713610Sgiacomo.gabrielli@arm.com 16813610Sgiacomo.gabrielli@arm.com // if this is an express snoop, we are done at this point 16913610Sgiacomo.gabrielli@arm.com if (is_express_snoop) { 1704776Sgblack@eecs.umich.edu assert(success); 17110198SAndrew.Bardsley@arm.com } else { 17210665SAli.Saidi@ARM.com // for normal requests, check if successful 17310665SAli.Saidi@ARM.com if (!success) { 17410665SAli.Saidi@ARM.com // inhibited packets should never be forced to retry 17510665SAli.Saidi@ARM.com assert(!pkt->memInhibitAsserted()); 1764776Sgblack@eecs.umich.edu 17712386Sgabeblack@google.com // if it was added as outstanding and the send failed, then 17812386Sgabeblack@google.com // erase it again 17912386Sgabeblack@google.com if (add_outstanding) 18012386Sgabeblack@google.com outstandingReq.erase(pkt->req); 18112386Sgabeblack@google.com 18212386Sgabeblack@google.com // undo the calculation so we can check for 0 again 18312386Sgabeblack@google.com pkt->busFirstWordDelay = pkt->busLastWordDelay = 0; 18412386Sgabeblack@google.com 18512386Sgabeblack@google.com DPRINTF(CoherentBus, "recvTimingReq: src %s %s 0x%x RETRY\n", 18612386Sgabeblack@google.com src_port->name(), pkt->cmdString(), pkt->getAddr()); 18712386Sgabeblack@google.com 1884776Sgblack@eecs.umich.edu // update the bus state and schedule an idle event 1894776Sgblack@eecs.umich.edu reqLayer.failedTiming(src_port, clockEdge(Cycles(headerCycles))); 1904776Sgblack@eecs.umich.edu } else { 1914776Sgblack@eecs.umich.edu // update the bus state and schedule an idle event 1924776Sgblack@eecs.umich.edu reqLayer.succeededTiming(packetFinishTime); 1934776Sgblack@eecs.umich.edu } 1944776Sgblack@eecs.umich.edu } 1954776Sgblack@eecs.umich.edu 1964776Sgblack@eecs.umich.edu return success; 1974776Sgblack@eecs.umich.edu} 1984776Sgblack@eecs.umich.edu 1994776Sgblack@eecs.umich.edubool 20013610Sgiacomo.gabrielli@arm.comCoherentBus::recvTimingResp(PacketPtr pkt, PortID master_port_id) 20113610Sgiacomo.gabrielli@arm.com{ 20213610Sgiacomo.gabrielli@arm.com // determine the source port based on the id 20313610Sgiacomo.gabrielli@arm.com MasterPort *src_port = masterPorts[master_port_id]; 20413610Sgiacomo.gabrielli@arm.com 20513610Sgiacomo.gabrielli@arm.com // test if the bus should be considered occupied for the current 20613610Sgiacomo.gabrielli@arm.com // port 20713610Sgiacomo.gabrielli@arm.com if (!respLayer.tryTiming(src_port)) { 20813610Sgiacomo.gabrielli@arm.com DPRINTF(CoherentBus, "recvTimingResp: src %s %s 0x%x BUSY\n", 20913610Sgiacomo.gabrielli@arm.com src_port->name(), pkt->cmdString(), pkt->getAddr()); 21013610Sgiacomo.gabrielli@arm.com return false; 21113610Sgiacomo.gabrielli@arm.com } 21213610Sgiacomo.gabrielli@arm.com 21313610Sgiacomo.gabrielli@arm.com DPRINTF(CoherentBus, "recvTimingResp: src %s %s 0x%x\n", 21413610Sgiacomo.gabrielli@arm.com src_port->name(), pkt->cmdString(), pkt->getAddr()); 21513610Sgiacomo.gabrielli@arm.com 2164776Sgblack@eecs.umich.edu calcPacketTiming(pkt); 2174776Sgblack@eecs.umich.edu Tick packetFinishTime = pkt->busLastWordDelay + curTick(); 2184776Sgblack@eecs.umich.edu 2194776Sgblack@eecs.umich.edu // the packet is a normal response to a request that we should 2204776Sgblack@eecs.umich.edu // have seen passing through the bus 2214776Sgblack@eecs.umich.edu assert(outstandingReq.find(pkt->req) != outstandingReq.end()); 2227600Sminkyu.jeong@arm.com 2237600Sminkyu.jeong@arm.com // remove it as outstanding 2244776Sgblack@eecs.umich.edu outstandingReq.erase(pkt->req); 22511320Ssteve.reinhardt@amd.com 2266364Sgblack@eecs.umich.edu // send the packet to the destination through one of our slave 22710665SAli.Saidi@ARM.com // ports, as determined by the destination field 22810665SAli.Saidi@ARM.com bool success M5_VAR_USED = slavePorts[pkt->getDest()]->sendTimingResp(pkt); 22910665SAli.Saidi@ARM.com 23010665SAli.Saidi@ARM.com // currently it is illegal to block responses... can lead to 23110665SAli.Saidi@ARM.com // deadlock 2326364Sgblack@eecs.umich.edu assert(success); 23310665SAli.Saidi@ARM.com 23410665SAli.Saidi@ARM.com respLayer.succeededTiming(packetFinishTime); 23510665SAli.Saidi@ARM.com 23610665SAli.Saidi@ARM.com return true; 2376364Sgblack@eecs.umich.edu} 23810665SAli.Saidi@ARM.com 23910665SAli.Saidi@ARM.comvoid 24010665SAli.Saidi@ARM.comCoherentBus::recvTimingSnoopReq(PacketPtr pkt, PortID master_port_id) 2416364Sgblack@eecs.umich.edu{ 24210665SAli.Saidi@ARM.com DPRINTF(CoherentBus, "recvTimingSnoopReq: src %s %s 0x%x\n", 24310665SAli.Saidi@ARM.com masterPorts[master_port_id]->name(), pkt->cmdString(), 2446364Sgblack@eecs.umich.edu pkt->getAddr()); 24510665SAli.Saidi@ARM.com 24610665SAli.Saidi@ARM.com // we should only see express snoops from caches 2474776Sgblack@eecs.umich.edu assert(pkt->isExpressSnoop()); 2484776Sgblack@eecs.umich.edu 2494776Sgblack@eecs.umich.edu // set the source port for routing of the response 2504776Sgblack@eecs.umich.edu pkt->setSrc(master_port_id); 2514776Sgblack@eecs.umich.edu 2525034Smilesck@eecs.umich.edu // forward to all snoopers 2534776Sgblack@eecs.umich.edu forwardTiming(pkt, InvalidPortID); 2544776Sgblack@eecs.umich.edu 2554776Sgblack@eecs.umich.edu // a snoop request came from a connected slave device (one of 2564776Sgblack@eecs.umich.edu // our master ports), and if it is not coming from the slave 2574776Sgblack@eecs.umich.edu // device responsible for the address range something is 2584776Sgblack@eecs.umich.edu // wrong, hence there is nothing further to do as the packet 2594776Sgblack@eecs.umich.edu // would be going back to where it came from 2607720Sgblack@eecs.umich.edu assert(master_port_id == findPort(pkt->getAddr())); 2617720Sgblack@eecs.umich.edu} 2624776Sgblack@eecs.umich.edu 2634776Sgblack@eecs.umich.edubool 2644776Sgblack@eecs.umich.eduCoherentBus::recvTimingSnoopResp(PacketPtr pkt, PortID slave_port_id) 2654776Sgblack@eecs.umich.edu{ 2667811Ssteve.reinhardt@amd.com // determine the source port based on the id 2674776Sgblack@eecs.umich.edu SlavePort* src_port = slavePorts[slave_port_id]; 2684776Sgblack@eecs.umich.edu 269 // test if the bus should be considered occupied for the current 270 // port 271 if (!snoopRespLayer.tryTiming(src_port)) { 272 DPRINTF(CoherentBus, "recvTimingSnoopResp: src %s %s 0x%x BUSY\n", 273 src_port->name(), pkt->cmdString(), pkt->getAddr()); 274 return false; 275 } 276 277 DPRINTF(CoherentBus, "recvTimingSnoop: src %s %s 0x%x\n", 278 src_port->name(), pkt->cmdString(), pkt->getAddr()); 279 280 // get the destination from the packet 281 PortID dest = pkt->getDest(); 282 283 // responses are never express snoops 284 assert(!pkt->isExpressSnoop()); 285 286 calcPacketTiming(pkt); 287 Tick packetFinishTime = pkt->busLastWordDelay + curTick(); 288 289 // determine if the response is from a snoop request we 290 // created as the result of a normal request (in which case it 291 // should be in the outstandingReq), or if we merely forwarded 292 // someone else's snoop request 293 if (outstandingReq.find(pkt->req) == outstandingReq.end()) { 294 // this is a snoop response to a snoop request we 295 // forwarded, e.g. coming from the L1 and going to the L2 296 // this should be forwarded as a snoop response 297 bool success M5_VAR_USED = masterPorts[dest]->sendTimingSnoopResp(pkt); 298 assert(success); 299 } else { 300 // we got a snoop response on one of our slave ports, 301 // i.e. from a coherent master connected to the bus, and 302 // since we created the snoop request as part of 303 // recvTiming, this should now be a normal response again 304 outstandingReq.erase(pkt->req); 305 306 // this is a snoop response from a coherent master, with a 307 // destination field set on its way through the bus as 308 // request, hence it should never go back to where the 309 // snoop response came from, but instead to where the 310 // original request came from 311 assert(slave_port_id != dest); 312 313 // as a normal response, it should go back to a master 314 // through one of our slave ports 315 bool success M5_VAR_USED = slavePorts[dest]->sendTimingResp(pkt); 316 317 // currently it is illegal to block responses... can lead 318 // to deadlock 319 assert(success); 320 } 321 322 snoopRespLayer.succeededTiming(packetFinishTime); 323 324 return true; 325} 326 327 328void 329CoherentBus::forwardTiming(PacketPtr pkt, PortID exclude_slave_port_id) 330{ 331 // snoops should only happen if the system isn't bypassing caches 332 assert(!system->bypassCaches()); 333 334 for (SlavePortIter s = snoopPorts.begin(); s != snoopPorts.end(); ++s) { 335 SlavePort *p = *s; 336 // we could have gotten this request from a snooping master 337 // (corresponding to our own slave port that is also in 338 // snoopPorts) and should not send it back to where it came 339 // from 340 if (exclude_slave_port_id == InvalidPortID || 341 p->getId() != exclude_slave_port_id) { 342 // cache is not allowed to refuse snoop 343 p->sendTimingSnoopReq(pkt); 344 } 345 } 346} 347 348void 349CoherentBus::recvRetry() 350{ 351 // responses and snoop responses never block on forwarding them, 352 // so the retry will always be coming from a port to which we 353 // tried to forward a request 354 reqLayer.recvRetry(); 355} 356 357Tick 358CoherentBus::recvAtomic(PacketPtr pkt, PortID slave_port_id) 359{ 360 DPRINTF(CoherentBus, "recvAtomic: packet src %s addr 0x%x cmd %s\n", 361 slavePorts[slave_port_id]->name(), pkt->getAddr(), 362 pkt->cmdString()); 363 364 MemCmd snoop_response_cmd = MemCmd::InvalidCmd; 365 Tick snoop_response_latency = 0; 366 367 // uncacheable requests need never be snooped 368 if (!pkt->req->isUncacheable() && !system->bypassCaches()) { 369 // forward to all snoopers but the source 370 std::pair<MemCmd, Tick> snoop_result = 371 forwardAtomic(pkt, slave_port_id); 372 snoop_response_cmd = snoop_result.first; 373 snoop_response_latency = snoop_result.second; 374 } 375 376 // even if we had a snoop response, we must continue and also 377 // perform the actual request at the destination 378 PortID dest_id = findPort(pkt->getAddr()); 379 380 // forward the request to the appropriate destination 381 Tick response_latency = masterPorts[dest_id]->sendAtomic(pkt); 382 383 // if we got a response from a snooper, restore it here 384 if (snoop_response_cmd != MemCmd::InvalidCmd) { 385 // no one else should have responded 386 assert(!pkt->isResponse()); 387 pkt->cmd = snoop_response_cmd; 388 response_latency = snoop_response_latency; 389 } 390 391 // @todo: Not setting first-word time 392 pkt->busLastWordDelay = response_latency; 393 return response_latency; 394} 395 396Tick 397CoherentBus::recvAtomicSnoop(PacketPtr pkt, PortID master_port_id) 398{ 399 DPRINTF(CoherentBus, "recvAtomicSnoop: packet src %s addr 0x%x cmd %s\n", 400 masterPorts[master_port_id]->name(), pkt->getAddr(), 401 pkt->cmdString()); 402 403 // forward to all snoopers 404 std::pair<MemCmd, Tick> snoop_result = 405 forwardAtomic(pkt, InvalidPortID); 406 MemCmd snoop_response_cmd = snoop_result.first; 407 Tick snoop_response_latency = snoop_result.second; 408 409 if (snoop_response_cmd != MemCmd::InvalidCmd) 410 pkt->cmd = snoop_response_cmd; 411 412 // @todo: Not setting first-word time 413 pkt->busLastWordDelay = snoop_response_latency; 414 return snoop_response_latency; 415} 416 417std::pair<MemCmd, Tick> 418CoherentBus::forwardAtomic(PacketPtr pkt, PortID exclude_slave_port_id) 419{ 420 // the packet may be changed on snoops, record the original 421 // command to enable us to restore it between snoops so that 422 // additional snoops can take place properly 423 MemCmd orig_cmd = pkt->cmd; 424 MemCmd snoop_response_cmd = MemCmd::InvalidCmd; 425 Tick snoop_response_latency = 0; 426 427 // snoops should only happen if the system isn't bypassing caches 428 assert(!system->bypassCaches()); 429 430 for (SlavePortIter s = snoopPorts.begin(); s != snoopPorts.end(); ++s) { 431 SlavePort *p = *s; 432 // we could have gotten this request from a snooping master 433 // (corresponding to our own slave port that is also in 434 // snoopPorts) and should not send it back to where it came 435 // from 436 if (exclude_slave_port_id == InvalidPortID || 437 p->getId() != exclude_slave_port_id) { 438 Tick latency = p->sendAtomicSnoop(pkt); 439 // in contrast to a functional access, we have to keep on 440 // going as all snoopers must be updated even if we get a 441 // response 442 if (pkt->isResponse()) { 443 // response from snoop agent 444 assert(pkt->cmd != orig_cmd); 445 assert(pkt->memInhibitAsserted()); 446 // should only happen once 447 assert(snoop_response_cmd == MemCmd::InvalidCmd); 448 // save response state 449 snoop_response_cmd = pkt->cmd; 450 snoop_response_latency = latency; 451 // restore original packet state for remaining snoopers 452 pkt->cmd = orig_cmd; 453 } 454 } 455 } 456 457 // the packet is restored as part of the loop and any potential 458 // snoop response is part of the returned pair 459 return std::make_pair(snoop_response_cmd, snoop_response_latency); 460} 461 462void 463CoherentBus::recvFunctional(PacketPtr pkt, PortID slave_port_id) 464{ 465 if (!pkt->isPrint()) { 466 // don't do DPRINTFs on PrintReq as it clutters up the output 467 DPRINTF(CoherentBus, 468 "recvFunctional: packet src %s addr 0x%x cmd %s\n", 469 slavePorts[slave_port_id]->name(), pkt->getAddr(), 470 pkt->cmdString()); 471 } 472 473 // uncacheable requests need never be snooped 474 if (!pkt->req->isUncacheable() && !system->bypassCaches()) { 475 // forward to all snoopers but the source 476 forwardFunctional(pkt, slave_port_id); 477 } 478 479 // there is no need to continue if the snooping has found what we 480 // were looking for and the packet is already a response 481 if (!pkt->isResponse()) { 482 PortID dest_id = findPort(pkt->getAddr()); 483 484 masterPorts[dest_id]->sendFunctional(pkt); 485 } 486} 487 488void 489CoherentBus::recvFunctionalSnoop(PacketPtr pkt, PortID master_port_id) 490{ 491 if (!pkt->isPrint()) { 492 // don't do DPRINTFs on PrintReq as it clutters up the output 493 DPRINTF(CoherentBus, 494 "recvFunctionalSnoop: packet src %s addr 0x%x cmd %s\n", 495 masterPorts[master_port_id]->name(), pkt->getAddr(), 496 pkt->cmdString()); 497 } 498 499 // forward to all snoopers 500 forwardFunctional(pkt, InvalidPortID); 501} 502 503void 504CoherentBus::forwardFunctional(PacketPtr pkt, PortID exclude_slave_port_id) 505{ 506 // snoops should only happen if the system isn't bypassing caches 507 assert(!system->bypassCaches()); 508 509 for (SlavePortIter s = snoopPorts.begin(); s != snoopPorts.end(); ++s) { 510 SlavePort *p = *s; 511 // we could have gotten this request from a snooping master 512 // (corresponding to our own slave port that is also in 513 // snoopPorts) and should not send it back to where it came 514 // from 515 if (exclude_slave_port_id == InvalidPortID || 516 p->getId() != exclude_slave_port_id) 517 p->sendFunctionalSnoop(pkt); 518 519 // if we get a response we are done 520 if (pkt->isResponse()) { 521 break; 522 } 523 } 524} 525 526unsigned int 527CoherentBus::drain(DrainManager *dm) 528{ 529 // sum up the individual layers 530 return reqLayer.drain(dm) + respLayer.drain(dm) + snoopRespLayer.drain(dm); 531} 532 533CoherentBus * 534CoherentBusParams::create() 535{ 536 return new CoherentBus(this); 537} 538