base_set_assoc.hh revision 13225:8d1621fc586e 
1/*
2 * Copyright (c) 2012-2014,2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005,2014 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 */
42
43/**
44 * @file
45 * Declaration of a base set associative tag store.
46 */
47
48#ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
49#define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
50
51#include <functional>
52#include <string>
53#include <vector>
54
55#include "base/logging.hh"
56#include "base/types.hh"
57#include "mem/cache/base.hh"
58#include "mem/cache/cache_blk.hh"
59#include "mem/cache/replacement_policies/base.hh"
60#include "mem/cache/replacement_policies/replaceable_entry.hh"
61#include "mem/cache/tags/base.hh"
62#include "mem/cache/tags/indexing_policies/base.hh"
63#include "params/BaseSetAssoc.hh"
64
65/**
66 * A basic cache tag store.
67 * @sa  \ref gem5MemorySystem "gem5 Memory System"
68 *
69 * The BaseSetAssoc placement policy divides the cache into s sets of w
70 * cache lines (ways).
71 */
72class BaseSetAssoc : public BaseTags
73{
74  protected:
75    /** The allocatable associativity of the cache (alloc mask). */
76    unsigned allocAssoc;
77
78    /** The cache blocks. */
79    std::vector<CacheBlk> blks;
80
81    /** Whether tags and data are accessed sequentially. */
82    const bool sequentialAccess;
83
84    /** Replacement policy */
85    BaseReplacementPolicy *replacementPolicy;
86
87  public:
88    /** Convenience typedef. */
89     typedef BaseSetAssocParams Params;
90
91    /**
92     * Construct and initialize this tag store.
93     */
94    BaseSetAssoc(const Params *p);
95
96    /**
97     * Destructor
98     */
99    virtual ~BaseSetAssoc() {};
100
101    /**
102     * Initialize blocks and set the parent cache back pointer.
103     *
104     * @param _cache Pointer to parent cache.
105     */
106    void init(BaseCache *_cache) override;
107
108    /**
109     * This function updates the tags when a block is invalidated. It also
110     * updates the replacement data.
111     *
112     * @param blk The block to invalidate.
113     */
114    void invalidate(CacheBlk *blk) override;
115
116    /**
117     * Access block and update replacement data. May not succeed, in which case
118     * nullptr is returned. This has all the implications of a cache
119     * access and should only be used as such. Returns the access latency as a
120     * side effect.
121     * @param addr The address to find.
122     * @param is_secure True if the target memory space is secure.
123     * @param lat The access latency.
124     * @return Pointer to the cache block if found.
125     */
126    CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
127    {
128        CacheBlk *blk = findBlock(addr, is_secure);
129
130        // Access all tags in parallel, hence one in each way.  The data side
131        // either accesses all blocks in parallel, or one block sequentially on
132        // a hit.  Sequential access with a miss doesn't access data.
133        tagAccesses += allocAssoc;
134        if (sequentialAccess) {
135            if (blk != nullptr) {
136                dataAccesses += 1;
137            }
138        } else {
139            dataAccesses += allocAssoc;
140        }
141
142        if (blk != nullptr) {
143            // If a cache hit
144            lat = accessLatency;
145            // Check if the block to be accessed is available. If not,
146            // apply the accessLatency on top of block->whenReady.
147            if (blk->whenReady > curTick() &&
148                cache->ticksToCycles(blk->whenReady - curTick()) >
149                accessLatency) {
150                lat = cache->ticksToCycles(blk->whenReady - curTick()) +
151                accessLatency;
152            }
153
154            // Update number of references to accessed block
155            blk->refCount++;
156
157            // Update replacement data of accessed block
158            replacementPolicy->touch(blk->replacementData);
159        } else {
160            // If a cache miss
161            lat = lookupLatency;
162        }
163
164        return blk;
165    }
166
167    /**
168     * Find replacement victim based on address. The list of evicted blocks
169     * only contains the victim.
170     *
171     * @param addr Address to find a victim for.
172     * @param is_secure True if the target memory space is secure.
173     * @param evict_blks Cache blocks to be evicted.
174     * @return Cache block to be replaced.
175     */
176    CacheBlk* findVictim(Addr addr, const bool is_secure,
177                         std::vector<CacheBlk*>& evict_blks) const override
178    {
179        // Get possible entries to be victimized
180        const std::vector<ReplaceableEntry*> entries =
181            indexingPolicy->getPossibleEntries(addr);
182
183        // Choose replacement victim from replacement candidates
184        CacheBlk* victim = static_cast<CacheBlk*>(replacementPolicy->getVictim(
185                                entries));
186
187        // There is only one eviction for this replacement
188        evict_blks.push_back(victim);
189
190        return victim;
191    }
192
193    /**
194     * Insert the new block into the cache and update replacement data.
195     *
196     * @param addr Address of the block.
197     * @param is_secure Whether the block is in secure space or not.
198     * @param src_master_ID The source requestor ID.
199     * @param task_ID The new task ID.
200     * @param blk The block to update.
201     */
202    void insertBlock(const Addr addr, const bool is_secure,
203                     const int src_master_ID, const uint32_t task_ID,
204                     CacheBlk *blk) override
205    {
206        // Insert block
207        BaseTags::insertBlock(addr, is_secure, src_master_ID, task_ID, blk);
208
209        // Increment tag counter
210        tagsInUse++;
211
212        // Update replacement policy
213        replacementPolicy->reset(blk->replacementData);
214    }
215
216    /**
217     * Limit the allocation for the cache ways.
218     * @param ways The maximum number of ways available for replacement.
219     */
220    virtual void setWayAllocationMax(int ways) override
221    {
222        fatal_if(ways < 1, "Allocation limit must be greater than zero");
223        allocAssoc = ways;
224    }
225
226    /**
227     * Get the way allocation mask limit.
228     * @return The maximum number of ways available for replacement.
229     */
230    virtual int getWayAllocationMax() const override
231    {
232        return allocAssoc;
233    }
234
235    /**
236     * Regenerate the block address from the tag and indexing location.
237     *
238     * @param block The block.
239     * @return the block address.
240     */
241    Addr regenerateBlkAddr(const CacheBlk* blk) const override
242    {
243        return indexingPolicy->regenerateAddr(blk->tag, blk);
244    }
245
246    void forEachBlk(std::function<void(CacheBlk &)> visitor) override {
247        for (CacheBlk& blk : blks) {
248            visitor(blk);
249        }
250    }
251
252    bool anyBlk(std::function<bool(CacheBlk &)> visitor) override {
253        for (CacheBlk& blk : blks) {
254            if (visitor(blk)) {
255                return true;
256            }
257        }
258        return false;
259    }
260};
261
262#endif //__MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
263