base.cc revision 12704:4d2bcc64d469
1/* 2 * Copyright (c) 2013,2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2003-2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Erik Hallnor 41 * Ron Dreslinski 42 */ 43 44/** 45 * @file 46 * Definitions of BaseTags. 47 */ 48 49#include "mem/cache/tags/base.hh" 50 51#include "mem/cache/base.hh" 52#include "sim/sim_exit.hh" 53 54BaseTags::BaseTags(const Params *p) 55 : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1), 56 size(p->size), 57 lookupLatency(p->tag_latency), 58 accessLatency(p->sequential_access ? 59 p->tag_latency + p->data_latency : 60 std::max(p->tag_latency, p->data_latency)), 61 cache(nullptr), 62 warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)), 63 warmedUp(false), numBlocks(p->size / p->block_size), 64 dataBlks(new uint8_t[p->size]) // Allocate data storage in one big chunk 65{ 66} 67 68void 69BaseTags::setCache(BaseCache *_cache) 70{ 71 assert(!cache); 72 cache = _cache; 73} 74 75void 76BaseTags::insertBlock(PacketPtr pkt, CacheBlk *blk) 77{ 78 // Get address 79 Addr addr = pkt->getAddr(); 80 81 if (blk->isValid()) { 82 invalidate(blk); 83 } 84 85 // Previous block, if existed, has been removed, and now we have 86 // to insert the new one 87 88 // Deal with what we are bringing in 89 MasterID master_id = pkt->req->masterId(); 90 assert(master_id < cache->system->maxMasters()); 91 occupancies[master_id]++; 92 93 // Insert block with tag, src master id and task id 94 blk->insert(extractTag(addr), pkt->isSecure(), master_id, 95 pkt->req->taskId()); 96 97 tagsInUse++; 98 if (!warmedUp && tagsInUse.value() >= warmupBound) { 99 warmedUp = true; 100 warmupCycle = curTick(); 101 } 102 103 // We only need to write into one tag and one data block. 104 tagAccesses += 1; 105 dataAccesses += 1; 106} 107 108void 109BaseTags::regStats() 110{ 111 ClockedObject::regStats(); 112 113 using namespace Stats; 114 115 tagsInUse 116 .name(name() + ".tagsinuse") 117 .desc("Cycle average of tags in use") 118 ; 119 120 totalRefs 121 .name(name() + ".total_refs") 122 .desc("Total number of references to valid blocks.") 123 ; 124 125 sampledRefs 126 .name(name() + ".sampled_refs") 127 .desc("Sample count of references to valid blocks.") 128 ; 129 130 avgRefs 131 .name(name() + ".avg_refs") 132 .desc("Average number of references to valid blocks.") 133 ; 134 135 avgRefs = totalRefs/sampledRefs; 136 137 warmupCycle 138 .name(name() + ".warmup_cycle") 139 .desc("Cycle when the warmup percentage was hit.") 140 ; 141 142 occupancies 143 .init(cache->system->maxMasters()) 144 .name(name() + ".occ_blocks") 145 .desc("Average occupied blocks per requestor") 146 .flags(nozero | nonan) 147 ; 148 for (int i = 0; i < cache->system->maxMasters(); i++) { 149 occupancies.subname(i, cache->system->getMasterName(i)); 150 } 151 152 avgOccs 153 .name(name() + ".occ_percent") 154 .desc("Average percentage of cache occupancy") 155 .flags(nozero | total) 156 ; 157 for (int i = 0; i < cache->system->maxMasters(); i++) { 158 avgOccs.subname(i, cache->system->getMasterName(i)); 159 } 160 161 avgOccs = occupancies / Stats::constant(numBlocks); 162 163 occupanciesTaskId 164 .init(ContextSwitchTaskId::NumTaskId) 165 .name(name() + ".occ_task_id_blocks") 166 .desc("Occupied blocks per task id") 167 .flags(nozero | nonan) 168 ; 169 170 ageTaskId 171 .init(ContextSwitchTaskId::NumTaskId, 5) 172 .name(name() + ".age_task_id_blocks") 173 .desc("Occupied blocks per task id") 174 .flags(nozero | nonan) 175 ; 176 177 percentOccsTaskId 178 .name(name() + ".occ_task_id_percent") 179 .desc("Percentage of cache occupancy per task id") 180 .flags(nozero) 181 ; 182 183 percentOccsTaskId = occupanciesTaskId / Stats::constant(numBlocks); 184 185 tagAccesses 186 .name(name() + ".tag_accesses") 187 .desc("Number of tag accesses") 188 ; 189 190 dataAccesses 191 .name(name() + ".data_accesses") 192 .desc("Number of data accesses") 193 ; 194 195 registerDumpCallback(new BaseTagsDumpCallback(this)); 196 registerExitCallback(new BaseTagsCallback(this)); 197} 198