stride.cc revision 13424:1744211c9a65 
1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ron Dreslinski
41 *          Steve Reinhardt
42 */
43
44/**
45 * @file
46 * Stride Prefetcher template instantiations.
47 */
48
49#include "mem/cache/prefetch/stride.hh"
50
51#include <cassert>
52
53#include "base/intmath.hh"
54#include "base/logging.hh"
55#include "base/random.hh"
56#include "base/trace.hh"
57#include "debug/HWPrefetch.hh"
58#include "params/StridePrefetcher.hh"
59
60StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p)
61    : QueuedPrefetcher(p),
62      maxConf(p->max_conf),
63      threshConf(p->thresh_conf),
64      minConf(p->min_conf),
65      startConf(p->start_conf),
66      pcTableAssoc(p->table_assoc),
67      pcTableSets(p->table_sets),
68      useMasterId(p->use_master_id),
69      degree(p->degree),
70      pcTable(pcTableAssoc, pcTableSets, name())
71{
72    assert(isPowerOf2(pcTableSets));
73}
74
75std::vector<std::vector<StridePrefetcher::StrideEntry>>&
76StridePrefetcher::PCTable::allocateNewContext(int context)
77{
78    auto res = entries.insert(std::make_pair(context,
79        std::vector<std::vector<StrideEntry>>(pcTableSets)));
80    auto it = res.first;
81    chatty_assert(res.second, "Allocating an already created context\n");
82    assert(it->first == context);
83
84    DPRINTF(HWPrefetch, "Adding context %i with stride entries\n", context);
85
86    std::vector<std::vector<StrideEntry>>& table = it->second;
87    for (auto& set : table) {
88        set.resize(pcTableAssoc);
89    }
90    return table;
91}
92
93StridePrefetcher::PCTable::~PCTable()
94{
95}
96
97void
98StridePrefetcher::calculatePrefetch(const PacketPtr &pkt,
99                                    std::vector<AddrPriority> &addresses)
100{
101    if (!pkt->req->hasPC()) {
102        DPRINTF(HWPrefetch, "Ignoring request with no PC.\n");
103        return;
104    }
105
106    // Get required packet info
107    Addr pkt_addr = pkt->getAddr();
108    Addr pc = pkt->req->getPC();
109    bool is_secure = pkt->isSecure();
110    MasterID master_id = useMasterId ? pkt->req->masterId() : 0;
111
112    // Search for entry in the pc table
113    StrideEntry *entry = findEntry(pc, is_secure, master_id);
114
115    if (entry != nullptr) {
116        // Hit in table
117        int new_stride = pkt_addr - entry->lastAddr;
118        bool stride_match = (new_stride == entry->stride);
119
120        // Adjust confidence for stride entry
121        if (stride_match && new_stride != 0) {
122            if (entry->confidence < maxConf)
123                entry->confidence++;
124        } else {
125            if (entry->confidence > minConf)
126                entry->confidence--;
127            // If confidence has dropped below the threshold, train new stride
128            if (entry->confidence < threshConf)
129                entry->stride = new_stride;
130        }
131
132        DPRINTF(HWPrefetch, "Hit: PC %x pkt_addr %x (%s) stride %d (%s), "
133                "conf %d\n", pc, pkt_addr, is_secure ? "s" : "ns", new_stride,
134                stride_match ? "match" : "change",
135                entry->confidence);
136
137        entry->lastAddr = pkt_addr;
138
139        // Abort prefetch generation if below confidence threshold
140        if (entry->confidence < threshConf)
141            return;
142
143        // Generate up to degree prefetches
144        for (int d = 1; d <= degree; d++) {
145            // Round strides up to atleast 1 cacheline
146            int prefetch_stride = new_stride;
147            if (abs(new_stride) < blkSize) {
148                prefetch_stride = (new_stride < 0) ? -blkSize : blkSize;
149            }
150
151            Addr new_addr = pkt_addr + d * prefetch_stride;
152            if (samePage(pkt_addr, new_addr)) {
153                DPRINTF(HWPrefetch, "Queuing prefetch to %#x.\n", new_addr);
154                addresses.push_back(AddrPriority(new_addr, 0));
155            } else {
156                // Record the number of page crossing prefetches generated
157                pfSpanPage += degree - d + 1;
158                DPRINTF(HWPrefetch, "Ignoring page crossing prefetch.\n");
159                return;
160            }
161        }
162    } else {
163        // Miss in table
164        DPRINTF(HWPrefetch, "Miss: PC %x pkt_addr %x (%s)\n", pc, pkt_addr,
165                is_secure ? "s" : "ns");
166
167        StrideEntry* entry = pcTableVictim(pc, master_id);
168        entry->instAddr = pc;
169        entry->lastAddr = pkt_addr;
170        entry->isSecure= is_secure;
171        entry->stride = 0;
172        entry->confidence = startConf;
173    }
174}
175
176inline Addr
177StridePrefetcher::pcHash(Addr pc) const
178{
179    Addr hash1 = pc >> 1;
180    Addr hash2 = hash1 >> floorLog2(pcTableSets);
181    return (hash1 ^ hash2) & (Addr)(pcTableSets - 1);
182}
183
184inline StridePrefetcher::StrideEntry*
185StridePrefetcher::pcTableVictim(Addr pc, int master_id)
186{
187    // Rand replacement for now
188    int set = pcHash(pc);
189    int way = random_mt.random<int>(0, pcTableAssoc - 1);
190
191    DPRINTF(HWPrefetch, "Victimizing lookup table[%d][%d].\n", set, way);
192    return &pcTable[master_id][set][way];
193}
194
195inline StridePrefetcher::StrideEntry*
196StridePrefetcher::findEntry(Addr pc, bool is_secure, int master_id)
197{
198    int set = pcHash(pc);
199    std::vector<StrideEntry>& set_entries = pcTable[master_id][set];
200    for (int way = 0; way < pcTableAssoc; way++) {
201        StrideEntry* entry = &set_entries[way];
202        // Search ways for match
203        if ((entry->instAddr == pc) && (entry->isSecure == is_secure)) {
204            DPRINTF(HWPrefetch, "Lookup hit table[%d][%d].\n", set, way);
205            return entry;
206        }
207    }
208    return nullptr;
209}
210
211StridePrefetcher*
212StridePrefetcherParams::create()
213{
214    return new StridePrefetcher(this);
215}
216