stride.cc revision 11793:ef606668d247
1/* 2 * Copyright (c) 2012-2013, 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Ron Dreslinski 41 * Steve Reinhardt 42 */ 43 44/** 45 * @file 46 * Stride Prefetcher template instantiations. 47 */ 48 49#include "mem/cache/prefetch/stride.hh" 50 51#include "base/random.hh" 52#include "debug/HWPrefetch.hh" 53 54StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p) 55 : QueuedPrefetcher(p), 56 maxConf(p->max_conf), 57 threshConf(p->thresh_conf), 58 minConf(p->min_conf), 59 startConf(p->start_conf), 60 pcTableAssoc(p->table_assoc), 61 pcTableSets(p->table_sets), 62 useMasterId(p->use_master_id), 63 degree(p->degree), 64 pcTable(pcTableAssoc, pcTableSets, name()) 65{ 66 // Don't consult stride prefetcher on instruction accesses 67 onInst = false; 68 69 assert(isPowerOf2(pcTableSets)); 70} 71 72StridePrefetcher::StrideEntry** 73StridePrefetcher::PCTable::allocateNewContext(int context) 74{ 75 auto res = entries.insert(std::make_pair(context, 76 new StrideEntry*[pcTableSets])); 77 auto it = res.first; 78 chatty_assert(res.second, "Allocating an already created context\n"); 79 assert(it->first == context); 80 81 DPRINTF(HWPrefetch, "Adding context %i with stride entries at %p\n", 82 context, it->second); 83 84 StrideEntry** entry = it->second; 85 for (int s = 0; s < pcTableSets; s++) { 86 entry[s] = new StrideEntry[pcTableAssoc]; 87 } 88 return entry; 89} 90 91StridePrefetcher::PCTable::~PCTable() { 92 for (auto entry : entries) { 93 for (int s = 0; s < pcTableSets; s++) { 94 delete[] entry.second[s]; 95 } 96 delete[] entry.second; 97 } 98} 99 100void 101StridePrefetcher::calculatePrefetch(const PacketPtr &pkt, 102 std::vector<AddrPriority> &addresses) 103{ 104 if (!pkt->req->hasPC()) { 105 DPRINTF(HWPrefetch, "Ignoring request with no PC.\n"); 106 return; 107 } 108 109 // Get required packet info 110 Addr pkt_addr = pkt->getAddr(); 111 Addr pc = pkt->req->getPC(); 112 bool is_secure = pkt->isSecure(); 113 MasterID master_id = useMasterId ? pkt->req->masterId() : 0; 114 115 // Lookup pc-based information 116 StrideEntry *entry; 117 118 if (pcTableHit(pc, is_secure, master_id, entry)) { 119 // Hit in table 120 int new_stride = pkt_addr - entry->lastAddr; 121 bool stride_match = (new_stride == entry->stride); 122 123 // Adjust confidence for stride entry 124 if (stride_match && new_stride != 0) { 125 if (entry->confidence < maxConf) 126 entry->confidence++; 127 } else { 128 if (entry->confidence > minConf) 129 entry->confidence--; 130 // If confidence has dropped below the threshold, train new stride 131 if (entry->confidence < threshConf) 132 entry->stride = new_stride; 133 } 134 135 DPRINTF(HWPrefetch, "Hit: PC %x pkt_addr %x (%s) stride %d (%s), " 136 "conf %d\n", pc, pkt_addr, is_secure ? "s" : "ns", new_stride, 137 stride_match ? "match" : "change", 138 entry->confidence); 139 140 entry->lastAddr = pkt_addr; 141 142 // Abort prefetch generation if below confidence threshold 143 if (entry->confidence < threshConf) 144 return; 145 146 // Generate up to degree prefetches 147 for (int d = 1; d <= degree; d++) { 148 // Round strides up to atleast 1 cacheline 149 int prefetch_stride = new_stride; 150 if (abs(new_stride) < blkSize) { 151 prefetch_stride = (new_stride < 0) ? -blkSize : blkSize; 152 } 153 154 Addr new_addr = pkt_addr + d * prefetch_stride; 155 if (samePage(pkt_addr, new_addr)) { 156 DPRINTF(HWPrefetch, "Queuing prefetch to %#x.\n", new_addr); 157 addresses.push_back(AddrPriority(new_addr, 0)); 158 } else { 159 // Record the number of page crossing prefetches generated 160 pfSpanPage += degree - d + 1; 161 DPRINTF(HWPrefetch, "Ignoring page crossing prefetch.\n"); 162 return; 163 } 164 } 165 } else { 166 // Miss in table 167 DPRINTF(HWPrefetch, "Miss: PC %x pkt_addr %x (%s)\n", pc, pkt_addr, 168 is_secure ? "s" : "ns"); 169 170 StrideEntry* entry = pcTableVictim(pc, master_id); 171 entry->instAddr = pc; 172 entry->lastAddr = pkt_addr; 173 entry->isSecure= is_secure; 174 entry->stride = 0; 175 entry->confidence = startConf; 176 } 177} 178 179inline Addr 180StridePrefetcher::pcHash(Addr pc) const 181{ 182 Addr hash1 = pc >> 1; 183 Addr hash2 = hash1 >> floorLog2(pcTableSets); 184 return (hash1 ^ hash2) & (Addr)(pcTableSets - 1); 185} 186 187inline StridePrefetcher::StrideEntry* 188StridePrefetcher::pcTableVictim(Addr pc, int master_id) 189{ 190 // Rand replacement for now 191 int set = pcHash(pc); 192 int way = random_mt.random<int>(0, pcTableAssoc - 1); 193 194 DPRINTF(HWPrefetch, "Victimizing lookup table[%d][%d].\n", set, way); 195 return &pcTable[master_id][set][way]; 196} 197 198inline bool 199StridePrefetcher::pcTableHit(Addr pc, bool is_secure, int master_id, 200 StrideEntry* &entry) 201{ 202 int set = pcHash(pc); 203 StrideEntry* set_entries = pcTable[master_id][set]; 204 for (int way = 0; way < pcTableAssoc; way++) { 205 // Search ways for match 206 if (set_entries[way].instAddr == pc && 207 set_entries[way].isSecure == is_secure) { 208 DPRINTF(HWPrefetch, "Lookup hit table[%d][%d].\n", set, way); 209 entry = &set_entries[way]; 210 return true; 211 } 212 } 213 return false; 214} 215 216StridePrefetcher* 217StridePrefetcherParams::create() 218{ 219 return new StridePrefetcher(this); 220} 221