stride.cc revision 10054:baaed1733069 
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ron Dreslinski
41 *          Steve Reinhardt
42 */
43
44/**
45 * @file
46 * Stride Prefetcher template instantiations.
47 */
48
49#include "base/trace.hh"
50#include "debug/HWPrefetch.hh"
51#include "mem/cache/prefetch/stride.hh"
52
53void
54StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
55                                    std::list<Cycles> &delays)
56{
57    if (!pkt->req->hasPC()) {
58        DPRINTF(HWPrefetch, "ignoring request with no PC");
59        return;
60    }
61
62    Addr data_addr = pkt->getAddr();
63    bool is_secure = pkt->isSecure();
64    MasterID master_id = useMasterId ? pkt->req->masterId() : 0;
65    Addr pc = pkt->req->getPC();
66    assert(master_id < Max_Contexts);
67    std::list<StrideEntry*> &tab = table[master_id];
68
69    // Revert to simple N-block ahead prefetch for instruction fetches
70    if (instTagged && pkt->req->isInstFetch()) {
71        for (int d = 1; d <= degree; d++) {
72            Addr new_addr = data_addr + d * blkSize;
73            if (pageStop && !samePage(data_addr, new_addr)) {
74                // Spanned the page, so now stop
75                pfSpanPage += degree - d + 1;
76                return;
77            }
78            DPRINTF(HWPrefetch, "queuing prefetch to %x @ %d\n",
79                    new_addr, latency);
80            addresses.push_back(new_addr);
81            delays.push_back(latency);
82        }
83        return;
84    }
85
86    /* Scan Table for instAddr Match */
87    std::list<StrideEntry*>::iterator iter;
88    for (iter = tab.begin(); iter != tab.end(); iter++) {
89        // Entries have to match on the security state as well
90        if ((*iter)->instAddr == pc && (*iter)->isSecure == is_secure)
91            break;
92    }
93
94    if (iter != tab.end()) {
95        // Hit in table
96
97        int new_stride = data_addr - (*iter)->missAddr;
98        bool stride_match = (new_stride == (*iter)->stride);
99
100        if (stride_match && new_stride != 0) {
101            (*iter)->tolerance = true;
102            if ((*iter)->confidence < Max_Conf)
103                (*iter)->confidence++;
104        } else {
105            if (!((*iter)->tolerance)) {
106                (*iter)->stride = new_stride;
107                if ((*iter)->confidence > Min_Conf)
108                    (*iter)->confidence = 0;
109            } else {
110                (*iter)->tolerance = false;
111            }
112        }
113
114        DPRINTF(HWPrefetch, "hit: PC %x data_addr %x (%s) stride %d (%s), "
115                "conf %d\n", pc, data_addr, is_secure ? "s" : "ns", new_stride,
116                stride_match ? "match" : "change",
117                (*iter)->confidence);
118
119        (*iter)->missAddr = data_addr;
120        (*iter)->isSecure = is_secure;
121
122        if ((*iter)->confidence <= 0)
123            return;
124
125        for (int d = 1; d <= degree; d++) {
126            Addr new_addr = data_addr + d * (*iter)->stride;
127            if (pageStop && !samePage(data_addr, new_addr)) {
128                // Spanned the page, so now stop
129                pfSpanPage += degree - d + 1;
130                return;
131            } else {
132                DPRINTF(HWPrefetch, "  queuing prefetch to %x (%s) @ %d\n",
133                        new_addr, is_secure ? "s" : "ns", latency);
134                addresses.push_back(new_addr);
135                delays.push_back(latency);
136            }
137        }
138    } else {
139        // Miss in table
140        // Find lowest confidence and replace
141
142        DPRINTF(HWPrefetch, "miss: PC %x data_addr %x (%s)\n", pc, data_addr,
143                is_secure ? "s" : "ns");
144
145        if (tab.size() >= 256) { //set default table size is 256
146            std::list<StrideEntry*>::iterator min_pos = tab.begin();
147            int min_conf = (*min_pos)->confidence;
148            for (iter = min_pos, ++iter; iter != tab.end(); ++iter) {
149                if ((*iter)->confidence < min_conf){
150                    min_pos = iter;
151                    min_conf = (*iter)->confidence;
152                }
153            }
154            DPRINTF(HWPrefetch, "  replacing PC %x (%s)\n",
155                    (*min_pos)->instAddr, (*min_pos)->isSecure ? "s" : "ns");
156
157            // free entry and delete it
158            delete *min_pos;
159            tab.erase(min_pos);
160        }
161
162        StrideEntry *new_entry = new StrideEntry;
163        new_entry->instAddr = pc;
164        new_entry->missAddr = data_addr;
165        new_entry->isSecure = is_secure;
166        new_entry->stride = 0;
167        new_entry->confidence = 0;
168        new_entry->tolerance = false;
169        tab.push_back(new_entry);
170    }
171}
172
173
174StridePrefetcher*
175StridePrefetcherParams::create()
176{
177   return new StridePrefetcher(this);
178}
179