Prefetcher.py revision 13416:d90887d0c889 
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13# Copyright (c) 2005 The Regents of The University of Michigan
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38#
39# Authors: Ron Dreslinski
40#          Mitch Hayenga
41
42from ClockedObject import ClockedObject
43from m5.SimObject import *
44from m5.params import *
45from m5.proxy import *
46
47class HWPProbeEvent(object):
48    def __init__(self, prefetcher, obj, *listOfNames):
49        self.obj = obj
50        self.prefetcher = prefetcher
51        self.names = listOfNames
52
53    def register(self):
54        if self.obj:
55            for name in self.names:
56                self.prefetcher.getCCObject().addEventProbe(
57                    self.obj.getCCObject(), name)
58
59class BasePrefetcher(ClockedObject):
60    type = 'BasePrefetcher'
61    abstract = True
62    cxx_header = "mem/cache/prefetch/base.hh"
63    cxx_exports = [
64        PyBindMethod("addEventProbe"),
65    ]
66    sys = Param.System(Parent.any, "System this prefetcher belongs to")
67
68    on_miss = Param.Bool(False, "Only notify prefetcher on misses")
69    on_read = Param.Bool(True, "Notify prefetcher on reads")
70    on_write = Param.Bool(True, "Notify prefetcher on writes")
71    on_data  = Param.Bool(True, "Notify prefetcher on data accesses")
72    on_inst  = Param.Bool(True, "Notify prefetcher on instruction accesses")
73    prefetch_on_access = Param.Bool(Parent.prefetch_on_access,
74        "Notify the hardware prefetcher on every access (not just misses)")
75
76    _events = []
77    def addEvent(self, newObject):
78        self._events.append(newObject)
79
80    # Override the normal SimObject::regProbeListeners method and
81    # register deferred event handlers.
82    def regProbeListeners(self):
83        for event in self._events:
84           event.register()
85        self.getCCObject().regProbeListeners()
86
87    def listenFromProbe(self, simObj, *probeNames):
88        if not isinstance(simObj, SimObject):
89            raise TypeError("argument must be of SimObject type")
90        if len(probeNames) <= 0:
91            raise TypeError("probeNames must have at least one element")
92        self.addEvent(HWPProbeEvent(self, simObj, *probeNames))
93
94class QueuedPrefetcher(BasePrefetcher):
95    type = "QueuedPrefetcher"
96    abstract = True
97    cxx_class = "QueuedPrefetcher"
98    cxx_header = "mem/cache/prefetch/queued.hh"
99    latency = Param.Int(1, "Latency for generated prefetches")
100    queue_size = Param.Int(32, "Maximum number of queued prefetches")
101    queue_squash = Param.Bool(True, "Squash queued prefetch on demand access")
102    queue_filter = Param.Bool(True, "Don't queue redundant prefetches")
103    cache_snoop = Param.Bool(False, "Snoop cache to eliminate redundant request")
104
105    tag_prefetch = Param.Bool(True, "Tag prefetch with PC of generating access")
106
107class StridePrefetcher(QueuedPrefetcher):
108    type = 'StridePrefetcher'
109    cxx_class = 'StridePrefetcher'
110    cxx_header = "mem/cache/prefetch/stride.hh"
111
112    max_conf = Param.Int(7, "Maximum confidence level")
113    thresh_conf = Param.Int(4, "Threshold confidence level")
114    min_conf = Param.Int(0, "Minimum confidence level")
115    start_conf = Param.Int(4, "Starting confidence for new entries")
116
117    table_sets = Param.Int(16, "Number of sets in PC lookup table")
118    table_assoc = Param.Int(4, "Associativity of PC lookup table")
119    use_master_id = Param.Bool(True, "Use master id based history")
120
121    degree = Param.Int(4, "Number of prefetches to generate")
122
123class TaggedPrefetcher(QueuedPrefetcher):
124    type = 'TaggedPrefetcher'
125    cxx_class = 'TaggedPrefetcher'
126    cxx_header = "mem/cache/prefetch/tagged.hh"
127
128    degree = Param.Int(2, "Number of prefetches to generate")
129