mshr.cc revision 4666
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Erik Hallnor 29 * Dave Greene 30 */ 31 32/** 33 * @file 34 * Miss Status and Handling Register (MSHR) definitions. 35 */ 36 37#include <assert.h> 38#include <string> 39#include <vector> 40#include <algorithm> 41 42#include "mem/cache/miss/mshr.hh" 43#include "sim/core.hh" // for curTick 44#include "sim/host.hh" 45#include "base/misc.hh" 46#include "mem/cache/cache.hh" 47 48using namespace std; 49 50MSHR::MSHR() 51{ 52 inService = false; 53 ntargets = 0; 54 threadNum = -1; 55} 56 57void 58MSHR::allocate(Addr _addr, int _size, PacketPtr target, 59 Tick when, Counter _order) 60{ 61 addr = _addr; 62 size = _size; 63 readyTick = when; 64 order = _order; 65 assert(target); 66 isCacheFill = false; 67 needsExclusive = target->needsExclusive(); 68 _isUncacheable = target->req->isUncacheable(); 69 inService = false; 70 threadNum = 0; 71 ntargets = 1; 72 // Don't know of a case where we would allocate a new MSHR for a 73 // snoop (mem-side request), so set cpuSide to true here. 74 targets.push_back(Target(target, when, _order, true)); 75 assert(deferredTargets.empty()); 76 deferredNeedsExclusive = false; 77 pendingInvalidate = false; 78} 79 80void 81MSHR::deallocate() 82{ 83 assert(targets.empty()); 84 assert(deferredTargets.empty()); 85 assert(ntargets == 0); 86 inService = false; 87 //allocIter = NULL; 88 //readyIter = NULL; 89} 90 91/* 92 * Adds a target to an MSHR 93 */ 94void 95MSHR::allocateTarget(PacketPtr target, Tick when, Counter _order) 96{ 97 if (inService) { 98 if (!deferredTargets.empty() || pendingInvalidate || 99 (!needsExclusive && target->needsExclusive())) { 100 // need to put on deferred list 101 deferredTargets.push_back(Target(target, when, _order, true)); 102 if (target->needsExclusive()) { 103 deferredNeedsExclusive = true; 104 } 105 } else { 106 // still OK to append to outstanding request 107 targets.push_back(Target(target, when, _order, true)); 108 } 109 } else { 110 if (target->needsExclusive()) { 111 needsExclusive = true; 112 } 113 114 targets.push_back(Target(target, when, _order, true)); 115 } 116 117 ++ntargets; 118} 119 120void 121MSHR::allocateSnoopTarget(PacketPtr target, Tick when, Counter _order) 122{ 123 assert(inService); // don't bother to call otherwise 124 125 if (pendingInvalidate) { 126 // a prior snoop has already appended an invalidation, so 127 // logically we don't have the block anymore... 128 return; 129 } 130 131 if (needsExclusive) { 132 // We're awaiting an exclusive copy, so ownership is pending. 133 // It's up to us to respond once the data arrives. 134 target->assertMemInhibit(); 135 } else if (target->needsExclusive()) { 136 // This transaction will take away our pending copy 137 pendingInvalidate = true; 138 } else { 139 // If we're not going to supply data or perform an 140 // invalidation, we don't need to save this. 141 return; 142 } 143 144 targets.push_back(Target(target, when, _order, false)); 145 ++ntargets; 146} 147 148 149bool 150MSHR::promoteDeferredTargets() 151{ 152 if (deferredTargets.empty()) { 153 return false; 154 } 155 156 assert(targets.empty()); 157 targets = deferredTargets; 158 deferredTargets.clear(); 159 assert(targets.size() == ntargets); 160 161 needsExclusive = deferredNeedsExclusive; 162 pendingInvalidate = false; 163 deferredNeedsExclusive = false; 164 order = targets.front().order; 165 readyTick = std::max(curTick, targets.front().time); 166 167 return true; 168} 169 170 171void 172MSHR::dump() 173{ 174 ccprintf(cerr, 175 "inService: %d thread: %d\n" 176 "Addr: %x ntargets %d\n" 177 "Targets:\n", 178 inService, threadNum, addr, ntargets); 179 180 TargetListIterator tar_it = targets.begin(); 181 for (int i = 0; i < ntargets; i++) { 182 assert(tar_it != targets.end()); 183 184 ccprintf(cerr, "\t%d: Addr: %x cmd: %s\n", 185 i, tar_it->pkt->getAddr(), tar_it->pkt->cmdString()); 186 187 tar_it++; 188 } 189 ccprintf(cerr, "\n"); 190} 191 192MSHR::~MSHR() 193{ 194} 195