1/*
2 * Copyright (c) 2012-2013, 2015-2019 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Erik Hallnor
42 *          Dave Greene
43 *          Nikos Nikoleris
44 */
45
46/**
47 * @file
48 * Miss Status and Handling Register (MSHR) definitions.
49 */
50
51#include "mem/cache/mshr.hh"
52
53#include <cassert>
54#include <string>
55
56#include "base/logging.hh"
57#include "base/trace.hh"
58#include "base/types.hh"
59#include "debug/Cache.hh"
60#include "mem/cache/base.hh"
61#include "mem/request.hh"
62#include "sim/core.hh"
63
64MSHR::MSHR() : downstreamPending(false),
65               pendingModified(false),
66               postInvalidate(false), postDowngrade(false),
67               wasWholeLineWrite(false), isForward(false)
68{
69}
70
71MSHR::TargetList::TargetList()
72    : needsWritable(false), hasUpgrade(false), allocOnFill(false),
73      hasFromCache(false)
74{}
75
76
77void
78MSHR::TargetList::updateFlags(PacketPtr pkt, Target::Source source,
79                              bool alloc_on_fill)
80{
81    if (source != Target::FromSnoop) {
82        if (pkt->needsWritable()) {
83            needsWritable = true;
84        }
85
86        // StoreCondReq is effectively an upgrade if it's in an MSHR
87        // since it would have been failed already if we didn't have a
88        // read-only copy
89        if (pkt->isUpgrade() || pkt->cmd == MemCmd::StoreCondReq) {
90            hasUpgrade = true;
91        }
92
93        // potentially re-evaluate whether we should allocate on a fill or
94        // not
95        allocOnFill = allocOnFill || alloc_on_fill;
96
97        if (source != Target::FromPrefetcher) {
98            hasFromCache = hasFromCache || pkt->fromCache();
99
100            updateWriteFlags(pkt);
101        }
102    }
103}
104
105void
106MSHR::TargetList::populateFlags()
107{
108    resetFlags();
109    for (auto& t: *this) {
110        updateFlags(t.pkt, t.source, t.allocOnFill);
111    }
112}
113
114inline void
115MSHR::TargetList::add(PacketPtr pkt, Tick readyTime,
116                      Counter order, Target::Source source, bool markPending,
117                      bool alloc_on_fill)
118{
119    updateFlags(pkt, source, alloc_on_fill);
120    if (markPending) {
121        // Iterate over the SenderState stack and see if we find
122        // an MSHR entry. If we do, set the downstreamPending
123        // flag. Otherwise, do nothing.
124        MSHR *mshr = pkt->findNextSenderState<MSHR>();
125        if (mshr != nullptr) {
126            assert(!mshr->downstreamPending);
127            mshr->downstreamPending = true;
128        } else {
129            // No need to clear downstreamPending later
130            markPending = false;
131        }
132    }
133
134    emplace_back(pkt, readyTime, order, source, markPending, alloc_on_fill);
135}
136
137
138static void
139replaceUpgrade(PacketPtr pkt)
140{
141    // remember if the current packet has data allocated
142    bool has_data = pkt->hasData() || pkt->hasRespData();
143
144    if (pkt->cmd == MemCmd::UpgradeReq) {
145        pkt->cmd = MemCmd::ReadExReq;
146        DPRINTF(Cache, "Replacing UpgradeReq with ReadExReq\n");
147    } else if (pkt->cmd == MemCmd::SCUpgradeReq) {
148        pkt->cmd = MemCmd::SCUpgradeFailReq;
149        DPRINTF(Cache, "Replacing SCUpgradeReq with SCUpgradeFailReq\n");
150    } else if (pkt->cmd == MemCmd::StoreCondReq) {
151        pkt->cmd = MemCmd::StoreCondFailReq;
152        DPRINTF(Cache, "Replacing StoreCondReq with StoreCondFailReq\n");
153    }
154
155    if (!has_data) {
156        // there is no sensible way of setting the data field if the
157        // new command actually would carry data
158        assert(!pkt->hasData());
159
160        if (pkt->hasRespData()) {
161            // we went from a packet that had no data (neither request,
162            // nor response), to one that does, and therefore we need to
163            // actually allocate space for the data payload
164            pkt->allocate();
165        }
166    }
167}
168
169
170void
171MSHR::TargetList::replaceUpgrades()
172{
173    if (!hasUpgrade)
174        return;
175
176    for (auto& t : *this) {
177        replaceUpgrade(t.pkt);
178    }
179
180    hasUpgrade = false;
181}
182
183
184void
185MSHR::TargetList::clearDownstreamPending(MSHR::TargetList::iterator begin,
186                                         MSHR::TargetList::iterator end)
187{
188    for (auto t = begin; t != end; t++) {
189        if (t->markedPending) {
190            // Iterate over the SenderState stack and see if we find
191            // an MSHR entry. If we find one, clear the
192            // downstreamPending flag by calling
193            // clearDownstreamPending(). This recursively clears the
194            // downstreamPending flag in all caches this packet has
195            // passed through.
196            MSHR *mshr = t->pkt->findNextSenderState<MSHR>();
197            if (mshr != nullptr) {
198                mshr->clearDownstreamPending();
199            }
200            t->markedPending = false;
201        }
202    }
203}
204
205void
206MSHR::TargetList::clearDownstreamPending()
207{
208    clearDownstreamPending(begin(), end());
209}
210
211
212bool
213MSHR::TargetList::trySatisfyFunctional(PacketPtr pkt)
214{
215    for (auto& t : *this) {
216        if (pkt->trySatisfyFunctional(t.pkt)) {
217            return true;
218        }
219    }
220
221    return false;
222}
223
224
225void
226MSHR::TargetList::print(std::ostream &os, int verbosity,
227                        const std::string &prefix) const
228{
229    for (auto& t : *this) {
230        const char *s;
231        switch (t.source) {
232          case Target::FromCPU:
233            s = "FromCPU";
234            break;
235          case Target::FromSnoop:
236            s = "FromSnoop";
237            break;
238          case Target::FromPrefetcher:
239            s = "FromPrefetcher";
240            break;
241          default:
242            s = "";
243            break;
244        }
245        ccprintf(os, "%s%s: ", prefix, s);
246        t.pkt->print(os, verbosity, "");
247        ccprintf(os, "\n");
248    }
249}
250
251
252void
253MSHR::allocate(Addr blk_addr, unsigned blk_size, PacketPtr target,
254               Tick when_ready, Counter _order, bool alloc_on_fill)
255{
256    blkAddr = blk_addr;
257    blkSize = blk_size;
258    isSecure = target->isSecure();
259    readyTime = when_ready;
260    order = _order;
261    assert(target);
262    isForward = false;
263    wasWholeLineWrite = false;
264    _isUncacheable = target->req->isUncacheable();
265    inService = false;
266    downstreamPending = false;
267
268    targets.init(blkAddr, blkSize);
269    deferredTargets.init(blkAddr, blkSize);
270
271    // Don't know of a case where we would allocate a new MSHR for a
272    // snoop (mem-side request), so set source according to request here
273    Target::Source source = (target->cmd == MemCmd::HardPFReq) ?
274        Target::FromPrefetcher : Target::FromCPU;
275    targets.add(target, when_ready, _order, source, true, alloc_on_fill);
276
277    // All targets must refer to the same block
278    assert(target->matchBlockAddr(targets.front().pkt, blkSize));
279}
280
281
282void
283MSHR::clearDownstreamPending()
284{
285    assert(downstreamPending);
286    downstreamPending = false;
287    // recursively clear flag on any MSHRs we will be forwarding
288    // responses to
289    targets.clearDownstreamPending();
290}
291
292void
293MSHR::markInService(bool pending_modified_resp)
294{
295    assert(!inService);
296
297    inService = true;
298    pendingModified = targets.needsWritable || pending_modified_resp;
299    postInvalidate = postDowngrade = false;
300
301    if (!downstreamPending) {
302        // let upstream caches know that the request has made it to a
303        // level where it's going to get a response
304        targets.clearDownstreamPending();
305    }
306    // if the line is not considered a whole-line write when sent
307    // downstream, make sure it is also not considered a whole-line
308    // write when receiving the response, and vice versa
309    wasWholeLineWrite = isWholeLineWrite();
310}
311
312
313void
314MSHR::deallocate()
315{
316    assert(targets.empty());
317    targets.resetFlags();
318    assert(deferredTargets.isReset());
319    inService = false;
320}
321
322/*
323 * Adds a target to an MSHR
324 */
325void
326MSHR::allocateTarget(PacketPtr pkt, Tick whenReady, Counter _order,
327                     bool alloc_on_fill)
328{
329    // assume we'd never issue a prefetch when we've got an
330    // outstanding miss
331    assert(pkt->cmd != MemCmd::HardPFReq);
332
333    // if there's a request already in service for this MSHR, we will
334    // have to defer the new target until after the response if any of
335    // the following are true:
336    // - there are other targets already deferred
337    // - there's a pending invalidate to be applied after the response
338    //   comes back (but before this target is processed)
339    // - the MSHR's first (and only) non-deferred target is a cache
340    //   maintenance packet
341    // - the new target is a cache maintenance packet (this is probably
342    //   overly conservative but certainly safe)
343    // - this target requires a writable block and either we're not
344    //   getting a writable block back or we have already snooped
345    //   another read request that will downgrade our writable block
346    //   to non-writable (Shared or Owned)
347    PacketPtr tgt_pkt = targets.front().pkt;
348    if (pkt->req->isCacheMaintenance() ||
349        tgt_pkt->req->isCacheMaintenance() ||
350        !deferredTargets.empty() ||
351        (inService &&
352         (hasPostInvalidate() ||
353          (pkt->needsWritable() &&
354           (!isPendingModified() || hasPostDowngrade() || isForward))))) {
355        // need to put on deferred list
356        if (inService && hasPostInvalidate())
357            replaceUpgrade(pkt);
358        deferredTargets.add(pkt, whenReady, _order, Target::FromCPU, true,
359                            alloc_on_fill);
360    } else {
361        // No request outstanding, or still OK to append to
362        // outstanding request: append to regular target list.  Only
363        // mark pending if current request hasn't been issued yet
364        // (isn't in service).
365        targets.add(pkt, whenReady, _order, Target::FromCPU, !inService,
366                    alloc_on_fill);
367    }
368}
369
370bool
371MSHR::handleSnoop(PacketPtr pkt, Counter _order)
372{
373    DPRINTF(Cache, "%s for %s\n", __func__, pkt->print());
374
375    // when we snoop packets the needsWritable and isInvalidate flags
376    // should always be the same, however, this assumes that we never
377    // snoop writes as they are currently not marked as invalidations
378    panic_if((pkt->needsWritable() != pkt->isInvalidate()) &&
379             !pkt->req->isCacheMaintenance(),
380             "%s got snoop %s where needsWritable, "
381             "does not match isInvalidate", name(), pkt->print());
382
383    if (!inService || (pkt->isExpressSnoop() && downstreamPending)) {
384        // Request has not been issued yet, or it's been issued
385        // locally but is buffered unissued at some downstream cache
386        // which is forwarding us this snoop.  Either way, the packet
387        // we're snooping logically precedes this MSHR's request, so
388        // the snoop has no impact on the MSHR, but must be processed
389        // in the standard way by the cache.  The only exception is
390        // that if we're an L2+ cache buffering an UpgradeReq from a
391        // higher-level cache, and the snoop is invalidating, then our
392        // buffered upgrades must be converted to read exclusives,
393        // since the upper-level cache no longer has a valid copy.
394        // That is, even though the upper-level cache got out on its
395        // local bus first, some other invalidating transaction
396        // reached the global bus before the upgrade did.
397        if (pkt->needsWritable() || pkt->req->isCacheInvalidate()) {
398            targets.replaceUpgrades();
399            deferredTargets.replaceUpgrades();
400        }
401
402        return false;
403    }
404
405    // From here on down, the request issued by this MSHR logically
406    // precedes the request we're snooping.
407    if (pkt->needsWritable() || pkt->req->isCacheInvalidate()) {
408        // snooped request still precedes the re-request we'll have to
409        // issue for deferred targets, if any...
410        deferredTargets.replaceUpgrades();
411    }
412
413    PacketPtr tgt_pkt = targets.front().pkt;
414    if (hasPostInvalidate() || tgt_pkt->req->isCacheInvalidate()) {
415        // a prior snoop has already appended an invalidation or a
416        // cache invalidation operation is in progress, so logically
417        // we don't have the block anymore; no need for further
418        // snooping.
419        return true;
420    }
421
422    if (isPendingModified() || pkt->isInvalidate()) {
423        // We need to save and replay the packet in two cases:
424        // 1. We're awaiting a writable copy (Modified or Exclusive),
425        //    so this MSHR is the orgering point, and we need to respond
426        //    after we receive data.
427        // 2. It's an invalidation (e.g., UpgradeReq), and we need
428        //    to forward the snoop up the hierarchy after the current
429        //    transaction completes.
430
431        // Start by determining if we will eventually respond or not,
432        // matching the conditions checked in Cache::handleSnoop
433        bool will_respond = isPendingModified() && pkt->needsResponse() &&
434                      !pkt->isClean();
435
436        // The packet we are snooping may be deleted by the time we
437        // actually process the target, and we consequently need to
438        // save a copy here. Clear flags and also allocate new data as
439        // the original packet data storage may have been deleted by
440        // the time we get to process this packet. In the cases where
441        // we are not responding after handling the snoop we also need
442        // to create a copy of the request to be on the safe side. In
443        // the latter case the cache is responsible for deleting both
444        // the packet and the request as part of handling the deferred
445        // snoop.
446        PacketPtr cp_pkt = will_respond ? new Packet(pkt, true, true) :
447            new Packet(std::make_shared<Request>(*pkt->req), pkt->cmd,
448                       blkSize, pkt->id);
449
450        if (will_respond) {
451            // we are the ordering point, and will consequently
452            // respond, and depending on whether the packet
453            // needsWritable or not we either pass a Shared line or a
454            // Modified line
455            pkt->setCacheResponding();
456
457            // inform the cache hierarchy that this cache had the line
458            // in the Modified state, even if the response is passed
459            // as Shared (and thus non-writable)
460            pkt->setResponderHadWritable();
461
462            // in the case of an uncacheable request there is no need
463            // to set the responderHadWritable flag, but since the
464            // recipient does not care there is no harm in doing so
465        } else if (isPendingModified() && pkt->isClean()) {
466            // this cache doesn't respond to the clean request, a
467            // destination xbar will respond to this request, but to
468            // do so it needs to know if it should wait for the
469            // WriteCleanReq
470            pkt->setSatisfied();
471        }
472
473        targets.add(cp_pkt, curTick(), _order, Target::FromSnoop,
474                    downstreamPending && targets.needsWritable, false);
475
476        if (pkt->needsWritable() || pkt->isInvalidate()) {
477            // This transaction will take away our pending copy
478            postInvalidate = true;
479        }
480    }
481
482    if (!pkt->needsWritable() && !pkt->req->isUncacheable()) {
483        // This transaction will get a read-shared copy, downgrading
484        // our copy if we had a writable one
485        postDowngrade = true;
486        // make sure that any downstream cache does not respond with a
487        // writable (and dirty) copy even if it has one, unless it was
488        // explicitly asked for one
489        pkt->setHasSharers();
490    }
491
492    return true;
493}
494
495MSHR::TargetList
496MSHR::extractServiceableTargets(PacketPtr pkt)
497{
498    TargetList ready_targets;
499    ready_targets.init(blkAddr, blkSize);
500    // If the downstream MSHR got an invalidation request then we only
501    // service the first of the FromCPU targets and any other
502    // non-FromCPU target. This way the remaining FromCPU targets
503    // issue a new request and get a fresh copy of the block and we
504    // avoid memory consistency violations.
505    if (pkt->cmd == MemCmd::ReadRespWithInvalidate) {
506        auto it = targets.begin();
507        assert((it->source == Target::FromCPU) ||
508               (it->source == Target::FromPrefetcher));
509        ready_targets.push_back(*it);
510        it = targets.erase(it);
511        while (it != targets.end()) {
512            if (it->source == Target::FromCPU) {
513                it++;
514            } else {
515                assert(it->source == Target::FromSnoop);
516                ready_targets.push_back(*it);
517                it = targets.erase(it);
518            }
519        }
520        ready_targets.populateFlags();
521    } else {
522        std::swap(ready_targets, targets);
523    }
524    targets.populateFlags();
525
526    return ready_targets;
527}
528
529bool
530MSHR::promoteDeferredTargets()
531{
532    if (targets.empty() && deferredTargets.empty()) {
533        // nothing to promote
534        return false;
535    }
536
537    // the deferred targets can be generally promoted unless they
538    // contain a cache maintenance request
539
540    // find the first target that is a cache maintenance request
541    auto it = std::find_if(deferredTargets.begin(), deferredTargets.end(),
542                           [](MSHR::Target &t) {
543                               return t.pkt->req->isCacheMaintenance();
544                           });
545    if (it == deferredTargets.begin()) {
546        // if the first deferred target is a cache maintenance packet
547        // then we can promote provided the targets list is empty and
548        // we can service it on its own
549        if (targets.empty()) {
550            targets.splice(targets.end(), deferredTargets, it);
551        }
552    } else {
553        // if a cache maintenance operation exists, we promote all the
554        // deferred targets that precede it, or all deferred targets
555        // otherwise
556        targets.splice(targets.end(), deferredTargets,
557                       deferredTargets.begin(), it);
558    }
559
560    deferredTargets.populateFlags();
561    targets.populateFlags();
562    order = targets.front().order;
563    readyTime = std::max(curTick(), targets.front().readyTime);
564
565    return true;
566}
567
568void
569MSHR::promoteIf(const std::function<bool (Target &)>& pred)
570{
571    // if any of the deferred targets were upper-level cache
572    // requests marked downstreamPending, need to clear that
573    assert(!downstreamPending);  // not pending here anymore
574
575    // find the first target does not satisfy the condition
576    auto last_it = std::find_if_not(deferredTargets.begin(),
577                                    deferredTargets.end(),
578                                    pred);
579
580    // for the prefix of the deferredTargets [begin(), last_it) clear
581    // the downstreamPending flag and move them to the target list
582    deferredTargets.clearDownstreamPending(deferredTargets.begin(),
583                                           last_it);
584    targets.splice(targets.end(), deferredTargets,
585                   deferredTargets.begin(), last_it);
586    // We need to update the flags for the target lists after the
587    // modifications
588    deferredTargets.populateFlags();
589}
590
591void
592MSHR::promoteReadable()
593{
594    if (!deferredTargets.empty() && !hasPostInvalidate()) {
595        // We got a non invalidating response, and we have the block
596        // but we have deferred targets which are waiting and they do
597        // not need writable. This can happen if the original request
598        // was for a cache clean operation and we had a copy of the
599        // block. Since we serviced the cache clean operation and we
600        // have the block, there's no need to defer the targets, so
601        // move them up to the regular target list.
602
603        auto pred = [](Target &t) {
604            assert(t.source == Target::FromCPU);
605            return !t.pkt->req->isCacheInvalidate() &&
606                   !t.pkt->needsWritable();
607        };
608        promoteIf(pred);
609    }
610}
611
612void
613MSHR::promoteWritable()
614{
615    if (deferredTargets.needsWritable &&
616        !(hasPostInvalidate() || hasPostDowngrade())) {
617        // We got a writable response, but we have deferred targets
618        // which are waiting to request a writable copy (not because
619        // of a pending invalidate).  This can happen if the original
620        // request was for a read-only block, but we got a writable
621        // response anyway. Since we got the writable copy there's no
622        // need to defer the targets, so move them up to the regular
623        // target list.
624        assert(!targets.needsWritable);
625        targets.needsWritable = true;
626
627        auto pred = [](Target &t) {
628            assert(t.source == Target::FromCPU);
629            return !t.pkt->req->isCacheInvalidate();
630        };
631
632        promoteIf(pred);
633    }
634}
635
636
637bool
638MSHR::trySatisfyFunctional(PacketPtr pkt)
639{
640    // For printing, we treat the MSHR as a whole as single entity.
641    // For other requests, we iterate over the individual targets
642    // since that's where the actual data lies.
643    if (pkt->isPrint()) {
644        pkt->trySatisfyFunctional(this, blkAddr, isSecure, blkSize, nullptr);
645        return false;
646    } else {
647        return (targets.trySatisfyFunctional(pkt) ||
648                deferredTargets.trySatisfyFunctional(pkt));
649    }
650}
651
652bool
653MSHR::sendPacket(BaseCache &cache)
654{
655    return cache.sendMSHRQueuePacket(this);
656}
657
658void
659MSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const
660{
661    ccprintf(os, "%s[%#llx:%#llx](%s) %s %s %s state: %s %s %s %s %s %s\n",
662             prefix, blkAddr, blkAddr + blkSize - 1,
663             isSecure ? "s" : "ns",
664             isForward ? "Forward" : "",
665             allocOnFill() ? "AllocOnFill" : "",
666             needsWritable() ? "Wrtbl" : "",
667             _isUncacheable ? "Unc" : "",
668             inService ? "InSvc" : "",
669             downstreamPending ? "DwnPend" : "",
670             postInvalidate ? "PostInv" : "",
671             postDowngrade ? "PostDowngr" : "",
672             hasFromCache() ? "HasFromCache" : "");
673
674    if (!targets.empty()) {
675        ccprintf(os, "%s  Targets:\n", prefix);
676        targets.print(os, verbosity, prefix + "    ");
677    }
678    if (!deferredTargets.empty()) {
679        ccprintf(os, "%s  Deferred Targets:\n", prefix);
680        deferredTargets.print(os, verbosity, prefix + "      ");
681    }
682}
683
684std::string
685MSHR::print() const
686{
687    std::ostringstream str;
688    print(str);
689    return str.str();
690}
691
692bool
693MSHR::matchBlockAddr(const Addr addr, const bool is_secure) const
694{
695    assert(hasTargets());
696    return (blkAddr == addr) && (isSecure == is_secure);
697}
698
699bool
700MSHR::matchBlockAddr(const PacketPtr pkt) const
701{
702    assert(hasTargets());
703    return pkt->matchBlockAddr(blkAddr, isSecure, blkSize);
704}
705
706bool
707MSHR::conflictAddr(const QueueEntry* entry) const
708{
709    assert(hasTargets());
710    return entry->matchBlockAddr(blkAddr, isSecure);
711}
712