mshr.cc revision 4665 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Erik Hallnor
29 *          Dave Greene
30 */
31
32/**
33 * @file
34 * Miss Status and Handling Register (MSHR) definitions.
35 */
36
37#include <assert.h>
38#include <string>
39#include <vector>
40
41#include "mem/cache/miss/mshr.hh"
42#include "sim/core.hh" // for curTick
43#include "sim/host.hh"
44#include "base/misc.hh"
45#include "mem/cache/cache.hh"
46
47using namespace std;
48
49MSHR::MSHR()
50{
51    inService = false;
52    ntargets = 0;
53    threadNum = -1;
54}
55
56void
57MSHR::allocate(Addr _addr, int _size, PacketPtr target)
58{
59    addr = _addr;
60    size = _size;
61    assert(target);
62    isCacheFill = false;
63    needsExclusive = target->needsExclusive();
64    _isUncacheable = target->req->isUncacheable();
65    inService = false;
66    threadNum = 0;
67    ntargets = 1;
68    // Don't know of a case where we would allocate a new MSHR for a
69    // snoop (mem0-side request), so set cpuSide to true here.
70    targets.push_back(Target(target, true));
71    assert(deferredTargets.empty());
72    deferredNeedsExclusive = false;
73    pendingInvalidate = false;
74}
75
76void
77MSHR::deallocate()
78{
79    assert(targets.empty());
80    assert(deferredTargets.empty());
81    assert(ntargets == 0);
82    inService = false;
83    //allocIter = NULL;
84    //readyIter = NULL;
85}
86
87/*
88 * Adds a target to an MSHR
89 */
90void
91MSHR::allocateTarget(PacketPtr target)
92{
93    if (inService) {
94        if (!deferredTargets.empty() || pendingInvalidate ||
95            (!needsExclusive && target->needsExclusive())) {
96            // need to put on deferred list
97            deferredTargets.push_back(Target(target, true));
98            if (target->needsExclusive()) {
99                deferredNeedsExclusive = true;
100            }
101        } else {
102            // still OK to append to outstanding request
103            targets.push_back(Target(target, true));
104        }
105    } else {
106        if (target->needsExclusive()) {
107            needsExclusive = true;
108        }
109
110        targets.push_back(Target(target, true));
111    }
112
113    ++ntargets;
114}
115
116void
117MSHR::allocateSnoopTarget(PacketPtr target)
118{
119    assert(inService); // don't bother to call otherwise
120
121    if (pendingInvalidate) {
122        // a prior snoop has already appended an invalidation, so
123        // logically we don't have the block anymore...
124        return;
125    }
126
127    if (needsExclusive) {
128        // We're awaiting an exclusive copy, so ownership is pending.
129        // It's up to us to respond once the data arrives.
130        target->assertMemInhibit();
131    } else if (target->needsExclusive()) {
132        // This transaction will take away our pending copy
133        pendingInvalidate = true;
134    } else {
135        // If we're not going to supply data or perform an
136        // invalidation, we don't need to save this.
137        return;
138    }
139
140    targets.push_back(Target(target, false));
141    ++ntargets;
142}
143
144
145bool
146MSHR::promoteDeferredTargets()
147{
148    if (deferredTargets.empty()) {
149        return false;
150    }
151
152    assert(targets.empty());
153    targets = deferredTargets;
154    deferredTargets.clear();
155    assert(targets.size() == ntargets);
156
157    needsExclusive = deferredNeedsExclusive;
158    pendingInvalidate = false;
159    deferredNeedsExclusive = false;
160
161    return true;
162}
163
164
165void
166MSHR::dump()
167{
168    ccprintf(cerr,
169             "inService: %d thread: %d\n"
170             "Addr: %x ntargets %d\n"
171             "Targets:\n",
172             inService, threadNum, addr, ntargets);
173
174    TargetListIterator tar_it = targets.begin();
175    for (int i = 0; i < ntargets; i++) {
176        assert(tar_it != targets.end());
177
178        ccprintf(cerr, "\t%d: Addr: %x cmd: %s\n",
179                 i, tar_it->pkt->getAddr(), tar_it->pkt->cmdString());
180
181        tar_it++;
182    }
183    ccprintf(cerr, "\n");
184}
185
186MSHR::~MSHR()
187{
188}
189