mshr.cc revision 11866:8732d8d0a9e5
111936Sandreas.sandberg@arm.com/*
211569Sgabor.dozsa@arm.com * Copyright (c) 2012-2013, 2015-2017 ARM Limited
311569Sgabor.dozsa@arm.com * All rights reserved.
411569Sgabor.dozsa@arm.com *
511569Sgabor.dozsa@arm.com * The license below extends only to copyright in the software and shall
611569Sgabor.dozsa@arm.com * not be construed as granting a license to any other intellectual
711569Sgabor.dozsa@arm.com * property including but not limited to intellectual property relating
811569Sgabor.dozsa@arm.com * to a hardware implementation of the functionality of the software
911569Sgabor.dozsa@arm.com * licensed hereunder.  You may use the software subject to the license
1011569Sgabor.dozsa@arm.com * terms below provided that you ensure that this notice is replicated
1111569Sgabor.dozsa@arm.com * unmodified and in its entirety in all distributions of the software,
1211569Sgabor.dozsa@arm.com * modified or unmodified, in source code or in binary form.
1311569Sgabor.dozsa@arm.com *
1411569Sgabor.dozsa@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan
1511569Sgabor.dozsa@arm.com * Copyright (c) 2010 Advanced Micro Devices, Inc.
1611569Sgabor.dozsa@arm.com * All rights reserved.
1711569Sgabor.dozsa@arm.com *
1811569Sgabor.dozsa@arm.com * Redistribution and use in source and binary forms, with or without
1911569Sgabor.dozsa@arm.com * modification, are permitted provided that the following conditions are
2011569Sgabor.dozsa@arm.com * met: redistributions of source code must retain the above copyright
2111569Sgabor.dozsa@arm.com * notice, this list of conditions and the following disclaimer;
2211569Sgabor.dozsa@arm.com * redistributions in binary form must reproduce the above copyright
2311569Sgabor.dozsa@arm.com * notice, this list of conditions and the following disclaimer in the
2411569Sgabor.dozsa@arm.com * documentation and/or other materials provided with the distribution;
2511569Sgabor.dozsa@arm.com * neither the name of the copyright holders nor the names of its
2611569Sgabor.dozsa@arm.com * contributors may be used to endorse or promote products derived from
2711569Sgabor.dozsa@arm.com * this software without specific prior written permission.
2811569Sgabor.dozsa@arm.com *
2911569Sgabor.dozsa@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
3011569Sgabor.dozsa@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
3111569Sgabor.dozsa@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
3211569Sgabor.dozsa@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
3311569Sgabor.dozsa@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
3411569Sgabor.dozsa@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
3511569Sgabor.dozsa@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
3611569Sgabor.dozsa@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
3711569Sgabor.dozsa@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3811569Sgabor.dozsa@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3911569Sgabor.dozsa@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4011569Sgabor.dozsa@arm.com *
4111569Sgabor.dozsa@arm.com * Authors: Erik Hallnor
4211569Sgabor.dozsa@arm.com *          Dave Greene
4311682Sandreas.hansson@arm.com */
4411682Sandreas.hansson@arm.com
4511682Sandreas.hansson@arm.com/**
4611569Sgabor.dozsa@arm.com * @file
4712165Sandreas.sandberg@arm.com * Miss Status and Handling Register (MSHR) definitions.
4811936Sandreas.sandberg@arm.com */
4911569Sgabor.dozsa@arm.com
5011722Ssophiane.senni@gmail.com#include "mem/cache/mshr.hh"
5111722Ssophiane.senni@gmail.com
5211569Sgabor.dozsa@arm.com#include <algorithm>
5311569Sgabor.dozsa@arm.com#include <cassert>
5411569Sgabor.dozsa@arm.com#include <string>
5511569Sgabor.dozsa@arm.com#include <vector>
5611569Sgabor.dozsa@arm.com
5711569Sgabor.dozsa@arm.com#include "base/misc.hh"
5811569Sgabor.dozsa@arm.com#include "base/types.hh"
5911569Sgabor.dozsa@arm.com#include "debug/Cache.hh"
6011722Ssophiane.senni@gmail.com#include "mem/cache/cache.hh"
6111722Ssophiane.senni@gmail.com#include "sim/core.hh"
6211569Sgabor.dozsa@arm.com
6311569Sgabor.dozsa@arm.comusing namespace std;
6411569Sgabor.dozsa@arm.com
6511569Sgabor.dozsa@arm.comMSHR::MSHR() : downstreamPending(false),
6611569Sgabor.dozsa@arm.com               pendingModified(false),
6711569Sgabor.dozsa@arm.com               postInvalidate(false), postDowngrade(false),
6811569Sgabor.dozsa@arm.com               isForward(false)
6911569Sgabor.dozsa@arm.com{
7011569Sgabor.dozsa@arm.com}
7111722Ssophiane.senni@gmail.com
7211722Ssophiane.senni@gmail.comMSHR::TargetList::TargetList()
7311569Sgabor.dozsa@arm.com    : needsWritable(false), hasUpgrade(false), allocOnFill(false)
7411569Sgabor.dozsa@arm.com{}
7511569Sgabor.dozsa@arm.com
7611569Sgabor.dozsa@arm.com
7711569Sgabor.dozsa@arm.comvoid
7811569Sgabor.dozsa@arm.comMSHR::TargetList::updateFlags(PacketPtr pkt, Target::Source source,
7911569Sgabor.dozsa@arm.com                              bool alloc_on_fill)
8011569Sgabor.dozsa@arm.com{
8111569Sgabor.dozsa@arm.com    if (source != Target::FromSnoop) {
8211722Ssophiane.senni@gmail.com        if (pkt->needsWritable()) {
8311722Ssophiane.senni@gmail.com            needsWritable = true;
8411569Sgabor.dozsa@arm.com        }
8511569Sgabor.dozsa@arm.com
8611569Sgabor.dozsa@arm.com        // StoreCondReq is effectively an upgrade if it's in an MSHR
8711569Sgabor.dozsa@arm.com        // since it would have been failed already if we didn't have a
8811569Sgabor.dozsa@arm.com        // read-only copy
8911569Sgabor.dozsa@arm.com        if (pkt->isUpgrade() || pkt->cmd == MemCmd::StoreCondReq) {
9011569Sgabor.dozsa@arm.com            hasUpgrade = true;
9111569Sgabor.dozsa@arm.com        }
9211569Sgabor.dozsa@arm.com
9311569Sgabor.dozsa@arm.com        // potentially re-evaluate whether we should allocate on a fill or
9411569Sgabor.dozsa@arm.com        // not
9511569Sgabor.dozsa@arm.com        allocOnFill = allocOnFill || alloc_on_fill;
9611722Ssophiane.senni@gmail.com    }
9711722Ssophiane.senni@gmail.com}
9811569Sgabor.dozsa@arm.com
9911569Sgabor.dozsa@arm.comvoid
10011569Sgabor.dozsa@arm.comMSHR::TargetList::populateFlags()
10111569Sgabor.dozsa@arm.com{
10211569Sgabor.dozsa@arm.com    resetFlags();
10311569Sgabor.dozsa@arm.com    for (auto& t: *this) {
10411569Sgabor.dozsa@arm.com        updateFlags(t.pkt, t.source, t.allocOnFill);
10511569Sgabor.dozsa@arm.com    }
10611569Sgabor.dozsa@arm.com}
10711569Sgabor.dozsa@arm.com
10811569Sgabor.dozsa@arm.cominline void
10911630Sgabor.dozsa@arm.comMSHR::TargetList::add(PacketPtr pkt, Tick readyTime,
11011630Sgabor.dozsa@arm.com                      Counter order, Target::Source source, bool markPending,
11111630Sgabor.dozsa@arm.com                      bool alloc_on_fill)
11211630Sgabor.dozsa@arm.com{
11311630Sgabor.dozsa@arm.com    updateFlags(pkt, source, alloc_on_fill);
11411630Sgabor.dozsa@arm.com    if (markPending) {
11511630Sgabor.dozsa@arm.com        // Iterate over the SenderState stack and see if we find
11611630Sgabor.dozsa@arm.com        // an MSHR entry. If we do, set the downstreamPending
11711630Sgabor.dozsa@arm.com        // flag. Otherwise, do nothing.
11811630Sgabor.dozsa@arm.com        MSHR *mshr = pkt->findNextSenderState<MSHR>();
11911630Sgabor.dozsa@arm.com        if (mshr != nullptr) {
12011630Sgabor.dozsa@arm.com            assert(!mshr->downstreamPending);
12111630Sgabor.dozsa@arm.com            mshr->downstreamPending = true;
12211630Sgabor.dozsa@arm.com        } else {
12311630Sgabor.dozsa@arm.com            // No need to clear downstreamPending later
12411630Sgabor.dozsa@arm.com            markPending = false;
12511630Sgabor.dozsa@arm.com        }
12611630Sgabor.dozsa@arm.com    }
12711630Sgabor.dozsa@arm.com
12811630Sgabor.dozsa@arm.com    emplace_back(pkt, readyTime, order, source, markPending, alloc_on_fill);
12911630Sgabor.dozsa@arm.com}
13011630Sgabor.dozsa@arm.com
13111630Sgabor.dozsa@arm.com
13211630Sgabor.dozsa@arm.comstatic void
13311630Sgabor.dozsa@arm.comreplaceUpgrade(PacketPtr pkt)
13411630Sgabor.dozsa@arm.com{
13511630Sgabor.dozsa@arm.com    // remember if the current packet has data allocated
13611630Sgabor.dozsa@arm.com    bool has_data = pkt->hasData() || pkt->hasRespData();
13711630Sgabor.dozsa@arm.com
13811630Sgabor.dozsa@arm.com    if (pkt->cmd == MemCmd::UpgradeReq) {
13911630Sgabor.dozsa@arm.com        pkt->cmd = MemCmd::ReadExReq;
14011630Sgabor.dozsa@arm.com        DPRINTF(Cache, "Replacing UpgradeReq with ReadExReq\n");
14111630Sgabor.dozsa@arm.com    } else if (pkt->cmd == MemCmd::SCUpgradeReq) {
14211630Sgabor.dozsa@arm.com        pkt->cmd = MemCmd::SCUpgradeFailReq;
14311630Sgabor.dozsa@arm.com        DPRINTF(Cache, "Replacing SCUpgradeReq with SCUpgradeFailReq\n");
14411630Sgabor.dozsa@arm.com    } else if (pkt->cmd == MemCmd::StoreCondReq) {
14511630Sgabor.dozsa@arm.com        pkt->cmd = MemCmd::StoreCondFailReq;
14611630Sgabor.dozsa@arm.com        DPRINTF(Cache, "Replacing StoreCondReq with StoreCondFailReq\n");
14711630Sgabor.dozsa@arm.com    }
14811630Sgabor.dozsa@arm.com
14911630Sgabor.dozsa@arm.com    if (!has_data) {
15011630Sgabor.dozsa@arm.com        // there is no sensible way of setting the data field if the
15111630Sgabor.dozsa@arm.com        // new command actually would carry data
15211630Sgabor.dozsa@arm.com        assert(!pkt->hasData());
15311630Sgabor.dozsa@arm.com
15411630Sgabor.dozsa@arm.com        if (pkt->hasRespData()) {
15511630Sgabor.dozsa@arm.com            // we went from a packet that had no data (neither request,
15611630Sgabor.dozsa@arm.com            // nor response), to one that does, and therefore we need to
15711630Sgabor.dozsa@arm.com            // actually allocate space for the data payload
15811630Sgabor.dozsa@arm.com            pkt->allocate();
15911630Sgabor.dozsa@arm.com        }
16011630Sgabor.dozsa@arm.com    }
16111630Sgabor.dozsa@arm.com}
16211630Sgabor.dozsa@arm.com
16311630Sgabor.dozsa@arm.com
16411630Sgabor.dozsa@arm.comvoid
16511630Sgabor.dozsa@arm.comMSHR::TargetList::replaceUpgrades()
16611630Sgabor.dozsa@arm.com{
16711630Sgabor.dozsa@arm.com    if (!hasUpgrade)
16811630Sgabor.dozsa@arm.com        return;
16912165Sandreas.sandberg@arm.com
17011630Sgabor.dozsa@arm.com    for (auto& t : *this) {
17111630Sgabor.dozsa@arm.com        replaceUpgrade(t.pkt);
17211630Sgabor.dozsa@arm.com    }
17311630Sgabor.dozsa@arm.com
17411630Sgabor.dozsa@arm.com    hasUpgrade = false;
17511936Sandreas.sandberg@arm.com}
17611936Sandreas.sandberg@arm.com
17712165Sandreas.sandberg@arm.com
17811936Sandreas.sandberg@arm.comvoid
17911936Sandreas.sandberg@arm.comMSHR::TargetList::clearDownstreamPending()
18011936Sandreas.sandberg@arm.com{
18111936Sandreas.sandberg@arm.com    for (auto& t : *this) {
18211936Sandreas.sandberg@arm.com        if (t.markedPending) {
18311630Sgabor.dozsa@arm.com            // Iterate over the SenderState stack and see if we find
18411569Sgabor.dozsa@arm.com            // an MSHR entry. If we find one, clear the
18511569Sgabor.dozsa@arm.com            // downstreamPending flag by calling
18611569Sgabor.dozsa@arm.com            // clearDownstreamPending(). This recursively clears the
18711756Sgabor.dozsa@arm.com            // downstreamPending flag in all caches this packet has
18811630Sgabor.dozsa@arm.com            // passed through.
18911569Sgabor.dozsa@arm.com            MSHR *mshr = t.pkt->findNextSenderState<MSHR>();
19011630Sgabor.dozsa@arm.com            if (mshr != nullptr) {
19111630Sgabor.dozsa@arm.com                mshr->clearDownstreamPending();
19211630Sgabor.dozsa@arm.com            }
19311569Sgabor.dozsa@arm.com            t.markedPending = false;
19411630Sgabor.dozsa@arm.com        }
19511569Sgabor.dozsa@arm.com    }
19611630Sgabor.dozsa@arm.com}
19711630Sgabor.dozsa@arm.com
19811569Sgabor.dozsa@arm.com
19911630Sgabor.dozsa@arm.combool
20011569Sgabor.dozsa@arm.comMSHR::TargetList::checkFunctional(PacketPtr pkt)
20111630Sgabor.dozsa@arm.com{
20211630Sgabor.dozsa@arm.com    for (auto& t : *this) {
20311630Sgabor.dozsa@arm.com        if (pkt->checkFunctional(t.pkt)) {
20411569Sgabor.dozsa@arm.com            return true;
20511630Sgabor.dozsa@arm.com        }
20611630Sgabor.dozsa@arm.com    }
20711630Sgabor.dozsa@arm.com
20811630Sgabor.dozsa@arm.com    return false;
20911756Sgabor.dozsa@arm.com}
21011756Sgabor.dozsa@arm.com
21111756Sgabor.dozsa@arm.com
21212148Sgabor.dozsa@arm.comvoid
21311756Sgabor.dozsa@arm.comMSHR::TargetList::print(std::ostream &os, int verbosity,
21411756Sgabor.dozsa@arm.com                        const std::string &prefix) const
21512148Sgabor.dozsa@arm.com{
21611756Sgabor.dozsa@arm.com    for (auto& t : *this) {
21711756Sgabor.dozsa@arm.com        const char *s;
21812148Sgabor.dozsa@arm.com        switch (t.source) {
21911630Sgabor.dozsa@arm.com          case Target::FromCPU:
22011630Sgabor.dozsa@arm.com            s = "FromCPU";
22111630Sgabor.dozsa@arm.com            break;
22211630Sgabor.dozsa@arm.com          case Target::FromSnoop:
22311569Sgabor.dozsa@arm.com            s = "FromSnoop";
22411569Sgabor.dozsa@arm.com            break;
22511569Sgabor.dozsa@arm.com          case Target::FromPrefetcher:
22611569Sgabor.dozsa@arm.com            s = "FromPrefetcher";
22711569Sgabor.dozsa@arm.com            break;
22811569Sgabor.dozsa@arm.com          default:
22911569Sgabor.dozsa@arm.com            s = "";
23011569Sgabor.dozsa@arm.com            break;
23111569Sgabor.dozsa@arm.com        }
23211569Sgabor.dozsa@arm.com        ccprintf(os, "%s%s: ", prefix, s);
23311756Sgabor.dozsa@arm.com        t.pkt->print(os, verbosity, "");
23411756Sgabor.dozsa@arm.com        ccprintf(os, "\n");
23511756Sgabor.dozsa@arm.com    }
23611756Sgabor.dozsa@arm.com}
23711756Sgabor.dozsa@arm.com
23811756Sgabor.dozsa@arm.com
23911569Sgabor.dozsa@arm.comvoid
24011569Sgabor.dozsa@arm.comMSHR::allocate(Addr blk_addr, unsigned blk_size, PacketPtr target,
24111569Sgabor.dozsa@arm.com               Tick when_ready, Counter _order, bool alloc_on_fill)
24211569Sgabor.dozsa@arm.com{
24311569Sgabor.dozsa@arm.com    blkAddr = blk_addr;
24411630Sgabor.dozsa@arm.com    blkSize = blk_size;
24511630Sgabor.dozsa@arm.com    isSecure = target->isSecure();
24611630Sgabor.dozsa@arm.com    readyTime = when_ready;
24711630Sgabor.dozsa@arm.com    order = _order;
24811630Sgabor.dozsa@arm.com    assert(target);
24911630Sgabor.dozsa@arm.com    isForward = false;
25011630Sgabor.dozsa@arm.com    _isUncacheable = target->req->isUncacheable();
25111630Sgabor.dozsa@arm.com    inService = false;
25211630Sgabor.dozsa@arm.com    downstreamPending = false;
25311630Sgabor.dozsa@arm.com    assert(targets.isReset());
25411630Sgabor.dozsa@arm.com    // Don't know of a case where we would allocate a new MSHR for a
25511630Sgabor.dozsa@arm.com    // snoop (mem-side request), so set source according to request here
25611630Sgabor.dozsa@arm.com    Target::Source source = (target->cmd == MemCmd::HardPFReq) ?
25711630Sgabor.dozsa@arm.com        Target::FromPrefetcher : Target::FromCPU;
25811630Sgabor.dozsa@arm.com    targets.add(target, when_ready, _order, source, true, alloc_on_fill);
25911630Sgabor.dozsa@arm.com    assert(deferredTargets.isReset());
26011630Sgabor.dozsa@arm.com}
26111630Sgabor.dozsa@arm.com
26211630Sgabor.dozsa@arm.com
26311630Sgabor.dozsa@arm.comvoid
26411630Sgabor.dozsa@arm.comMSHR::clearDownstreamPending()
26511630Sgabor.dozsa@arm.com{
26611630Sgabor.dozsa@arm.com    assert(downstreamPending);
26711630Sgabor.dozsa@arm.com    downstreamPending = false;
26811630Sgabor.dozsa@arm.com    // recursively clear flag on any MSHRs we will be forwarding
26911630Sgabor.dozsa@arm.com    // responses to
27011630Sgabor.dozsa@arm.com    targets.clearDownstreamPending();
27111630Sgabor.dozsa@arm.com}
27211630Sgabor.dozsa@arm.com
27311630Sgabor.dozsa@arm.comvoid
27411630Sgabor.dozsa@arm.comMSHR::markInService(bool pending_modified_resp)
27511630Sgabor.dozsa@arm.com{
27611630Sgabor.dozsa@arm.com    assert(!inService);
27711630Sgabor.dozsa@arm.com
27811630Sgabor.dozsa@arm.com    inService = true;
27911630Sgabor.dozsa@arm.com    pendingModified = targets.needsWritable || pending_modified_resp;
28011630Sgabor.dozsa@arm.com    postInvalidate = postDowngrade = false;
28111630Sgabor.dozsa@arm.com
28211630Sgabor.dozsa@arm.com    if (!downstreamPending) {
283        // let upstream caches know that the request has made it to a
284        // level where it's going to get a response
285        targets.clearDownstreamPending();
286    }
287}
288
289
290void
291MSHR::deallocate()
292{
293    assert(targets.empty());
294    targets.resetFlags();
295    assert(deferredTargets.isReset());
296    inService = false;
297}
298
299/*
300 * Adds a target to an MSHR
301 */
302void
303MSHR::allocateTarget(PacketPtr pkt, Tick whenReady, Counter _order,
304                     bool alloc_on_fill)
305{
306    // assume we'd never issue a prefetch when we've got an
307    // outstanding miss
308    assert(pkt->cmd != MemCmd::HardPFReq);
309
310    // uncacheable accesses always allocate a new MSHR, and cacheable
311    // accesses ignore any uncacheable MSHRs, thus we should never
312    // have targets addded if originally allocated uncacheable
313    assert(!_isUncacheable);
314
315    // if there's a request already in service for this MSHR, we will
316    // have to defer the new target until after the response if any of
317    // the following are true:
318    // - there are other targets already deferred
319    // - there's a pending invalidate to be applied after the response
320    //   comes back (but before this target is processed)
321    // - this target requires a writable block and either we're not
322    //   getting a writable block back or we have already snooped
323    //   another read request that will downgrade our writable block
324    //   to non-writable (Shared or Owned)
325    if (inService &&
326        (!deferredTargets.empty() || hasPostInvalidate() ||
327         (pkt->needsWritable() &&
328          (!isPendingModified() || hasPostDowngrade() || isForward)))) {
329        // need to put on deferred list
330        if (hasPostInvalidate())
331            replaceUpgrade(pkt);
332        deferredTargets.add(pkt, whenReady, _order, Target::FromCPU, true,
333                            alloc_on_fill);
334    } else {
335        // No request outstanding, or still OK to append to
336        // outstanding request: append to regular target list.  Only
337        // mark pending if current request hasn't been issued yet
338        // (isn't in service).
339        targets.add(pkt, whenReady, _order, Target::FromCPU, !inService,
340                    alloc_on_fill);
341    }
342}
343
344bool
345MSHR::handleSnoop(PacketPtr pkt, Counter _order)
346{
347    DPRINTF(Cache, "%s for %s\n", __func__, pkt->print());
348
349    // when we snoop packets the needsWritable and isInvalidate flags
350    // should always be the same, however, this assumes that we never
351    // snoop writes as they are currently not marked as invalidations
352    panic_if(pkt->needsWritable() != pkt->isInvalidate(),
353             "%s got snoop %s where needsWritable, "
354             "does not match isInvalidate", name(), pkt->print());
355
356    if (!inService || (pkt->isExpressSnoop() && downstreamPending)) {
357        // Request has not been issued yet, or it's been issued
358        // locally but is buffered unissued at some downstream cache
359        // which is forwarding us this snoop.  Either way, the packet
360        // we're snooping logically precedes this MSHR's request, so
361        // the snoop has no impact on the MSHR, but must be processed
362        // in the standard way by the cache.  The only exception is
363        // that if we're an L2+ cache buffering an UpgradeReq from a
364        // higher-level cache, and the snoop is invalidating, then our
365        // buffered upgrades must be converted to read exclusives,
366        // since the upper-level cache no longer has a valid copy.
367        // That is, even though the upper-level cache got out on its
368        // local bus first, some other invalidating transaction
369        // reached the global bus before the upgrade did.
370        if (pkt->needsWritable()) {
371            targets.replaceUpgrades();
372            deferredTargets.replaceUpgrades();
373        }
374
375        return false;
376    }
377
378    // From here on down, the request issued by this MSHR logically
379    // precedes the request we're snooping.
380    if (pkt->needsWritable()) {
381        // snooped request still precedes the re-request we'll have to
382        // issue for deferred targets, if any...
383        deferredTargets.replaceUpgrades();
384    }
385
386    if (hasPostInvalidate()) {
387        // a prior snoop has already appended an invalidation, so
388        // logically we don't have the block anymore; no need for
389        // further snooping.
390        return true;
391    }
392
393    if (isPendingModified() || pkt->isInvalidate()) {
394        // We need to save and replay the packet in two cases:
395        // 1. We're awaiting a writable copy (Modified or Exclusive),
396        //    so this MSHR is the orgering point, and we need to respond
397        //    after we receive data.
398        // 2. It's an invalidation (e.g., UpgradeReq), and we need
399        //    to forward the snoop up the hierarchy after the current
400        //    transaction completes.
401
402        // Start by determining if we will eventually respond or not,
403        // matching the conditions checked in Cache::handleSnoop
404        bool will_respond = isPendingModified() && pkt->needsResponse();
405
406        // The packet we are snooping may be deleted by the time we
407        // actually process the target, and we consequently need to
408        // save a copy here. Clear flags and also allocate new data as
409        // the original packet data storage may have been deleted by
410        // the time we get to process this packet. In the cases where
411        // we are not responding after handling the snoop we also need
412        // to create a copy of the request to be on the safe side. In
413        // the latter case the cache is responsible for deleting both
414        // the packet and the request as part of handling the deferred
415        // snoop.
416        PacketPtr cp_pkt = will_respond ? new Packet(pkt, true, true) :
417            new Packet(new Request(*pkt->req), pkt->cmd, blkSize);
418
419        if (will_respond) {
420            // we are the ordering point, and will consequently
421            // respond, and depending on whether the packet
422            // needsWritable or not we either pass a Shared line or a
423            // Modified line
424            pkt->setCacheResponding();
425
426            // inform the cache hierarchy that this cache had the line
427            // in the Modified state, even if the response is passed
428            // as Shared (and thus non-writable)
429            pkt->setResponderHadWritable();
430
431            // in the case of an uncacheable request there is no need
432            // to set the responderHadWritable flag, but since the
433            // recipient does not care there is no harm in doing so
434        }
435        targets.add(cp_pkt, curTick(), _order, Target::FromSnoop,
436                    downstreamPending && targets.needsWritable, false);
437
438        if (pkt->needsWritable()) {
439            // This transaction will take away our pending copy
440            postInvalidate = true;
441        }
442    }
443
444    if (!pkt->needsWritable() && !pkt->req->isUncacheable()) {
445        // This transaction will get a read-shared copy, downgrading
446        // our copy if we had a writable one
447        postDowngrade = true;
448        // make sure that any downstream cache does not respond with a
449        // writable (and dirty) copy even if it has one, unless it was
450        // explicitly asked for one
451        pkt->setHasSharers();
452    }
453
454    return true;
455}
456
457MSHR::TargetList
458MSHR::extractServiceableTargets(PacketPtr pkt)
459{
460    TargetList ready_targets;
461    // If the downstream MSHR got an invalidation request then we only
462    // service the first of the FromCPU targets and any other
463    // non-FromCPU target. This way the remaining FromCPU targets
464    // issue a new request and get a fresh copy of the block and we
465    // avoid memory consistency violations.
466    if (pkt->cmd == MemCmd::ReadRespWithInvalidate) {
467        auto it = targets.begin();
468        assert((it->source == Target::FromCPU) ||
469               (it->source == Target::FromPrefetcher));
470        ready_targets.push_back(*it);
471        it = targets.erase(it);
472        while (it != targets.end()) {
473            if (it->source == Target::FromCPU) {
474                it++;
475            } else {
476                assert(it->source == Target::FromSnoop);
477                ready_targets.push_back(*it);
478                it = targets.erase(it);
479            }
480        }
481        ready_targets.populateFlags();
482    } else {
483        std::swap(ready_targets, targets);
484    }
485    targets.populateFlags();
486
487    return ready_targets;
488}
489
490bool
491MSHR::promoteDeferredTargets()
492{
493    if (targets.empty())  {
494        if (deferredTargets.empty()) {
495            return false;
496        }
497
498        std::swap(targets, deferredTargets);
499    } else {
500        // If the targets list is not empty then we have one targets
501        // from the deferredTargets list to the targets list. A new
502        // request will then service the targets list.
503        targets.splice(targets.end(), deferredTargets);
504        targets.populateFlags();
505    }
506
507    // clear deferredTargets flags
508    deferredTargets.resetFlags();
509
510    order = targets.front().order;
511    readyTime = std::max(curTick(), targets.front().readyTime);
512
513    return true;
514}
515
516
517void
518MSHR::promoteWritable()
519{
520    if (deferredTargets.needsWritable &&
521        !(hasPostInvalidate() || hasPostDowngrade())) {
522        // We got a writable response, but we have deferred targets
523        // which are waiting to request a writable copy (not because
524        // of a pending invalidate).  This can happen if the original
525        // request was for a read-only block, but we got a writable
526        // response anyway. Since we got the writable copy there's no
527        // need to defer the targets, so move them up to the regular
528        // target list.
529        assert(!targets.needsWritable);
530        targets.needsWritable = true;
531        // if any of the deferred targets were upper-level cache
532        // requests marked downstreamPending, need to clear that
533        assert(!downstreamPending);  // not pending here anymore
534        deferredTargets.clearDownstreamPending();
535        // this clears out deferredTargets too
536        targets.splice(targets.end(), deferredTargets);
537        deferredTargets.resetFlags();
538    }
539}
540
541
542bool
543MSHR::checkFunctional(PacketPtr pkt)
544{
545    // For printing, we treat the MSHR as a whole as single entity.
546    // For other requests, we iterate over the individual targets
547    // since that's where the actual data lies.
548    if (pkt->isPrint()) {
549        pkt->checkFunctional(this, blkAddr, isSecure, blkSize, nullptr);
550        return false;
551    } else {
552        return (targets.checkFunctional(pkt) ||
553                deferredTargets.checkFunctional(pkt));
554    }
555}
556
557bool
558MSHR::sendPacket(Cache &cache)
559{
560    return cache.sendMSHRQueuePacket(this);
561}
562
563void
564MSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const
565{
566    ccprintf(os, "%s[%#llx:%#llx](%s) %s %s %s state: %s %s %s %s %s\n",
567             prefix, blkAddr, blkAddr + blkSize - 1,
568             isSecure ? "s" : "ns",
569             isForward ? "Forward" : "",
570             allocOnFill() ? "AllocOnFill" : "",
571             needsWritable() ? "Wrtbl" : "",
572             _isUncacheable ? "Unc" : "",
573             inService ? "InSvc" : "",
574             downstreamPending ? "DwnPend" : "",
575             postInvalidate ? "PostInv" : "",
576             postDowngrade ? "PostDowngr" : "");
577
578    if (!targets.empty()) {
579        ccprintf(os, "%s  Targets:\n", prefix);
580        targets.print(os, verbosity, prefix + "    ");
581    }
582    if (!deferredTargets.empty()) {
583        ccprintf(os, "%s  Deferred Targets:\n", prefix);
584        deferredTargets.print(os, verbosity, prefix + "      ");
585    }
586}
587
588std::string
589MSHR::print() const
590{
591    ostringstream str;
592    print(str);
593    return str.str();
594}
595