mshr.cc revision 9543
12381SN/A/* 212342Snikos.nikoleris@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan 38711Sandreas.hansson@arm.com * Copyright (c) 2010 Advanced Micro Devices, Inc. 48711Sandreas.hansson@arm.com * All rights reserved. 58711Sandreas.hansson@arm.com * 68711Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 78711Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 88711Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 98711Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 108711Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 118711Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 128711Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 138711Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 142381SN/A * contributors may be used to endorse or promote products derived from 152381SN/A * this software without specific prior written permission. 162381SN/A * 172381SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182381SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192381SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202381SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212381SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222381SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232381SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242381SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252381SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262381SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272381SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282381SN/A * 292381SN/A * Authors: Erik Hallnor 302381SN/A * Dave Greene 312381SN/A */ 322381SN/A 332381SN/A/** 342381SN/A * @file 352381SN/A * Miss Status and Handling Register (MSHR) definitions. 362381SN/A */ 372381SN/A 382381SN/A#include <algorithm> 392665Ssaidi@eecs.umich.edu#include <cassert> 402665Ssaidi@eecs.umich.edu#include <string> 418853Sandreas.hansson@arm.com#include <vector> 428922Swilliam.wang@arm.com 432381SN/A#include "base/misc.hh" 442381SN/A#include "base/types.hh" 452381SN/A#include "debug/Cache.hh" 462381SN/A#include "mem/cache/cache.hh" 478922Swilliam.wang@arm.com#include "mem/cache/mshr.hh" 482381SN/A#include "sim/core.hh" 492381SN/A 502381SN/Ausing namespace std; 512381SN/A 522381SN/AMSHR::MSHR() 539235Sandreas.hansson@arm.com{ 542381SN/A inService = false; 552381SN/A ntargets = 0; 563401Sktlim@umich.edu threadNum = InvalidThreadID; 573401Sktlim@umich.edu targets = new TargetList(); 582381SN/A deferredTargets = new TargetList(); 598922Swilliam.wang@arm.com} 608922Swilliam.wang@arm.com 619087Sandreas.hansson@arm.com 622381SN/AMSHR::TargetList::TargetList() 638708Sandreas.hansson@arm.com : needsExclusive(false), hasUpgrade(false) 642381SN/A{} 658922Swilliam.wang@arm.com 668922Swilliam.wang@arm.com 678922Swilliam.wang@arm.cominline void 688922Swilliam.wang@arm.comMSHR::TargetList::add(PacketPtr pkt, Tick readyTime, 698922Swilliam.wang@arm.com Counter order, Target::Source source, bool markPending) 708922Swilliam.wang@arm.com{ 715476Snate@binkert.org if (source != Target::FromSnoop) { 722640Sstever@eecs.umich.edu if (pkt->needsExclusive()) { 738965Sandreas.hansson@arm.com needsExclusive = true; 748965Sandreas.hansson@arm.com } 759031Sandreas.hansson@arm.com 768965Sandreas.hansson@arm.com // StoreCondReq is effectively an upgrade if it's in an MSHR 779031Sandreas.hansson@arm.com // since it would have been failed already if we didn't have a 788965Sandreas.hansson@arm.com // read-only copy 798922Swilliam.wang@arm.com if (pkt->isUpgrade() || pkt->cmd == MemCmd::StoreCondReq) { 808922Swilliam.wang@arm.com hasUpgrade = true; 818922Swilliam.wang@arm.com } 828922Swilliam.wang@arm.com } 838922Swilliam.wang@arm.com 848922Swilliam.wang@arm.com if (markPending) { 858922Swilliam.wang@arm.com // Iterate over the SenderState stack and see if we find 868922Swilliam.wang@arm.com // an MSHR entry. If we do, set the downstreamPending 878965Sandreas.hansson@arm.com // flag. Otherwise, do nothing. 888922Swilliam.wang@arm.com MSHR *mshr = pkt->findNextSenderState<MSHR>(); 899031Sandreas.hansson@arm.com if (mshr != NULL) { 908922Swilliam.wang@arm.com assert(!mshr->downstreamPending); 918922Swilliam.wang@arm.com mshr->downstreamPending = true; 928922Swilliam.wang@arm.com } 938922Swilliam.wang@arm.com } 948922Swilliam.wang@arm.com 953401Sktlim@umich.edu push_back(Target(pkt, readyTime, order, source, markPending)); 962381SN/A} 972640Sstever@eecs.umich.edu 982640Sstever@eecs.umich.edu 998922Swilliam.wang@arm.comstatic void 1004190Ssaidi@eecs.umich.edureplaceUpgrade(PacketPtr pkt) 1018965Sandreas.hansson@arm.com{ 1029031Sandreas.hansson@arm.com if (pkt->cmd == MemCmd::UpgradeReq) { 1038965Sandreas.hansson@arm.com pkt->cmd = MemCmd::ReadExReq; 1048922Swilliam.wang@arm.com DPRINTF(Cache, "Replacing UpgradeReq with ReadExReq\n"); 1058922Swilliam.wang@arm.com } else if (pkt->cmd == MemCmd::SCUpgradeReq) { 1068922Swilliam.wang@arm.com pkt->cmd = MemCmd::SCUpgradeFailReq; 1079294Sandreas.hansson@arm.com DPRINTF(Cache, "Replacing SCUpgradeReq with SCUpgradeFailReq\n"); 1089294Sandreas.hansson@arm.com } else if (pkt->cmd == MemCmd::StoreCondReq) { 1099294Sandreas.hansson@arm.com pkt->cmd = MemCmd::StoreCondFailReq; 1109294Sandreas.hansson@arm.com DPRINTF(Cache, "Replacing StoreCondReq with StoreCondFailReq\n"); 1119294Sandreas.hansson@arm.com } 1129294Sandreas.hansson@arm.com} 1139294Sandreas.hansson@arm.com 1149294Sandreas.hansson@arm.com 1159294Sandreas.hansson@arm.comvoid 1169294Sandreas.hansson@arm.comMSHR::TargetList::replaceUpgrades() 1179294Sandreas.hansson@arm.com{ 1189294Sandreas.hansson@arm.com if (!hasUpgrade) 1199294Sandreas.hansson@arm.com return; 1209294Sandreas.hansson@arm.com 1219294Sandreas.hansson@arm.com Iterator end_i = end(); 1229294Sandreas.hansson@arm.com for (Iterator i = begin(); i != end_i; ++i) { 1239294Sandreas.hansson@arm.com replaceUpgrade(i->pkt); 1249294Sandreas.hansson@arm.com } 1259294Sandreas.hansson@arm.com 1269294Sandreas.hansson@arm.com hasUpgrade = false; 1279294Sandreas.hansson@arm.com} 1289294Sandreas.hansson@arm.com 1299294Sandreas.hansson@arm.com 1309294Sandreas.hansson@arm.comvoid 1319294Sandreas.hansson@arm.comMSHR::TargetList::clearDownstreamPending() 1329294Sandreas.hansson@arm.com{ 1339294Sandreas.hansson@arm.com Iterator end_i = end(); 1349294Sandreas.hansson@arm.com for (Iterator i = begin(); i != end_i; ++i) { 1359294Sandreas.hansson@arm.com if (i->markedPending) { 1369294Sandreas.hansson@arm.com // Iterate over the SenderState stack and see if we find 1379294Sandreas.hansson@arm.com // an MSHR entry. If we find one, clear the 1389294Sandreas.hansson@arm.com // downstreamPending flag by calling 1399294Sandreas.hansson@arm.com // clearDownstreamPending(). This recursively clears the 1409294Sandreas.hansson@arm.com // downstreamPending flag in all caches this packet has 1419294Sandreas.hansson@arm.com // passed through. 1429294Sandreas.hansson@arm.com MSHR *mshr = i->pkt->findNextSenderState<MSHR>(); 1439294Sandreas.hansson@arm.com if (mshr != NULL) { 1449294Sandreas.hansson@arm.com mshr->clearDownstreamPending(); 1459294Sandreas.hansson@arm.com } 1469294Sandreas.hansson@arm.com } 1479294Sandreas.hansson@arm.com } 1489294Sandreas.hansson@arm.com} 1499294Sandreas.hansson@arm.com 1509294Sandreas.hansson@arm.com 1519294Sandreas.hansson@arm.combool 1529294Sandreas.hansson@arm.comMSHR::TargetList::checkFunctional(PacketPtr pkt) 1539294Sandreas.hansson@arm.com{ 1549294Sandreas.hansson@arm.com Iterator end_i = end(); 1559294Sandreas.hansson@arm.com for (Iterator i = begin(); i != end_i; ++i) { 1569294Sandreas.hansson@arm.com if (pkt->checkFunctional(i->pkt)) { 1579294Sandreas.hansson@arm.com return true; 1588922Swilliam.wang@arm.com } 1598922Swilliam.wang@arm.com } 1608922Swilliam.wang@arm.com 1619294Sandreas.hansson@arm.com return false; 1629294Sandreas.hansson@arm.com} 1639294Sandreas.hansson@arm.com 1649294Sandreas.hansson@arm.com 1659294Sandreas.hansson@arm.comvoid 1668922Swilliam.wang@arm.comMSHR::TargetList:: 1679294Sandreas.hansson@arm.comprint(std::ostream &os, int verbosity, const std::string &prefix) const 1688922Swilliam.wang@arm.com{ 1698922Swilliam.wang@arm.com ConstIterator end_i = end(); 1708975Sandreas.hansson@arm.com for (ConstIterator i = begin(); i != end_i; ++i) { 1718975Sandreas.hansson@arm.com const char *s; 1728922Swilliam.wang@arm.com switch (i->source) { 1738922Swilliam.wang@arm.com case Target::FromCPU: 1748922Swilliam.wang@arm.com s = "FromCPU"; 1758922Swilliam.wang@arm.com break; 1768922Swilliam.wang@arm.com case Target::FromSnoop: 1778922Swilliam.wang@arm.com s = "FromSnoop"; 1788965Sandreas.hansson@arm.com break; 1799031Sandreas.hansson@arm.com case Target::FromPrefetcher: 1808922Swilliam.wang@arm.com s = "FromPrefetcher"; 1818922Swilliam.wang@arm.com break; 1829178Sandreas.hansson@arm.com default: 1839178Sandreas.hansson@arm.com s = ""; 1849178Sandreas.hansson@arm.com break; 1859178Sandreas.hansson@arm.com } 1869294Sandreas.hansson@arm.com ccprintf(os, "%s%s: ", prefix, s); 1879178Sandreas.hansson@arm.com i->pkt->print(os, verbosity, ""); 1889178Sandreas.hansson@arm.com } 1899178Sandreas.hansson@arm.com} 1909178Sandreas.hansson@arm.com 1919178Sandreas.hansson@arm.com 1929178Sandreas.hansson@arm.comvoid 1938922Swilliam.wang@arm.comMSHR::allocate(Addr _addr, int _size, PacketPtr target, 1948948Sandreas.hansson@arm.com Tick whenReady, Counter _order) 1958948Sandreas.hansson@arm.com{ 1968948Sandreas.hansson@arm.com addr = _addr; 1978948Sandreas.hansson@arm.com size = _size; 1988948Sandreas.hansson@arm.com readyTime = whenReady; 1998948Sandreas.hansson@arm.com order = _order; 2008948Sandreas.hansson@arm.com assert(target); 2018948Sandreas.hansson@arm.com isForward = false; 2028948Sandreas.hansson@arm.com _isUncacheable = target->req->isUncacheable(); 2038948Sandreas.hansson@arm.com inService = false; 2048948Sandreas.hansson@arm.com downstreamPending = false; 2058948Sandreas.hansson@arm.com threadNum = 0; 2068948Sandreas.hansson@arm.com ntargets = 1; 2078948Sandreas.hansson@arm.com assert(targets->isReset()); 2088948Sandreas.hansson@arm.com // Don't know of a case where we would allocate a new MSHR for a 2098948Sandreas.hansson@arm.com // snoop (mem-side request), so set source according to request here 2108948Sandreas.hansson@arm.com Target::Source source = (target->cmd == MemCmd::HardPFReq) ? 2118948Sandreas.hansson@arm.com Target::FromPrefetcher : Target::FromCPU; 2128948Sandreas.hansson@arm.com targets->add(target, whenReady, _order, source, true); 2138948Sandreas.hansson@arm.com assert(deferredTargets->isReset()); 2148975Sandreas.hansson@arm.com data = NULL; 2158975Sandreas.hansson@arm.com} 2168975Sandreas.hansson@arm.com 21710713Sandreas.hansson@arm.com 2188975Sandreas.hansson@arm.comvoid 2198975Sandreas.hansson@arm.comMSHR::clearDownstreamPending() 2208975Sandreas.hansson@arm.com{ 2218975Sandreas.hansson@arm.com assert(downstreamPending); 2228975Sandreas.hansson@arm.com downstreamPending = false; 2238975Sandreas.hansson@arm.com // recursively clear flag on any MSHRs we will be forwarding 2248975Sandreas.hansson@arm.com // responses to 2258948Sandreas.hansson@arm.com targets->clearDownstreamPending(); 2268948Sandreas.hansson@arm.com} 22712342Snikos.nikoleris@arm.com 22812342Snikos.nikoleris@arm.combool 22912342Snikos.nikoleris@arm.comMSHR::markInService(PacketPtr pkt) 23012342Snikos.nikoleris@arm.com{ 23112342Snikos.nikoleris@arm.com assert(!inService); 23212342Snikos.nikoleris@arm.com if (isForwardNoResponse()) { 23312342Snikos.nikoleris@arm.com // we just forwarded the request packet & don't expect a 23412342Snikos.nikoleris@arm.com // response, so get rid of it 23512342Snikos.nikoleris@arm.com assert(getNumTargets() == 1); 23612342Snikos.nikoleris@arm.com popTarget(); 23712342Snikos.nikoleris@arm.com return true; 23812342Snikos.nikoleris@arm.com } 23912342Snikos.nikoleris@arm.com inService = true; 2408975Sandreas.hansson@arm.com pendingDirty = (targets->needsExclusive || 2418975Sandreas.hansson@arm.com (!pkt->sharedAsserted() && pkt->memInhibitAsserted())); 2428975Sandreas.hansson@arm.com postInvalidate = postDowngrade = false; 24310713Sandreas.hansson@arm.com 24410713Sandreas.hansson@arm.com if (!downstreamPending) { 2458975Sandreas.hansson@arm.com // let upstream caches know that the request has made it to a 2468975Sandreas.hansson@arm.com // level where it's going to get a response 2478948Sandreas.hansson@arm.com targets->clearDownstreamPending(); 2488975Sandreas.hansson@arm.com } 2498922Swilliam.wang@arm.com return false; 2508922Swilliam.wang@arm.com} 2519087Sandreas.hansson@arm.com 25210713Sandreas.hansson@arm.com 25310713Sandreas.hansson@arm.comvoid 25410713Sandreas.hansson@arm.comMSHR::deallocate() 2559087Sandreas.hansson@arm.com{ 25610713Sandreas.hansson@arm.com assert(targets->empty()); 2579087Sandreas.hansson@arm.com targets->resetFlags(); 2589087Sandreas.hansson@arm.com assert(deferredTargets->isReset()); 2598922Swilliam.wang@arm.com assert(ntargets == 0); 2608711Sandreas.hansson@arm.com inService = false; 2618922Swilliam.wang@arm.com} 2628922Swilliam.wang@arm.com 2638922Swilliam.wang@arm.com/* 2648711Sandreas.hansson@arm.com * Adds a target to an MSHR 2658711Sandreas.hansson@arm.com */ 2668711Sandreas.hansson@arm.comvoid 2678922Swilliam.wang@arm.comMSHR::allocateTarget(PacketPtr pkt, Tick whenReady, Counter _order) 2682381SN/A{ 2698711Sandreas.hansson@arm.com // if there's a request already in service for this MSHR, we will 2709089Sandreas.hansson@arm.com // have to defer the new target until after the response if any of 2719089Sandreas.hansson@arm.com // the following are true: 2729089Sandreas.hansson@arm.com // - there are other targets already deferred 2739089Sandreas.hansson@arm.com // - there's a pending invalidate to be applied after the response 2745314Sstever@gmail.com // comes back (but before this target is processed) 2755314Sstever@gmail.com // - this target requires an exclusive block and either we're not 2765314Sstever@gmail.com // getting an exclusive block back or we have already snooped 2775314Sstever@gmail.com // another read request that will downgrade our exclusive block 2788975Sandreas.hansson@arm.com // to shared 2798975Sandreas.hansson@arm.com 2808975Sandreas.hansson@arm.com // assume we'd never issue a prefetch when we've got an 2818975Sandreas.hansson@arm.com // outstanding miss 2828975Sandreas.hansson@arm.com assert(pkt->cmd != MemCmd::HardPFReq); 2838975Sandreas.hansson@arm.com 2848975Sandreas.hansson@arm.com if (inService && 2858975Sandreas.hansson@arm.com (!deferredTargets->empty() || hasPostInvalidate() || 2868975Sandreas.hansson@arm.com (pkt->needsExclusive() && 2878975Sandreas.hansson@arm.com (!isPendingDirty() || hasPostDowngrade() || isForward)))) { 2888975Sandreas.hansson@arm.com // need to put on deferred list 2898975Sandreas.hansson@arm.com if (hasPostInvalidate()) 2908975Sandreas.hansson@arm.com replaceUpgrade(pkt); 2918975Sandreas.hansson@arm.com deferredTargets->add(pkt, whenReady, _order, Target::FromCPU, true); 2928975Sandreas.hansson@arm.com } else { 2938975Sandreas.hansson@arm.com // No request outstanding, or still OK to append to 2948975Sandreas.hansson@arm.com // outstanding request: append to regular target list. Only 2958975Sandreas.hansson@arm.com // mark pending if current request hasn't been issued yet 2968975Sandreas.hansson@arm.com // (isn't in service). 2978975Sandreas.hansson@arm.com targets->add(pkt, whenReady, _order, Target::FromCPU, !inService); 2988975Sandreas.hansson@arm.com } 2998975Sandreas.hansson@arm.com 3008975Sandreas.hansson@arm.com ++ntargets; 3018975Sandreas.hansson@arm.com} 3028975Sandreas.hansson@arm.com 3038975Sandreas.hansson@arm.combool 3048975Sandreas.hansson@arm.comMSHR::handleSnoop(PacketPtr pkt, Counter _order) 3058975Sandreas.hansson@arm.com{ 3068975Sandreas.hansson@arm.com if (!inService || (pkt->isExpressSnoop() && downstreamPending)) { 3078975Sandreas.hansson@arm.com // Request has not been issued yet, or it's been issued 3088975Sandreas.hansson@arm.com // locally but is buffered unissued at some downstream cache 3098975Sandreas.hansson@arm.com // which is forwarding us this snoop. Either way, the packet 3108975Sandreas.hansson@arm.com // we're snooping logically precedes this MSHR's request, so 3118975Sandreas.hansson@arm.com // the snoop has no impact on the MSHR, but must be processed 31210713Sandreas.hansson@arm.com // in the standard way by the cache. The only exception is 31310713Sandreas.hansson@arm.com // that if we're an L2+ cache buffering an UpgradeReq from a 31410713Sandreas.hansson@arm.com // higher-level cache, and the snoop is invalidating, then our 3159087Sandreas.hansson@arm.com // buffered upgrades must be converted to read exclusives, 31610713Sandreas.hansson@arm.com // since the upper-level cache no longer has a valid copy. 31710713Sandreas.hansson@arm.com // That is, even though the upper-level cache got out on its 31810713Sandreas.hansson@arm.com // local bus first, some other invalidating transaction 31910713Sandreas.hansson@arm.com // reached the global bus before the upgrade did. 32010713Sandreas.hansson@arm.com if (pkt->needsExclusive()) { 32110713Sandreas.hansson@arm.com targets->replaceUpgrades(); 32210713Sandreas.hansson@arm.com deferredTargets->replaceUpgrades(); 32310713Sandreas.hansson@arm.com } 32410713Sandreas.hansson@arm.com 32510713Sandreas.hansson@arm.com return false; 32610713Sandreas.hansson@arm.com } 3279087Sandreas.hansson@arm.com 3289087Sandreas.hansson@arm.com // From here on down, the request issued by this MSHR logically 3298975Sandreas.hansson@arm.com // precedes the request we're snooping. 3309325Sandreas.hansson@arm.com if (pkt->needsExclusive()) { 3318975Sandreas.hansson@arm.com // snooped request still precedes the re-request we'll have to 3329325Sandreas.hansson@arm.com // issue for deferred targets, if any... 3338975Sandreas.hansson@arm.com deferredTargets->replaceUpgrades(); 3348975Sandreas.hansson@arm.com } 3358975Sandreas.hansson@arm.com 3362381SN/A if (hasPostInvalidate()) { 3372381SN/A // a prior snoop has already appended an invalidation, so 3388922Swilliam.wang@arm.com // logically we don't have the block anymore; no need for 3398922Swilliam.wang@arm.com // further snooping. 3408922Swilliam.wang@arm.com return true; 3418922Swilliam.wang@arm.com } 3428922Swilliam.wang@arm.com 3438922Swilliam.wang@arm.com if (isPendingDirty() || pkt->isInvalidate()) { 3449294Sandreas.hansson@arm.com // We need to save and replay the packet in two cases: 3458922Swilliam.wang@arm.com // 1. We're awaiting an exclusive copy, so ownership is pending, 3468922Swilliam.wang@arm.com // and we need to respond after we receive data. 3478975Sandreas.hansson@arm.com // 2. It's an invalidation (e.g., UpgradeReq), and we need 3488975Sandreas.hansson@arm.com // to forward the snoop up the hierarchy after the current 3498922Swilliam.wang@arm.com // transaction completes. 3508922Swilliam.wang@arm.com 3518922Swilliam.wang@arm.com // Actual target device (typ. a memory) will delete the 3528922Swilliam.wang@arm.com // packet on reception, so we need to save a copy here. 3538922Swilliam.wang@arm.com PacketPtr cp_pkt = new Packet(pkt, true); 3548922Swilliam.wang@arm.com targets->add(cp_pkt, curTick(), _order, Target::FromSnoop, 3558965Sandreas.hansson@arm.com downstreamPending && targets->needsExclusive); 3569031Sandreas.hansson@arm.com ++ntargets; 3578922Swilliam.wang@arm.com 3588922Swilliam.wang@arm.com if (isPendingDirty()) { 3598922Swilliam.wang@arm.com pkt->assertMemInhibit(); 3608948Sandreas.hansson@arm.com pkt->setSupplyExclusive(); 3618948Sandreas.hansson@arm.com } 3628948Sandreas.hansson@arm.com 3638948Sandreas.hansson@arm.com if (pkt->needsExclusive()) { 3648948Sandreas.hansson@arm.com // This transaction will take away our pending copy 3658948Sandreas.hansson@arm.com postInvalidate = true; 3668948Sandreas.hansson@arm.com } 3678948Sandreas.hansson@arm.com } 3688948Sandreas.hansson@arm.com 3698948Sandreas.hansson@arm.com if (!pkt->needsExclusive()) { 3708948Sandreas.hansson@arm.com // This transaction will get a read-shared copy, downgrading 3718948Sandreas.hansson@arm.com // our copy if we had an exclusive one 3728948Sandreas.hansson@arm.com postDowngrade = true; 3738948Sandreas.hansson@arm.com pkt->assertShared(); 3748948Sandreas.hansson@arm.com } 3758948Sandreas.hansson@arm.com 3768948Sandreas.hansson@arm.com return true; 3778948Sandreas.hansson@arm.com} 3788948Sandreas.hansson@arm.com 3798948Sandreas.hansson@arm.com 3808975Sandreas.hansson@arm.combool 3818975Sandreas.hansson@arm.comMSHR::promoteDeferredTargets() 3828975Sandreas.hansson@arm.com{ 38310713Sandreas.hansson@arm.com assert(targets->empty()); 3848975Sandreas.hansson@arm.com if (deferredTargets->empty()) { 3858975Sandreas.hansson@arm.com return false; 3868975Sandreas.hansson@arm.com } 3878975Sandreas.hansson@arm.com 3888975Sandreas.hansson@arm.com // swap targets & deferredTargets lists 3898975Sandreas.hansson@arm.com TargetList *tmp = targets; 3908975Sandreas.hansson@arm.com targets = deferredTargets; 3918948Sandreas.hansson@arm.com deferredTargets = tmp; 3928948Sandreas.hansson@arm.com 3938975Sandreas.hansson@arm.com assert(targets->size() == ntargets); 3948975Sandreas.hansson@arm.com 3958975Sandreas.hansson@arm.com // clear deferredTargets flags 3968975Sandreas.hansson@arm.com deferredTargets->resetFlags(); 3978975Sandreas.hansson@arm.com 3988948Sandreas.hansson@arm.com order = targets->front().order; 3998975Sandreas.hansson@arm.com readyTime = std::max(curTick(), targets->front().readyTime); 4008948Sandreas.hansson@arm.com 4018948Sandreas.hansson@arm.com return true; 4029087Sandreas.hansson@arm.com} 40310713Sandreas.hansson@arm.com 4049087Sandreas.hansson@arm.com 40510713Sandreas.hansson@arm.comvoid 40610713Sandreas.hansson@arm.comMSHR::handleFill(Packet *pkt, CacheBlk *blk) 40710713Sandreas.hansson@arm.com{ 40810713Sandreas.hansson@arm.com if (!pkt->sharedAsserted() 40910713Sandreas.hansson@arm.com && !(hasPostInvalidate() || hasPostDowngrade()) 41010713Sandreas.hansson@arm.com && deferredTargets->needsExclusive) { 41110713Sandreas.hansson@arm.com // We got an exclusive response, but we have deferred targets 4129087Sandreas.hansson@arm.com // which are waiting to request an exclusive copy (not because 4139087Sandreas.hansson@arm.com // of a pending invalidate). This can happen if the original 4149088Sandreas.hansson@arm.com // request was for a read-only (non-exclusive) block, but we 4159088Sandreas.hansson@arm.com // got an exclusive copy anyway because of the E part of the 4169088Sandreas.hansson@arm.com // MOESI/MESI protocol. Since we got the exclusive copy 4179088Sandreas.hansson@arm.com // there's no need to defer the targets, so move them up to 4189088Sandreas.hansson@arm.com // the regular target list. 4199088Sandreas.hansson@arm.com assert(!targets->needsExclusive); 4209088Sandreas.hansson@arm.com targets->needsExclusive = true; 4218922Swilliam.wang@arm.com // if any of the deferred targets were upper-level cache 4228922Swilliam.wang@arm.com // requests marked downstreamPending, need to clear that 42310413SCurtis.Dunham@arm.com assert(!downstreamPending); // not pending here anymore 42410413SCurtis.Dunham@arm.com deferredTargets->clearDownstreamPending(); 42510413SCurtis.Dunham@arm.com // this clears out deferredTargets too 42610413SCurtis.Dunham@arm.com targets->splice(targets->end(), *deferredTargets); 42710413SCurtis.Dunham@arm.com deferredTargets->resetFlags(); 4288922Swilliam.wang@arm.com } 4298922Swilliam.wang@arm.com} 4308922Swilliam.wang@arm.com 4318922Swilliam.wang@arm.com 4328922Swilliam.wang@arm.combool 4338922Swilliam.wang@arm.comMSHR::checkFunctional(PacketPtr pkt) 4348922Swilliam.wang@arm.com{ 4358922Swilliam.wang@arm.com // For printing, we treat the MSHR as a whole as single entity. 4369090Sandreas.hansson@arm.com // For other requests, we iterate over the individual targets 4378975Sandreas.hansson@arm.com // since that's where the actual data lies. 4388975Sandreas.hansson@arm.com if (pkt->isPrint()) { 4398975Sandreas.hansson@arm.com pkt->checkFunctional(this, addr, size, NULL); 4408975Sandreas.hansson@arm.com return false; 4419178Sandreas.hansson@arm.com } else { 4429178Sandreas.hansson@arm.com return (targets->checkFunctional(pkt) || 4439178Sandreas.hansson@arm.com deferredTargets->checkFunctional(pkt)); 4449178Sandreas.hansson@arm.com } 4459178Sandreas.hansson@arm.com} 4469178Sandreas.hansson@arm.com 4479178Sandreas.hansson@arm.com 4489178Sandreas.hansson@arm.comvoid 4499178Sandreas.hansson@arm.comMSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const 4509178Sandreas.hansson@arm.com{ 4519178Sandreas.hansson@arm.com ccprintf(os, "%s[%x:%x] %s %s %s state: %s %s %s %s\n", 4529178Sandreas.hansson@arm.com prefix, addr, addr+size-1, 4538975Sandreas.hansson@arm.com isForward ? "Forward" : "", 4548975Sandreas.hansson@arm.com isForwardNoResponse() ? "ForwNoResp" : "", 4558975Sandreas.hansson@arm.com needsExclusive() ? "Excl" : "", 4568975Sandreas.hansson@arm.com _isUncacheable ? "Unc" : "", 4578975Sandreas.hansson@arm.com inService ? "InSvc" : "", 4588975Sandreas.hansson@arm.com downstreamPending ? "DwnPend" : "", 4598975Sandreas.hansson@arm.com hasPostInvalidate() ? "PostInv" : "", 4608975Sandreas.hansson@arm.com hasPostDowngrade() ? "PostDowngr" : ""); 4618975Sandreas.hansson@arm.com 4628975Sandreas.hansson@arm.com ccprintf(os, "%s Targets:\n", prefix); 4638975Sandreas.hansson@arm.com targets->print(os, verbosity, prefix + " "); 4648975Sandreas.hansson@arm.com if (!deferredTargets->empty()) { 4658975Sandreas.hansson@arm.com ccprintf(os, "%s Deferred Targets:\n", prefix); 4668975Sandreas.hansson@arm.com deferredTargets->print(os, verbosity, prefix + " "); 4678975Sandreas.hansson@arm.com } 46812342Snikos.nikoleris@arm.com} 46912342Snikos.nikoleris@arm.com 47012342Snikos.nikoleris@arm.comMSHR::~MSHR() 47112342Snikos.nikoleris@arm.com{ 47212342Snikos.nikoleris@arm.com delete[] targets; 47312342Snikos.nikoleris@arm.com delete[] deferredTargets; 47412342Snikos.nikoleris@arm.com} 4758975Sandreas.hansson@arm.com