mshr.cc revision 5730
1360SN/A/* 210850SGiacomo.Gabrielli@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan 310796Sbrandon.potter@amd.com * All rights reserved. 410027SChris.Adeniyi-Jones@arm.com * 510027SChris.Adeniyi-Jones@arm.com * Redistribution and use in source and binary forms, with or without 610027SChris.Adeniyi-Jones@arm.com * modification, are permitted provided that the following conditions are 710027SChris.Adeniyi-Jones@arm.com * met: redistributions of source code must retain the above copyright 810027SChris.Adeniyi-Jones@arm.com * notice, this list of conditions and the following disclaimer; 910027SChris.Adeniyi-Jones@arm.com * redistributions in binary form must reproduce the above copyright 1010027SChris.Adeniyi-Jones@arm.com * notice, this list of conditions and the following disclaimer in the 1110027SChris.Adeniyi-Jones@arm.com * documentation and/or other materials provided with the distribution; 1210027SChris.Adeniyi-Jones@arm.com * neither the name of the copyright holders nor the names of its 1310027SChris.Adeniyi-Jones@arm.com * contributors may be used to endorse or promote products derived from 1410027SChris.Adeniyi-Jones@arm.com * this software without specific prior written permission. 151458SN/A * 16360SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17360SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18360SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19360SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20360SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21360SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22360SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23360SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24360SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25360SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26360SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27360SN/A * 28360SN/A * Authors: Erik Hallnor 29360SN/A * Dave Greene 30360SN/A */ 31360SN/A 32360SN/A/** 33360SN/A * @file 34360SN/A * Miss Status and Handling Register (MSHR) definitions. 35360SN/A */ 36360SN/A 37360SN/A#include <assert.h> 38360SN/A#include <string> 39360SN/A#include <vector> 402665Ssaidi@eecs.umich.edu#include <algorithm> 412665Ssaidi@eecs.umich.edu 422665Ssaidi@eecs.umich.edu#include "mem/cache/mshr.hh" 43360SN/A#include "sim/core.hh" // for curTick 44360SN/A#include "sim/host.hh" 451354SN/A#include "base/misc.hh" 461354SN/A#include "mem/cache/cache.hh" 47360SN/A 4812018Sandreas.sandberg@arm.comusing namespace std; 4912018Sandreas.sandberg@arm.com 5012018Sandreas.sandberg@arm.comMSHR::MSHR() 5112018Sandreas.sandberg@arm.com{ 5212018Sandreas.sandberg@arm.com inService = false; 5312018Sandreas.sandberg@arm.com ntargets = 0; 5412018Sandreas.sandberg@arm.com threadNum = -1; 552064SN/A targets = new TargetList(); 5612018Sandreas.sandberg@arm.com deferredTargets = new TargetList(); 5712018Sandreas.sandberg@arm.com} 5812018Sandreas.sandberg@arm.com 5912018Sandreas.sandberg@arm.com 6012018Sandreas.sandberg@arm.comMSHR::TargetList::TargetList() 6112018Sandreas.sandberg@arm.com : needsExclusive(false), hasUpgrade(false) 6211799Sbrandon.potter@amd.com{} 6312018Sandreas.sandberg@arm.com 6412018Sandreas.sandberg@arm.com 6512018Sandreas.sandberg@arm.cominline void 6612018Sandreas.sandberg@arm.comMSHR::TargetList::add(PacketPtr pkt, Tick readyTime, 6712018Sandreas.sandberg@arm.com Counter order, bool cpuSide, bool markPending) 6812018Sandreas.sandberg@arm.com{ 6911799Sbrandon.potter@amd.com if (cpuSide) { 70360SN/A if (pkt->needsExclusive()) { 71360SN/A needsExclusive = true; 72360SN/A } 73360SN/A 74360SN/A if (pkt->cmd == MemCmd::UpgradeReq) { 75360SN/A hasUpgrade = true; 761809SN/A } 7711800Sbrandon.potter@amd.com } 7811392Sbrandon.potter@amd.com 791809SN/A if (markPending) { 8011392Sbrandon.potter@amd.com MSHR *mshr = dynamic_cast<MSHR*>(pkt->senderState); 8111383Sbrandon.potter@amd.com if (mshr != NULL) { 823113Sgblack@eecs.umich.edu assert(!mshr->downstreamPending); 8311799Sbrandon.potter@amd.com mshr->downstreamPending = true; 8411759Sbrandon.potter@amd.com } 8511812Sbaz21@cam.ac.uk } 8611812Sbaz21@cam.ac.uk 8711799Sbrandon.potter@amd.com push_back(Target(pkt, readyTime, order, cpuSide, markPending)); 888229Snate@binkert.org} 898229Snate@binkert.org 9011594Santhony.gutierrez@amd.com 917075Snate@binkert.orgvoid 928229Snate@binkert.orgMSHR::TargetList::replaceUpgrades() 9311856Sbrandon.potter@amd.com{ 947075Snate@binkert.org if (!hasUpgrade) 95360SN/A return; 9612461Sgabeblack@google.com 9711886Sbrandon.potter@amd.com Iterator end_i = end(); 9811800Sbrandon.potter@amd.com for (Iterator i = begin(); i != end_i; ++i) { 9911392Sbrandon.potter@amd.com if (i->pkt->cmd == MemCmd::UpgradeReq) { 10012334Sgabeblack@google.com i->pkt->cmd = MemCmd::ReadExReq; 1011354SN/A DPRINTF(Cache, "Replacing UpgradeReq with ReadExReq\n"); 1026216Snate@binkert.org } 1036658Snate@binkert.org } 1042474SN/A 1052680Sktlim@umich.edu hasUpgrade = false; 1068229Snate@binkert.org} 10711886Sbrandon.potter@amd.com 10810496Ssteve.reinhardt@amd.com 10911911SBrandon.Potter@amd.comvoid 1108229Snate@binkert.orgMSHR::TargetList::clearDownstreamPending() 11111794Sbrandon.potter@amd.com{ 11211886Sbrandon.potter@amd.com Iterator end_i = end(); 11310497Ssteve.reinhardt@amd.com for (Iterator i = begin(); i != end_i; ++i) { 11411794Sbrandon.potter@amd.com if (i->markedPending) { 115360SN/A MSHR *mshr = dynamic_cast<MSHR*>(i->pkt->senderState); 116360SN/A if (mshr != NULL) { 117360SN/A mshr->clearDownstreamPending(); 118360SN/A } 119360SN/A } 120360SN/A } 121360SN/A} 122360SN/A 123360SN/A 124360SN/Abool 125378SN/AMSHR::TargetList::checkFunctional(PacketPtr pkt) 1261706SN/A{ 12711851Sbrandon.potter@amd.com Iterator end_i = end(); 128378SN/A for (Iterator i = begin(); i != end_i; ++i) { 129378SN/A if (pkt->checkFunctional(i->pkt)) { 130378SN/A return true; 131378SN/A } 132378SN/A } 1331706SN/A 13411851Sbrandon.potter@amd.com return false; 135360SN/A} 13611760Sbrandon.potter@amd.com 13711760Sbrandon.potter@amd.com 13811851Sbrandon.potter@amd.comvoid 13911760Sbrandon.potter@amd.comMSHR::TargetList:: 1406109Ssanchezd@stanford.eduprint(std::ostream &os, int verbosity, const std::string &prefix) const 1411706SN/A{ 14211851Sbrandon.potter@amd.com ConstIterator end_i = end(); 143378SN/A for (ConstIterator i = begin(); i != end_i; ++i) { 1446109Ssanchezd@stanford.edu ccprintf(os, "%s%s: ", prefix, i->isCpuSide() ? "cpu" : "mem"); 1456109Ssanchezd@stanford.edu i->pkt->print(os, verbosity, ""); 14611851Sbrandon.potter@amd.com } 1476109Ssanchezd@stanford.edu} 14811886Sbrandon.potter@amd.com 14911886Sbrandon.potter@amd.com 15011886Sbrandon.potter@amd.comvoid 15111886Sbrandon.potter@amd.comMSHR::allocate(Addr _addr, int _size, PacketPtr target, 152378SN/A Tick whenReady, Counter _order) 1531706SN/A{ 15411851Sbrandon.potter@amd.com addr = _addr; 155378SN/A size = _size; 1565748SSteve.Reinhardt@amd.com readyTime = whenReady; 1575748SSteve.Reinhardt@amd.com order = _order; 15811851Sbrandon.potter@amd.com assert(target); 159378SN/A isForward = false; 160378SN/A _isUncacheable = target->req->isUncacheable(); 1611706SN/A inService = false; 16211851Sbrandon.potter@amd.com downstreamPending = false; 163378SN/A threadNum = 0; 16411886Sbrandon.potter@amd.com ntargets = 1; 1651706SN/A // Don't know of a case where we would allocate a new MSHR for a 16611851Sbrandon.potter@amd.com // snoop (mem-side request), so set cpuSide to true here. 167378SN/A assert(targets->isReset()); 168378SN/A targets->add(target, whenReady, _order, true, true); 1691706SN/A assert(deferredTargets->isReset()); 17011851Sbrandon.potter@amd.com pendingInvalidate = false; 171378SN/A pendingShared = false; 172378SN/A data = NULL; 1731706SN/A} 17411851Sbrandon.potter@amd.com 175378SN/A 1764118Sgblack@eecs.umich.eduvoid 1774118Sgblack@eecs.umich.eduMSHR::clearDownstreamPending() 17811851Sbrandon.potter@amd.com{ 1794118Sgblack@eecs.umich.edu assert(downstreamPending); 180378SN/A downstreamPending = false; 1811706SN/A // recursively clear flag on any MSHRs we will be forwarding 18211851Sbrandon.potter@amd.com // responses to 183378SN/A targets->clearDownstreamPending(); 184378SN/A} 1851706SN/A 18611851Sbrandon.potter@amd.combool 187360SN/AMSHR::markInService() 1885513SMichael.Adler@intel.com{ 1895513SMichael.Adler@intel.com assert(!inService); 19011851Sbrandon.potter@amd.com if (isForwardNoResponse()) { 1915513SMichael.Adler@intel.com // we just forwarded the request packet & don't expect a 19210203SAli.Saidi@ARM.com // response, so get rid of it 19310203SAli.Saidi@ARM.com assert(getNumTargets() == 1); 19411851Sbrandon.potter@amd.com popTarget(); 19510203SAli.Saidi@ARM.com return true; 1965513SMichael.Adler@intel.com } 19711851Sbrandon.potter@amd.com inService = true; 1985513SMichael.Adler@intel.com if (!downstreamPending) { 199511SN/A // let upstream caches know that the request has made it to a 20010633Smichaelupton@gmail.com // level where it's going to get a response 20111851Sbrandon.potter@amd.com targets->clearDownstreamPending(); 20210633Smichaelupton@gmail.com } 2031706SN/A return false; 20411851Sbrandon.potter@amd.com} 205511SN/A 2065513SMichael.Adler@intel.com 2075513SMichael.Adler@intel.comvoid 20811851Sbrandon.potter@amd.comMSHR::deallocate() 2095513SMichael.Adler@intel.com{ 210511SN/A assert(targets->empty()); 2111706SN/A targets->resetFlags(); 21211851Sbrandon.potter@amd.com assert(deferredTargets->isReset()); 2131706SN/A assert(ntargets == 0); 2141706SN/A inService = false; 2151706SN/A //allocIter = NULL; 2161706SN/A //readyIter = NULL; 21711851Sbrandon.potter@amd.com} 2181706SN/A 2191706SN/A/* 2201706SN/A * Adds a target to an MSHR 2211706SN/A */ 22211851Sbrandon.potter@amd.comvoid 2231706SN/AMSHR::allocateTarget(PacketPtr pkt, Tick whenReady, Counter _order) 224511SN/A{ 2256703Svince@csl.cornell.edu // if there's a request already in service for this MSHR, we will 2266703Svince@csl.cornell.edu // have to defer the new target until after the response if any of 22711851Sbrandon.potter@amd.com // the following are true: 2286703Svince@csl.cornell.edu // - there are other targets already deferred 2296685Stjones1@inf.ed.ac.uk // - there's a pending invalidate to be applied after the response 2306685Stjones1@inf.ed.ac.uk // comes back (but before this target is processed) 23111851Sbrandon.potter@amd.com // - the outstanding request is for a non-exclusive block and this 2326685Stjones1@inf.ed.ac.uk // target requires an exclusive block 2336685Stjones1@inf.ed.ac.uk if (inService && 2345513SMichael.Adler@intel.com (!deferredTargets->empty() || pendingInvalidate || 2355513SMichael.Adler@intel.com (!targets->needsExclusive && pkt->needsExclusive()))) { 23611851Sbrandon.potter@amd.com // need to put on deferred list 2375513SMichael.Adler@intel.com deferredTargets->add(pkt, whenReady, _order, true, true); 23811885Sbrandon.potter@amd.com } else { 23911885Sbrandon.potter@amd.com // No request outstanding, or still OK to append to 24011885Sbrandon.potter@amd.com // outstanding request: append to regular target list. Only 2415513SMichael.Adler@intel.com // mark pending if current request hasn't been issued yet 2421999SN/A // (isn't in service). 2431999SN/A targets->add(pkt, whenReady, _order, true, !inService); 24411851Sbrandon.potter@amd.com } 2451999SN/A 24611885Sbrandon.potter@amd.com ++ntargets; 24711885Sbrandon.potter@amd.com} 24811885Sbrandon.potter@amd.com 2491999SN/Abool 2501999SN/AMSHR::handleSnoop(PacketPtr pkt, Counter _order) 2511999SN/A{ 25211851Sbrandon.potter@amd.com if (!inService || (pkt->isExpressSnoop() && downstreamPending)) { 2531999SN/A // Request has not been issued yet, or it's been issued 2543079Sstever@eecs.umich.edu // locally but is buffered unissued at some downstream cache 2553079Sstever@eecs.umich.edu // which is forwarding us this snoop. Either way, the packet 25611851Sbrandon.potter@amd.com // we're snooping logically precedes this MSHR's request, so 2573079Sstever@eecs.umich.edu // the snoop has no impact on the MSHR, but must be processed 25811908SBrandon.Potter@amd.com // in the standard way by the cache. The only exception is 25911908SBrandon.Potter@amd.com // that if we're an L2+ cache buffering an UpgradeReq from a 26011908SBrandon.Potter@amd.com // higher-level cache, and the snoop is invalidating, then our 26111908SBrandon.Potter@amd.com // buffered upgrades must be converted to read exclusives, 26211875Sbrandon.potter@amd.com // since the upper-level cache no longer has a valid copy. 2632093SN/A // That is, even though the upper-level cache got out on its 26411851Sbrandon.potter@amd.com // local bus first, some other invalidating transaction 2652093SN/A // reached the global bus before the upgrade did. 2662687Sksewell@umich.edu if (pkt->needsExclusive()) { 2672687Sksewell@umich.edu targets->replaceUpgrades(); 26811851Sbrandon.potter@amd.com deferredTargets->replaceUpgrades(); 2692687Sksewell@umich.edu } 2702238SN/A 2712238SN/A return false; 27211851Sbrandon.potter@amd.com } 2732238SN/A 27411908SBrandon.Potter@amd.com // From here on down, the request issued by this MSHR logically 27511908SBrandon.Potter@amd.com // precedes the request we're snooping. 27611908SBrandon.Potter@amd.com 27711908SBrandon.Potter@amd.com if (pkt->needsExclusive()) { 27811908SBrandon.Potter@amd.com // snooped request still precedes the re-request we'll have to 27911908SBrandon.Potter@amd.com // issue for deferred targets, if any... 28011908SBrandon.Potter@amd.com deferredTargets->replaceUpgrades(); 28111908SBrandon.Potter@amd.com } 2822238SN/A 2832238SN/A if (pendingInvalidate) { 28411851Sbrandon.potter@amd.com // a prior snoop has already appended an invalidation, so 2852238SN/A // logically we don't have the block anymore; no need for 2862238SN/A // further snooping. 2872238SN/A return true; 28811851Sbrandon.potter@amd.com } 2892238SN/A 2902238SN/A if (targets->needsExclusive || pkt->needsExclusive()) { 2912238SN/A // actual target device (typ. PhysicalMemory) will delete the 29211851Sbrandon.potter@amd.com // packet on reception, so we need to save a copy here 2932238SN/A PacketPtr cp_pkt = new Packet(pkt, true); 2942238SN/A targets->add(cp_pkt, curTick, _order, false, 2952238SN/A downstreamPending && targets->needsExclusive); 29611851Sbrandon.potter@amd.com ++ntargets; 2972238SN/A 2982238SN/A if (targets->needsExclusive) { 2992238SN/A // We're awaiting an exclusive copy, so ownership is pending. 30011851Sbrandon.potter@amd.com // It's up to us to respond once the data arrives. 3012238SN/A pkt->assertMemInhibit(); 3022238SN/A pkt->setSupplyExclusive(); 3032238SN/A } else { 30411851Sbrandon.potter@amd.com // Someone else may respond before we get around to 3052238SN/A // processing this snoop, which means the copied request 3069455Smitch.hayenga+gem5@gmail.com // pointer will no longer be valid 3079455Smitch.hayenga+gem5@gmail.com cp_pkt->req = NULL; 30811851Sbrandon.potter@amd.com } 30910203SAli.Saidi@ARM.com 31011851Sbrandon.potter@amd.com if (pkt->needsExclusive()) { 31111851Sbrandon.potter@amd.com // This transaction will take away our pending copy 3129455Smitch.hayenga+gem5@gmail.com pendingInvalidate = true; 3139112Smarc.orr@gmail.com } 31411906SBrandon.Potter@amd.com } else { 31511906SBrandon.Potter@amd.com // Read to a read: no conflict, so no need to record as 3169112Smarc.orr@gmail.com // target, but make sure neither reader thinks he's getting an 3179112Smarc.orr@gmail.com // exclusive copy 31811851Sbrandon.potter@amd.com pendingShared = true; 3199112Smarc.orr@gmail.com pkt->assertShared(); 3209112Smarc.orr@gmail.com } 32111911SBrandon.Potter@amd.com 3229112Smarc.orr@gmail.com return true; 32311911SBrandon.Potter@amd.com} 32411911SBrandon.Potter@amd.com 32511911SBrandon.Potter@amd.com 32611911SBrandon.Potter@amd.combool 3279112Smarc.orr@gmail.comMSHR::promoteDeferredTargets() 32811911SBrandon.Potter@amd.com{ 32911911SBrandon.Potter@amd.com assert(targets->empty()); 33011911SBrandon.Potter@amd.com if (deferredTargets->empty()) { 33111911SBrandon.Potter@amd.com return false; 3329238Slluc.alvarez@bsc.es } 3339112Smarc.orr@gmail.com 33411911SBrandon.Potter@amd.com // swap targets & deferredTargets lists 3359112Smarc.orr@gmail.com TargetList *tmp = targets; 33611911SBrandon.Potter@amd.com targets = deferredTargets; 33711911SBrandon.Potter@amd.com deferredTargets = tmp; 33811911SBrandon.Potter@amd.com 33911911SBrandon.Potter@amd.com assert(targets->size() == ntargets); 34011911SBrandon.Potter@amd.com 3419112Smarc.orr@gmail.com // clear deferredTargets flags 34211911SBrandon.Potter@amd.com deferredTargets->resetFlags(); 34311911SBrandon.Potter@amd.com 34411911SBrandon.Potter@amd.com pendingInvalidate = false; 34511911SBrandon.Potter@amd.com pendingShared = false; 34611911SBrandon.Potter@amd.com order = targets->front().order; 34711911SBrandon.Potter@amd.com readyTime = std::max(curTick, targets->front().readyTime); 3489112Smarc.orr@gmail.com 3499112Smarc.orr@gmail.com return true; 35011911SBrandon.Potter@amd.com} 35111911SBrandon.Potter@amd.com 3529112Smarc.orr@gmail.com 35311911SBrandon.Potter@amd.comvoid 35411911SBrandon.Potter@amd.comMSHR::handleFill(Packet *pkt, CacheBlk *blk) 3559112Smarc.orr@gmail.com{ 3569112Smarc.orr@gmail.com if (pendingShared) { 35711911SBrandon.Potter@amd.com // we snooped another read while this read was in 35811911SBrandon.Potter@amd.com // service... assert shared line on its behalf 3599112Smarc.orr@gmail.com pkt->assertShared(); 3609112Smarc.orr@gmail.com } 3612238SN/A 3622238SN/A if (!pkt->sharedAsserted() && !pendingInvalidate 3632238SN/A && deferredTargets->needsExclusive) { 3642238SN/A // We got an exclusive response, but we have deferred targets 36511851Sbrandon.potter@amd.com // which are waiting to request an exclusive copy (not because 3662238SN/A // of a pending invalidate). This can happen if the original 3672238SN/A // request was for a read-only (non-exclusive) block, but we 3682238SN/A // got an exclusive copy anyway because of the E part of the 36911851Sbrandon.potter@amd.com // MOESI/MESI protocol. Since we got the exclusive copy 3702238SN/A // there's no need to defer the targets, so move them up to 3712238SN/A // the regular target list. 3722238SN/A assert(!targets->needsExclusive); 37311851Sbrandon.potter@amd.com targets->needsExclusive = true; 3742238SN/A // if any of the deferred targets were upper-level cache 3752238SN/A // requests marked downstreamPending, need to clear that 3762238SN/A assert(!downstreamPending); // not pending here anymore 37711851Sbrandon.potter@amd.com deferredTargets->clearDownstreamPending(); 3782238SN/A // this clears out deferredTargets too 3792238SN/A targets->splice(targets->end(), *deferredTargets); 3801354SN/A deferredTargets->resetFlags(); 3811354SN/A } 38210796Sbrandon.potter@amd.com} 38310796Sbrandon.potter@amd.com 3841354SN/A 3851354SN/Abool 3861354SN/AMSHR::checkFunctional(PacketPtr pkt) 3871354SN/A{ 3881354SN/A // For printing, we treat the MSHR as a whole as single entity. 3891354SN/A // For other requests, we iterate over the individual targets 3901354SN/A // since that's where the actual data lies. 3911354SN/A if (pkt->isPrint()) { 3921354SN/A pkt->checkFunctional(this, addr, size, NULL); 3931354SN/A return false; 39410796Sbrandon.potter@amd.com } else { 3951354SN/A return (targets->checkFunctional(pkt) || 39610796Sbrandon.potter@amd.com deferredTargets->checkFunctional(pkt)); 3971354SN/A } 3981354SN/A} 3991354SN/A 4001354SN/A 40110796Sbrandon.potter@amd.comvoid 40210796Sbrandon.potter@amd.comMSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const 40310796Sbrandon.potter@amd.com{ 40410796Sbrandon.potter@amd.com ccprintf(os, "%s[%x:%x] %s %s %s state: %s %s %s %s\n", 40510796Sbrandon.potter@amd.com prefix, addr, addr+size-1, 40610796Sbrandon.potter@amd.com isForward ? "Forward" : "", 40710796Sbrandon.potter@amd.com isForwardNoResponse() ? "ForwNoResp" : "", 40810796Sbrandon.potter@amd.com needsExclusive() ? "Excl" : "", 40910796Sbrandon.potter@amd.com _isUncacheable ? "Unc" : "", 41010796Sbrandon.potter@amd.com inService ? "InSvc" : "", 41110796Sbrandon.potter@amd.com downstreamPending ? "DwnPend" : "", 412360SN/A pendingInvalidate ? "PendInv" : "", 413360SN/A pendingShared ? "PendShared" : ""); 414360SN/A 415360SN/A ccprintf(os, "%s Targets:\n", prefix); 416360SN/A targets->print(os, verbosity, prefix + " "); 417360SN/A if (!deferredTargets->empty()) { 418360SN/A ccprintf(os, "%s Deferred Targets:\n", prefix); 41911759Sbrandon.potter@amd.com deferredTargets->print(os, verbosity, prefix + " "); 4203113Sgblack@eecs.umich.edu } 4213113Sgblack@eecs.umich.edu} 4223113Sgblack@eecs.umich.edu 4233113Sgblack@eecs.umich.eduMSHR::~MSHR() 4243113Sgblack@eecs.umich.edu{ 4253113Sgblack@eecs.umich.edu} 4263113Sgblack@eecs.umich.edu