abstract_mem.hh revision 12748:ae5ce8e42de7 
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2001-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ron Dreslinski
41 *          Andreas Hansson
42 */
43
44/**
45 * @file
46 * AbstractMemory declaration
47 */
48
49#ifndef __MEM_ABSTRACT_MEMORY_HH__
50#define __MEM_ABSTRACT_MEMORY_HH__
51
52#include "mem/mem_object.hh"
53#include "params/AbstractMemory.hh"
54#include "sim/stats.hh"
55
56
57class System;
58
59/**
60 * Locked address class that represents a physical address and a
61 * context id.
62 */
63class LockedAddr {
64
65  private:
66
67    // on alpha, minimum LL/SC granularity is 16 bytes, so lower
68    // bits need to masked off.
69    static const Addr Addr_Mask = 0xf;
70
71  public:
72
73    // locked address
74    Addr addr;
75
76    // locking hw context
77    const ContextID contextId;
78
79    static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
80
81    // check for matching execution context
82    bool matchesContext(RequestPtr req) const
83    {
84        return (contextId == req->contextId());
85    }
86
87    LockedAddr(RequestPtr req) : addr(mask(req->getPaddr())),
88                               contextId(req->contextId())
89    {}
90
91    // constructor for unserialization use
92    LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid)
93    {}
94};
95
96/**
97 * An abstract memory represents a contiguous block of physical
98 * memory, with an associated address range, and also provides basic
99 * functionality for reading and writing this memory without any
100 * timing information. It is a MemObject since any subclass must have
101 * at least one slave port.
102 */
103class AbstractMemory : public MemObject
104{
105  protected:
106
107    // Address range of this memory
108    AddrRange range;
109
110    // Pointer to host memory used to implement this memory
111    uint8_t* pmemAddr;
112
113    // Enable specific memories to be reported to the configuration table
114    const bool confTableReported;
115
116    // Should the memory appear in the global address map
117    const bool inAddrMap;
118
119    // Should KVM map this memory for the guest
120    const bool kvmMap;
121
122    std::list<LockedAddr> lockedAddrList;
123
124    // helper function for checkLockedAddrs(): we really want to
125    // inline a quick check for an empty locked addr list (hopefully
126    // the common case), and do the full list search (if necessary) in
127    // this out-of-line function
128    bool checkLockedAddrList(PacketPtr pkt);
129
130    // Record the address of a load-locked operation so that we can
131    // clear the execution context's lock flag if a matching store is
132    // performed
133    void trackLoadLocked(PacketPtr pkt);
134
135    // Compare a store address with any locked addresses so we can
136    // clear the lock flag appropriately.  Return value set to 'false'
137    // if store operation should be suppressed (because it was a
138    // conditional store and the address was no longer locked by the
139    // requesting execution context), 'true' otherwise.  Note that
140    // this method must be called on *all* stores since even
141    // non-conditional stores must clear any matching lock addresses.
142    bool writeOK(PacketPtr pkt) {
143        RequestPtr req = pkt->req;
144        if (lockedAddrList.empty()) {
145            // no locked addrs: nothing to check, store_conditional fails
146            bool isLLSC = pkt->isLLSC();
147            if (isLLSC) {
148                req->setExtraData(0);
149            }
150            return !isLLSC; // only do write if not an sc
151        } else {
152            // iterate over list...
153            return checkLockedAddrList(pkt);
154        }
155    }
156
157    /** Number of total bytes read from this memory */
158    Stats::Vector bytesRead;
159    /** Number of instruction bytes read from this memory */
160    Stats::Vector bytesInstRead;
161    /** Number of bytes written to this memory */
162    Stats::Vector bytesWritten;
163    /** Number of read requests */
164    Stats::Vector numReads;
165    /** Number of write requests */
166    Stats::Vector numWrites;
167    /** Number of other requests */
168    Stats::Vector numOther;
169    /** Read bandwidth from this memory */
170    Stats::Formula bwRead;
171    /** Read bandwidth from this memory */
172    Stats::Formula bwInstRead;
173    /** Write bandwidth from this memory */
174    Stats::Formula bwWrite;
175    /** Total bandwidth from this memory */
176    Stats::Formula bwTotal;
177
178    /** Pointor to the System object.
179     * This is used for getting the number of masters in the system which is
180     * needed when registering stats
181     */
182    System *_system;
183
184
185  private:
186
187    // Prevent copying
188    AbstractMemory(const AbstractMemory&);
189
190    // Prevent assignment
191    AbstractMemory& operator=(const AbstractMemory&);
192
193  public:
194
195    typedef AbstractMemoryParams Params;
196
197    AbstractMemory(const Params* p);
198    virtual ~AbstractMemory() {}
199
200    /**
201     * Initialise this memory.
202     */
203    void init() override;
204
205    /**
206     * See if this is a null memory that should never store data and
207     * always return zero.
208     *
209     * @return true if null
210     */
211    bool isNull() const { return params()->null; }
212
213    /**
214     * Set the host memory backing store to be used by this memory
215     * controller.
216     *
217     * @param pmem_addr Pointer to a segment of host memory
218     */
219    void setBackingStore(uint8_t* pmem_addr);
220
221    /**
222     * Get the list of locked addresses to allow checkpointing.
223     */
224    const std::list<LockedAddr>& getLockedAddrList() const
225    { return lockedAddrList; }
226
227    /**
228     * Add a locked address to allow for checkpointing.
229     */
230    void addLockedAddr(LockedAddr addr) { lockedAddrList.push_back(addr); }
231
232    /** read the system pointer
233     * Implemented for completeness with the setter
234     * @return pointer to the system object */
235    System* system() const { return _system; }
236
237    /** Set the system pointer on this memory
238     * This can't be done via a python parameter because the system needs
239     * pointers to all the memories and the reverse would create a cycle in the
240     * object graph. An init() this is set.
241     * @param sys system pointer to set
242     */
243    void system(System *sys) { _system = sys; }
244
245    const Params *
246    params() const
247    {
248        return dynamic_cast<const Params *>(_params);
249    }
250
251    /**
252     * Get the address range
253     *
254     * @return a single contigous address range
255     */
256    AddrRange getAddrRange() const;
257
258    /**
259     * Get the memory size.
260     *
261     * @return the size of the memory
262     */
263    uint64_t size() const { return range.size(); }
264
265    /**
266     * Get the start address.
267     *
268     * @return the start address of the memory
269     */
270    Addr start() const { return range.start(); }
271
272    /**
273     *  Should this memory be passed to the kernel and part of the OS
274     *  physical memory layout.
275     *
276     * @return if this memory is reported
277     */
278    bool isConfReported() const { return confTableReported; }
279
280    /**
281     * Some memories are used as shadow memories or should for other
282     * reasons not be part of the global address map.
283     *
284     * @return if this memory is part of the address map
285     */
286    bool isInAddrMap() const { return inAddrMap; }
287
288    /**
289     * When shadow memories are in use, KVM may want to make one or the other,
290     * but cannot map both into the guest address space.
291     *
292     * @return if this memory should be mapped into the KVM guest address space
293     */
294    bool isKvmMap() const { return kvmMap; }
295
296    /**
297     * Perform an untimed memory access and update all the state
298     * (e.g. locked addresses) and statistics accordingly. The packet
299     * is turned into a response if required.
300     *
301     * @param pkt Packet performing the access
302     */
303    void access(PacketPtr pkt);
304
305    /**
306     * Perform an untimed memory read or write without changing
307     * anything but the memory itself. No stats are affected by this
308     * access. In addition to normal accesses this also facilitates
309     * print requests.
310     *
311     * @param pkt Packet performing the access
312     */
313    void functionalAccess(PacketPtr pkt);
314
315    /**
316     * Register Statistics
317     */
318    void regStats() override;
319
320};
321
322#endif //__MEM_ABSTRACT_MEMORY_HH__
323