abstract_mem.hh revision 4762
12124SN/A/* 22124SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 35268Sksewell@umich.edu * All rights reserved. 45268Sksewell@umich.edu * 55268Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without 65268Sksewell@umich.edu * modification, are permitted provided that the following conditions are 75268Sksewell@umich.edu * met: redistributions of source code must retain the above copyright 85268Sksewell@umich.edu * notice, this list of conditions and the following disclaimer; 95268Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright 105268Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 115268Sksewell@umich.edu * documentation and/or other materials provided with the distribution; 125268Sksewell@umich.edu * neither the name of the copyright holders nor the names of its 135268Sksewell@umich.edu * contributors may be used to endorse or promote products derived from 145268Sksewell@umich.edu * this software without specific prior written permission. 155268Sksewell@umich.edu * 165268Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 175268Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 185268Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 195268Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 205268Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215268Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225268Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235268Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245268Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255268Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265268Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 275268Sksewell@umich.edu * 285268Sksewell@umich.edu * Authors: Ron Dreslinski 295268Sksewell@umich.edu */ 305268Sksewell@umich.edu 312022SN/A/* @file 322649Ssaidi@eecs.umich.edu */ 332649Ssaidi@eecs.umich.edu 342706Sksewell@umich.edu#ifndef __PHYSICAL_MEMORY_HH__ 352649Ssaidi@eecs.umich.edu#define __PHYSICAL_MEMORY_HH__ 362649Ssaidi@eecs.umich.edu 372022SN/A#include <map> 382124SN/A#include <string> 392124SN/A 402124SN/A#include "base/range.hh" 412124SN/A#include "mem/mem_object.hh" 422124SN/A#include "mem/packet.hh" 432124SN/A#include "mem/tport.hh" 442124SN/A#include "params/PhysicalMemory.hh" 455736Snate@binkert.org#include "sim/eventq.hh" 462239SN/A 472124SN/A// 482124SN/A// Functional model for a contiguous block of physical memory. (i.e. RAM) 492124SN/A// 502124SN/Aclass PhysicalMemory : public MemObject 516207Sksewell@umich.edu{ 522124SN/A class MemoryPort : public SimpleTimingPort 532742Sksewell@umich.edu { 542022SN/A PhysicalMemory *memory; 552124SN/A 562022SN/A public: 5712616Sgabeblack@google.com 5812616Sgabeblack@google.com MemoryPort(const std::string &_name, PhysicalMemory *_memory); 592124SN/A 602124SN/A protected: 612742Sksewell@umich.edu 622742Sksewell@umich.edu virtual Tick recvAtomic(PacketPtr pkt); 632742Sksewell@umich.edu 642742Sksewell@umich.edu virtual void recvFunctional(PacketPtr pkt); 652742Sksewell@umich.edu 662742Sksewell@umich.edu virtual void recvStatusChange(Status status); 672742Sksewell@umich.edu 682742Sksewell@umich.edu virtual void getDeviceAddressRanges(AddrRangeList &resp, 696207Sksewell@umich.edu bool &snoop); 706207Sksewell@umich.edu 712742Sksewell@umich.edu virtual int deviceBlockSize(); 722742Sksewell@umich.edu }; 732742Sksewell@umich.edu 7412616Sgabeblack@google.com int numPorts; 7512616Sgabeblack@google.com 762742Sksewell@umich.edu 772022SN/A private: 782022SN/A // prevent copying of a MainMemory object 792124SN/A PhysicalMemory(const PhysicalMemory &specmem); 802022SN/A const PhysicalMemory &operator=(const PhysicalMemory &specmem); 812124SN/A 822124SN/A protected: 832124SN/A 842742Sksewell@umich.edu class LockedAddr { 852239SN/A public: 862124SN/A // on alpha, minimum LL/SC granularity is 16 bytes, so lower 872124SN/A // bits need to masked off. 882742Sksewell@umich.edu static const Addr Addr_Mask = 0xf; 892742Sksewell@umich.edu 902742Sksewell@umich.edu static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 912742Sksewell@umich.edu 922742Sksewell@umich.edu Addr addr; // locked address 932742Sksewell@umich.edu int cpuNum; // locking CPU 942742Sksewell@umich.edu int threadNum; // locking thread ID within CPU 952742Sksewell@umich.edu 964661Sksewell@umich.edu // check for matching execution context 974661Sksewell@umich.edu bool matchesContext(Request *req) 984661Sksewell@umich.edu { 999554Sandreas.hansson@arm.com return (cpuNum == req->getCpuNum() && 10012234Sgabeblack@google.com threadNum == req->getThreadNum()); 1019554Sandreas.hansson@arm.com } 1029554Sandreas.hansson@arm.com 1039554Sandreas.hansson@arm.com LockedAddr(Request *req) 1044661Sksewell@umich.edu : addr(mask(req->getPaddr())), 1054661Sksewell@umich.edu cpuNum(req->getCpuNum()), 1064661Sksewell@umich.edu threadNum(req->getThreadNum()) 1074661Sksewell@umich.edu { 10812234Sgabeblack@google.com } 1094661Sksewell@umich.edu }; 1104661Sksewell@umich.edu 1115222Sksewell@umich.edu std::list<LockedAddr> lockedAddrList; 1124661Sksewell@umich.edu 1134661Sksewell@umich.edu // helper function for checkLockedAddrs(): we really want to 1145222Sksewell@umich.edu // inline a quick check for an empty locked addr list (hopefully 1154661Sksewell@umich.edu // the common case), and do the full list search (if necessary) in 1164661Sksewell@umich.edu // this out-of-line function 1175222Sksewell@umich.edu bool checkLockedAddrList(Request *req); 1184661Sksewell@umich.edu 1194661Sksewell@umich.edu // Record the address of a load-locked operation so that we can 1205222Sksewell@umich.edu // clear the execution context's lock flag if a matching store is 1214661Sksewell@umich.edu // performed 1224661Sksewell@umich.edu void trackLoadLocked(Request *req); 1234661Sksewell@umich.edu 1244661Sksewell@umich.edu // Compare a store address with any locked addresses so we can 1254661Sksewell@umich.edu // clear the lock flag appropriately. Return value set to 'false' 1264661Sksewell@umich.edu // if store operation should be suppressed (because it was a 1274661Sksewell@umich.edu // conditional store and the address was no longer locked by the 1284661Sksewell@umich.edu // requesting execution context), 'true' otherwise. Note that 1294661Sksewell@umich.edu // this method must be called on *all* stores since even 1304661Sksewell@umich.edu // non-conditional stores must clear any matching lock addresses. 1314661Sksewell@umich.edu bool writeOK(Request *req) { 1322022SN/A if (lockedAddrList.empty()) { 1332022SN/A // no locked addrs: nothing to check, store_conditional fails 1342124SN/A bool isLocked = req->isLocked(); 1352124SN/A if (isLocked) { 1362124SN/A req->setExtraData(0); 1372124SN/A } 1382124SN/A return !isLocked; // only do write if not an sc 1392124SN/A } else { 1402124SN/A // iterate over list... 1412124SN/A return checkLockedAddrList(req); 1422124SN/A } 1434661Sksewell@umich.edu } 1442124SN/A 14512616Sgabeblack@google.com uint8_t *pmemAddr; 14612616Sgabeblack@google.com int pagePtr; 14712616Sgabeblack@google.com Tick lat; 14812616Sgabeblack@google.com std::vector<MemoryPort*> ports; 1492124SN/A typedef std::vector<MemoryPort*>::iterator PortIterator; 1502022SN/A 1512022SN/A public: 1522124SN/A Addr new_page(); 1536207Sksewell@umich.edu uint64_t size() { return params()->range.size(); } 15410184SCurtis.Dunham@arm.com uint64_t start() { return params()->range.start; } 1556207Sksewell@umich.edu 1562124SN/A public: 1573953Sstever@eecs.umich.edu typedef PhysicalMemoryParams Params; 1582124SN/A PhysicalMemory(const Params *p); 1593953Sstever@eecs.umich.edu virtual ~PhysicalMemory(); 1602124SN/A 1612124SN/A const Params * 16212234Sgabeblack@google.com params() const 1632124SN/A { 1642124SN/A return dynamic_cast<const Params *>(_params); 1652124SN/A } 1662132SN/A 1672124SN/A public: 1685222Sksewell@umich.edu int deviceBlockSize(); 1695222Sksewell@umich.edu void getAddressRanges(AddrRangeList &resp, bool &snoop); 1705222Sksewell@umich.edu virtual Port *getPort(const std::string &if_name, int idx = -1); 1715222Sksewell@umich.edu void virtual init(); 1725222Sksewell@umich.edu unsigned int drain(Event *de); 1735222Sksewell@umich.edu 1745222Sksewell@umich.edu protected: 1752124SN/A void doFunctionalAccess(PacketPtr pkt); 1762124SN/A virtual Tick calculateLatency(PacketPtr pkt); 1772124SN/A void recvStatusChange(Port::Status status); 1782124SN/A 1792124SN/A public: 1808442Sgblack@eecs.umich.edu virtual void serialize(std::ostream &os); 1812124SN/A virtual void unserialize(Checkpoint *cp, const std::string §ion); 1822124SN/A 1832124SN/A}; 1842124SN/A 1852124SN/A#endif //__PHYSICAL_MEMORY_HH__ 1862124SN/A