abstract_mem.hh revision 11169
12124SN/A/* 22124SN/A * Copyright (c) 2012 ARM Limited 35268Sksewell@umich.edu * All rights reserved 45268Sksewell@umich.edu * 55268Sksewell@umich.edu * The license below extends only to copyright in the software and shall 65268Sksewell@umich.edu * not be construed as granting a license to any other intellectual 75268Sksewell@umich.edu * property including but not limited to intellectual property relating 85268Sksewell@umich.edu * to a hardware implementation of the functionality of the software 95268Sksewell@umich.edu * licensed hereunder. You may use the software subject to the license 105268Sksewell@umich.edu * terms below provided that you ensure that this notice is replicated 115268Sksewell@umich.edu * unmodified and in its entirety in all distributions of the software, 125268Sksewell@umich.edu * modified or unmodified, in source code or in binary form. 135268Sksewell@umich.edu * 145268Sksewell@umich.edu * Copyright (c) 2001-2005 The Regents of The University of Michigan 155268Sksewell@umich.edu * All rights reserved. 165268Sksewell@umich.edu * 175268Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without 185268Sksewell@umich.edu * modification, are permitted provided that the following conditions are 195268Sksewell@umich.edu * met: redistributions of source code must retain the above copyright 205268Sksewell@umich.edu * notice, this list of conditions and the following disclaimer; 215268Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright 225268Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 235268Sksewell@umich.edu * documentation and/or other materials provided with the distribution; 245268Sksewell@umich.edu * neither the name of the copyright holders nor the names of its 255268Sksewell@umich.edu * contributors may be used to endorse or promote products derived from 265268Sksewell@umich.edu * this software without specific prior written permission. 275268Sksewell@umich.edu * 285268Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 295268Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 305268Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312022SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322649Ssaidi@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332649Ssaidi@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342706Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352649Ssaidi@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362649Ssaidi@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372022SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382124SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392124SN/A * 402124SN/A * Authors: Ron Dreslinski 412124SN/A * Andreas Hansson 422124SN/A */ 432124SN/A 442124SN/A/** 455736Snate@binkert.org * @file 462239SN/A * AbstractMemory declaration 472124SN/A */ 482124SN/A 492124SN/A#ifndef __ABSTRACT_MEMORY_HH__ 502124SN/A#define __ABSTRACT_MEMORY_HH__ 516207Sksewell@umich.edu 522124SN/A#include "mem/mem_object.hh" 532742Sksewell@umich.edu#include "params/AbstractMemory.hh" 542022SN/A#include "sim/stats.hh" 552124SN/A 562022SN/A 5712616Sgabeblack@google.comclass System; 5812616Sgabeblack@google.com 592124SN/A/** 602124SN/A * Locked address class that represents a physical address and a 612742Sksewell@umich.edu * context id. 622742Sksewell@umich.edu */ 632742Sksewell@umich.educlass LockedAddr { 642742Sksewell@umich.edu 652742Sksewell@umich.edu private: 662742Sksewell@umich.edu 672742Sksewell@umich.edu // on alpha, minimum LL/SC granularity is 16 bytes, so lower 682742Sksewell@umich.edu // bits need to masked off. 696207Sksewell@umich.edu static const Addr Addr_Mask = 0xf; 706207Sksewell@umich.edu 712742Sksewell@umich.edu public: 722742Sksewell@umich.edu 732742Sksewell@umich.edu // locked address 7412616Sgabeblack@google.com Addr addr; 7512616Sgabeblack@google.com 762742Sksewell@umich.edu // locking hw context 772022SN/A const ContextID contextId; 782022SN/A 792124SN/A static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 802022SN/A 812124SN/A // check for matching execution context 822124SN/A bool matchesContext(Request *req) const 832124SN/A { 842742Sksewell@umich.edu return (contextId == req->contextId()); 852239SN/A } 862124SN/A 872124SN/A LockedAddr(Request *req) : addr(mask(req->getPaddr())), 882742Sksewell@umich.edu contextId(req->contextId()) 892742Sksewell@umich.edu {} 902742Sksewell@umich.edu 912742Sksewell@umich.edu // constructor for unserialization use 922742Sksewell@umich.edu LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid) 932742Sksewell@umich.edu {} 942742Sksewell@umich.edu}; 952742Sksewell@umich.edu 964661Sksewell@umich.edu/** 974661Sksewell@umich.edu * An abstract memory represents a contiguous block of physical 984661Sksewell@umich.edu * memory, with an associated address range, and also provides basic 999554Sandreas.hansson@arm.com * functionality for reading and writing this memory without any 10012234Sgabeblack@google.com * timing information. It is a MemObject since any subclass must have 1019554Sandreas.hansson@arm.com * at least one slave port. 1029554Sandreas.hansson@arm.com */ 1039554Sandreas.hansson@arm.comclass AbstractMemory : public MemObject 1044661Sksewell@umich.edu{ 1054661Sksewell@umich.edu protected: 1064661Sksewell@umich.edu 1074661Sksewell@umich.edu // Address range of this memory 10812234Sgabeblack@google.com AddrRange range; 1094661Sksewell@umich.edu 1104661Sksewell@umich.edu // Pointer to host memory used to implement this memory 1115222Sksewell@umich.edu uint8_t* pmemAddr; 11213233Sgabeblack@google.com 1134661Sksewell@umich.edu // Enable specific memories to be reported to the configuration table 1145222Sksewell@umich.edu bool confTableReported; 11513233Sgabeblack@google.com 1164661Sksewell@umich.edu // Should the memory appear in the global address map 1175222Sksewell@umich.edu bool inAddrMap; 11813233Sgabeblack@google.com 1194661Sksewell@umich.edu std::list<LockedAddr> lockedAddrList; 1205222Sksewell@umich.edu 12113233Sgabeblack@google.com // helper function for checkLockedAddrs(): we really want to 1224661Sksewell@umich.edu // inline a quick check for an empty locked addr list (hopefully 1234661Sksewell@umich.edu // the common case), and do the full list search (if necessary) in 12413449Sgabeblack@google.com // this out-of-line function 1254661Sksewell@umich.edu bool checkLockedAddrList(PacketPtr pkt); 1264661Sksewell@umich.edu 1274661Sksewell@umich.edu // Record the address of a load-locked operation so that we can 1284661Sksewell@umich.edu // clear the execution context's lock flag if a matching store is 1294661Sksewell@umich.edu // performed 1302022SN/A void trackLoadLocked(PacketPtr pkt); 1312022SN/A 1322124SN/A // Compare a store address with any locked addresses so we can 1332124SN/A // clear the lock flag appropriately. Return value set to 'false' 1342124SN/A // if store operation should be suppressed (because it was a 1352124SN/A // conditional store and the address was no longer locked by the 1362124SN/A // requesting execution context), 'true' otherwise. Note that 1372124SN/A // this method must be called on *all* stores since even 1382124SN/A // non-conditional stores must clear any matching lock addresses. 1392124SN/A bool writeOK(PacketPtr pkt) { 1402124SN/A Request *req = pkt->req; 1414661Sksewell@umich.edu if (lockedAddrList.empty()) { 1422124SN/A // no locked addrs: nothing to check, store_conditional fails 14312616Sgabeblack@google.com bool isLLSC = pkt->isLLSC(); 14412616Sgabeblack@google.com if (isLLSC) { 14512616Sgabeblack@google.com req->setExtraData(0); 14612616Sgabeblack@google.com } 1472124SN/A return !isLLSC; // only do write if not an sc 1482022SN/A } else { 1492022SN/A // iterate over list... 1502124SN/A return checkLockedAddrList(pkt); 1516207Sksewell@umich.edu } 15210184SCurtis.Dunham@arm.com } 1536207Sksewell@umich.edu 1542124SN/A /** Number of total bytes read from this memory */ 1553953Sstever@eecs.umich.edu Stats::Vector bytesRead; 1562124SN/A /** Number of instruction bytes read from this memory */ 1573953Sstever@eecs.umich.edu Stats::Vector bytesInstRead; 1582124SN/A /** Number of bytes written to this memory */ 1592124SN/A Stats::Vector bytesWritten; 16012234Sgabeblack@google.com /** Number of read requests */ 1612124SN/A Stats::Vector numReads; 1622124SN/A /** Number of write requests */ 1632124SN/A Stats::Vector numWrites; 1642132SN/A /** Number of other requests */ 1652124SN/A Stats::Vector numOther; 1665222Sksewell@umich.edu /** Read bandwidth from this memory */ 1675222Sksewell@umich.edu Stats::Formula bwRead; 1685222Sksewell@umich.edu /** Read bandwidth from this memory */ 1695222Sksewell@umich.edu Stats::Formula bwInstRead; 1705222Sksewell@umich.edu /** Write bandwidth from this memory */ 1715222Sksewell@umich.edu Stats::Formula bwWrite; 1725222Sksewell@umich.edu /** Total bandwidth from this memory */ 1732124SN/A Stats::Formula bwTotal; 1742124SN/A 1752124SN/A /** Pointor to the System object. 1762124SN/A * This is used for getting the number of masters in the system which is 1772124SN/A * needed when registering stats 1788442Sgblack@eecs.umich.edu */ 1792124SN/A System *_system; 1802124SN/A 1812124SN/A 1822124SN/A private: 1832124SN/A 1842124SN/A // Prevent copying 1852124SN/A AbstractMemory(const AbstractMemory&); 1862124SN/A 1872124SN/A // Prevent assignment 1882124SN/A AbstractMemory& operator=(const AbstractMemory&); 1892124SN/A 1902124SN/A public: 1912124SN/A 19212234Sgabeblack@google.com typedef AbstractMemoryParams Params; 1932124SN/A 1942124SN/A AbstractMemory(const Params* p); 1952239SN/A virtual ~AbstractMemory() {} 1962132SN/A 1972239SN/A /** 1985222Sksewell@umich.edu * Initialise this memory. 1995222Sksewell@umich.edu */ 2005222Sksewell@umich.edu void init() override; 2015222Sksewell@umich.edu 2025222Sksewell@umich.edu /** 2035222Sksewell@umich.edu * See if this is a null memory that should never store data and 2045222Sksewell@umich.edu * always return zero. 2052239SN/A * 2062239SN/A * @return true if null 2072239SN/A */ 2082239SN/A bool isNull() const { return params()->null; } 2092239SN/A 21011303Ssteve.reinhardt@amd.com /** 2112239SN/A * Set the host memory backing store to be used by this memory 2122239SN/A * controller. 2132124SN/A * 2142124SN/A * @param pmem_addr Pointer to a segment of host memory 2152124SN/A */ 2162124SN/A void setBackingStore(uint8_t* pmem_addr); 2172124SN/A 21812234Sgabeblack@google.com /** 2192124SN/A * Get the list of locked addresses to allow checkpointing. 2202124SN/A */ 2212132SN/A const std::list<LockedAddr>& getLockedAddrList() const 2222239SN/A { return lockedAddrList; } 2235222Sksewell@umich.edu 2245222Sksewell@umich.edu /** 2255222Sksewell@umich.edu * Add a locked address to allow for checkpointing. 2265222Sksewell@umich.edu */ 2275222Sksewell@umich.edu void addLockedAddr(LockedAddr addr) { lockedAddrList.push_back(addr); } 2285222Sksewell@umich.edu 2295222Sksewell@umich.edu /** read the system pointer 2302506SN/A * Implemented for completeness with the setter 2314661Sksewell@umich.edu * @return pointer to the system object */ 2322239SN/A System* system() const { return _system; } 2338442Sgblack@eecs.umich.edu 2342239SN/A /** Set the system pointer on this memory 2352239SN/A * This can't be done via a python parameter because the system needs 2362239SN/A * pointers to all the memories and the reverse would create a cycle in the 2372239SN/A * object graph. An init() this is set. 2382239SN/A * @param sys system pointer to set 2392239SN/A */ 2402239SN/A void system(System *sys) { _system = sys; } 2412239SN/A 2422239SN/A const Params * 2432124SN/A params() const 2442124SN/A { 2452124SN/A return dynamic_cast<const Params *>(_params); 2462124SN/A } 2472124SN/A 24812234Sgabeblack@google.com /** 2492124SN/A * Get the address range 2502124SN/A * 2512124SN/A * @return a single contigous address range 2522132SN/A */ 2534056Sstever@eecs.umich.edu AddrRange getAddrRange() const; 2544056Sstever@eecs.umich.edu 2554056Sstever@eecs.umich.edu /** 2564056Sstever@eecs.umich.edu * Get the memory size. 2574056Sstever@eecs.umich.edu * 2584056Sstever@eecs.umich.edu * @return the size of the memory 2594056Sstever@eecs.umich.edu */ 2604056Sstever@eecs.umich.edu uint64_t size() const { return range.size(); } 2614056Sstever@eecs.umich.edu 2624056Sstever@eecs.umich.edu /** 2634056Sstever@eecs.umich.edu * Get the start address. 2648442Sgblack@eecs.umich.edu * 2658442Sgblack@eecs.umich.edu * @return the start address of the memory 2664056Sstever@eecs.umich.edu */ 2674056Sstever@eecs.umich.edu Addr start() const { return range.start(); } 2684056Sstever@eecs.umich.edu 2694056Sstever@eecs.umich.edu /** 2704056Sstever@eecs.umich.edu * Should this memory be passed to the kernel and part of the OS 2714056Sstever@eecs.umich.edu * physical memory layout. 2724056Sstever@eecs.umich.edu * 2734056Sstever@eecs.umich.edu * @return if this memory is reported 2744056Sstever@eecs.umich.edu */ 2754056Sstever@eecs.umich.edu bool isConfReported() const { return confTableReported; } 2764056Sstever@eecs.umich.edu 2774056Sstever@eecs.umich.edu /** 2784056Sstever@eecs.umich.edu * Some memories are used as shadow memories or should for other 2794056Sstever@eecs.umich.edu * reasons not be part of the global address map. 2805222Sksewell@umich.edu * 2815222Sksewell@umich.edu * @return if this memory is part of the address map 28212234Sgabeblack@google.com */ 2835222Sksewell@umich.edu bool isInAddrMap() const { return inAddrMap; } 2845222Sksewell@umich.edu 2855222Sksewell@umich.edu /** 2865222Sksewell@umich.edu * Perform an untimed memory access and update all the state 2875222Sksewell@umich.edu * (e.g. locked addresses) and statistics accordingly. The packet 2885222Sksewell@umich.edu * is turned into a response if required. 2895222Sksewell@umich.edu * 2905222Sksewell@umich.edu * @param pkt Packet performing the access 2915222Sksewell@umich.edu */ 2925222Sksewell@umich.edu void access(PacketPtr pkt); 2935222Sksewell@umich.edu 2945222Sksewell@umich.edu /** 2955222Sksewell@umich.edu * Perform an untimed memory read or write without changing 2965222Sksewell@umich.edu * anything but the memory itself. No stats are affected by this 2975222Sksewell@umich.edu * access. In addition to normal accesses this also facilitates 2985222Sksewell@umich.edu * print requests. 2995222Sksewell@umich.edu * 3008442Sgblack@eecs.umich.edu * @param pkt Packet performing the access 3018442Sgblack@eecs.umich.edu */ 3025222Sksewell@umich.edu void functionalAccess(PacketPtr pkt); 3035222Sksewell@umich.edu 3045222Sksewell@umich.edu /** 3055222Sksewell@umich.edu * Register Statistics 3065222Sksewell@umich.edu */ 3075222Sksewell@umich.edu void regStats() override; 3085222Sksewell@umich.edu 3095222Sksewell@umich.edu}; 3105222Sksewell@umich.edu 3115222Sksewell@umich.edu#endif //__ABSTRACT_MEMORY_HH__ 3125222Sksewell@umich.edu