abstract_mem.hh revision 10466
12391SN/A/* 28931Sandreas.hansson@arm.com * Copyright (c) 2012 ARM Limited 38931Sandreas.hansson@arm.com * All rights reserved 48931Sandreas.hansson@arm.com * 58931Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall 68931Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual 78931Sandreas.hansson@arm.com * property including but not limited to intellectual property relating 88931Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software 98931Sandreas.hansson@arm.com * licensed hereunder. You may use the software subject to the license 108931Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated 118931Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software, 128931Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form. 138931Sandreas.hansson@arm.com * 142391SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 152391SN/A * All rights reserved. 162391SN/A * 172391SN/A * Redistribution and use in source and binary forms, with or without 182391SN/A * modification, are permitted provided that the following conditions are 192391SN/A * met: redistributions of source code must retain the above copyright 202391SN/A * notice, this list of conditions and the following disclaimer; 212391SN/A * redistributions in binary form must reproduce the above copyright 222391SN/A * notice, this list of conditions and the following disclaimer in the 232391SN/A * documentation and/or other materials provided with the distribution; 242391SN/A * neither the name of the copyright holders nor the names of its 252391SN/A * contributors may be used to endorse or promote products derived from 262391SN/A * this software without specific prior written permission. 272391SN/A * 282391SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292391SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302391SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312391SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322391SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332391SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342391SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352391SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362391SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372391SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382391SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392665SN/A * 402665SN/A * Authors: Ron Dreslinski 418931Sandreas.hansson@arm.com * Andreas Hansson 422391SN/A */ 432391SN/A 448931Sandreas.hansson@arm.com/** 458931Sandreas.hansson@arm.com * @file 468931Sandreas.hansson@arm.com * AbstractMemory declaration 472391SN/A */ 482391SN/A 498931Sandreas.hansson@arm.com#ifndef __ABSTRACT_MEMORY_HH__ 508931Sandreas.hansson@arm.com#define __ABSTRACT_MEMORY_HH__ 512391SN/A 522462SN/A#include "mem/mem_object.hh" 538931Sandreas.hansson@arm.com#include "params/AbstractMemory.hh" 548719SN/A#include "sim/stats.hh" 552462SN/A 569053Sdam.sunwoo@arm.com 579053Sdam.sunwoo@arm.comclass System; 589053Sdam.sunwoo@arm.com 598931Sandreas.hansson@arm.com/** 609293Sandreas.hansson@arm.com * Locked address class that represents a physical address and a 619293Sandreas.hansson@arm.com * context id. 629293Sandreas.hansson@arm.com */ 639293Sandreas.hansson@arm.comclass LockedAddr { 649293Sandreas.hansson@arm.com 659293Sandreas.hansson@arm.com private: 669293Sandreas.hansson@arm.com 679293Sandreas.hansson@arm.com // on alpha, minimum LL/SC granularity is 16 bytes, so lower 689293Sandreas.hansson@arm.com // bits need to masked off. 699293Sandreas.hansson@arm.com static const Addr Addr_Mask = 0xf; 709293Sandreas.hansson@arm.com 719293Sandreas.hansson@arm.com public: 729293Sandreas.hansson@arm.com 739293Sandreas.hansson@arm.com // locked address 749293Sandreas.hansson@arm.com Addr addr; 759293Sandreas.hansson@arm.com 769293Sandreas.hansson@arm.com // locking hw context 779293Sandreas.hansson@arm.com const int contextId; 789293Sandreas.hansson@arm.com 799293Sandreas.hansson@arm.com static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 809293Sandreas.hansson@arm.com 819293Sandreas.hansson@arm.com // check for matching execution context 829293Sandreas.hansson@arm.com bool matchesContext(Request *req) const 839293Sandreas.hansson@arm.com { 849293Sandreas.hansson@arm.com return (contextId == req->contextId()); 859293Sandreas.hansson@arm.com } 869293Sandreas.hansson@arm.com 879293Sandreas.hansson@arm.com LockedAddr(Request *req) : addr(mask(req->getPaddr())), 889293Sandreas.hansson@arm.com contextId(req->contextId()) 899293Sandreas.hansson@arm.com {} 909293Sandreas.hansson@arm.com 919293Sandreas.hansson@arm.com // constructor for unserialization use 929293Sandreas.hansson@arm.com LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid) 939293Sandreas.hansson@arm.com {} 949293Sandreas.hansson@arm.com}; 959293Sandreas.hansson@arm.com 969293Sandreas.hansson@arm.com/** 978931Sandreas.hansson@arm.com * An abstract memory represents a contiguous block of physical 988931Sandreas.hansson@arm.com * memory, with an associated address range, and also provides basic 998931Sandreas.hansson@arm.com * functionality for reading and writing this memory without any 1008931Sandreas.hansson@arm.com * timing information. It is a MemObject since any subclass must have 1018931Sandreas.hansson@arm.com * at least one slave port. 1028931Sandreas.hansson@arm.com */ 1038931Sandreas.hansson@arm.comclass AbstractMemory : public MemObject 1042391SN/A{ 1056107SN/A protected: 1066107SN/A 1078931Sandreas.hansson@arm.com // Address range of this memory 1089235Sandreas.hansson@arm.com AddrRange range; 1092413SN/A 1108931Sandreas.hansson@arm.com // Pointer to host memory used to implement this memory 1118931Sandreas.hansson@arm.com uint8_t* pmemAddr; 1122413SN/A 1138931Sandreas.hansson@arm.com // Enable specific memories to be reported to the configuration table 1148931Sandreas.hansson@arm.com bool confTableReported; 1152413SN/A 1168931Sandreas.hansson@arm.com // Should the memory appear in the global address map 1178931Sandreas.hansson@arm.com bool inAddrMap; 1183170SN/A 1193170SN/A std::list<LockedAddr> lockedAddrList; 1203170SN/A 1213170SN/A // helper function for checkLockedAddrs(): we really want to 1223170SN/A // inline a quick check for an empty locked addr list (hopefully 1233170SN/A // the common case), and do the full list search (if necessary) in 1243170SN/A // this out-of-line function 1254626SN/A bool checkLockedAddrList(PacketPtr pkt); 1263170SN/A 1273170SN/A // Record the address of a load-locked operation so that we can 1283170SN/A // clear the execution context's lock flag if a matching store is 1293170SN/A // performed 1304626SN/A void trackLoadLocked(PacketPtr pkt); 1313170SN/A 1323170SN/A // Compare a store address with any locked addresses so we can 1333170SN/A // clear the lock flag appropriately. Return value set to 'false' 1343170SN/A // if store operation should be suppressed (because it was a 1353170SN/A // conditional store and the address was no longer locked by the 1363170SN/A // requesting execution context), 'true' otherwise. Note that 1373170SN/A // this method must be called on *all* stores since even 1383170SN/A // non-conditional stores must clear any matching lock addresses. 1394626SN/A bool writeOK(PacketPtr pkt) { 1404626SN/A Request *req = pkt->req; 1413170SN/A if (lockedAddrList.empty()) { 1423170SN/A // no locked addrs: nothing to check, store_conditional fails 1436102SN/A bool isLLSC = pkt->isLLSC(); 1446102SN/A if (isLLSC) { 1454040SN/A req->setExtraData(0); 1463170SN/A } 1476102SN/A return !isLLSC; // only do write if not an sc 1483170SN/A } else { 1493170SN/A // iterate over list... 1504626SN/A return checkLockedAddrList(pkt); 1513170SN/A } 1523170SN/A } 1533170SN/A 1548719SN/A /** Number of total bytes read from this memory */ 1559053Sdam.sunwoo@arm.com Stats::Vector bytesRead; 1568719SN/A /** Number of instruction bytes read from this memory */ 1579053Sdam.sunwoo@arm.com Stats::Vector bytesInstRead; 1588719SN/A /** Number of bytes written to this memory */ 1599053Sdam.sunwoo@arm.com Stats::Vector bytesWritten; 1608719SN/A /** Number of read requests */ 1619053Sdam.sunwoo@arm.com Stats::Vector numReads; 1628719SN/A /** Number of write requests */ 1639053Sdam.sunwoo@arm.com Stats::Vector numWrites; 1648719SN/A /** Number of other requests */ 1659053Sdam.sunwoo@arm.com Stats::Vector numOther; 1668719SN/A /** Read bandwidth from this memory */ 1678719SN/A Stats::Formula bwRead; 1688719SN/A /** Read bandwidth from this memory */ 1698719SN/A Stats::Formula bwInstRead; 1708719SN/A /** Write bandwidth from this memory */ 1718719SN/A Stats::Formula bwWrite; 1728719SN/A /** Total bandwidth from this memory */ 1738719SN/A Stats::Formula bwTotal; 1748719SN/A 1759053Sdam.sunwoo@arm.com /** Pointor to the System object. 1769053Sdam.sunwoo@arm.com * This is used for getting the number of masters in the system which is 1779053Sdam.sunwoo@arm.com * needed when registering stats 1789053Sdam.sunwoo@arm.com */ 1799053Sdam.sunwoo@arm.com System *_system; 1809053Sdam.sunwoo@arm.com 1819053Sdam.sunwoo@arm.com 1828931Sandreas.hansson@arm.com private: 1838931Sandreas.hansson@arm.com 1848931Sandreas.hansson@arm.com // Prevent copying 1858931Sandreas.hansson@arm.com AbstractMemory(const AbstractMemory&); 1868931Sandreas.hansson@arm.com 1878931Sandreas.hansson@arm.com // Prevent assignment 1888931Sandreas.hansson@arm.com AbstractMemory& operator=(const AbstractMemory&); 1892391SN/A 1902391SN/A public: 1918931Sandreas.hansson@arm.com 1928931Sandreas.hansson@arm.com typedef AbstractMemoryParams Params; 1938931Sandreas.hansson@arm.com 1948931Sandreas.hansson@arm.com AbstractMemory(const Params* p); 1959293Sandreas.hansson@arm.com virtual ~AbstractMemory() {} 1969293Sandreas.hansson@arm.com 1979293Sandreas.hansson@arm.com /** 19810466Sandreas.hansson@arm.com * Initialise this memory. 19910466Sandreas.hansson@arm.com */ 20010466Sandreas.hansson@arm.com void init(); 20110466Sandreas.hansson@arm.com 20210466Sandreas.hansson@arm.com /** 2039293Sandreas.hansson@arm.com * See if this is a null memory that should never store data and 2049293Sandreas.hansson@arm.com * always return zero. 2059293Sandreas.hansson@arm.com * 2069293Sandreas.hansson@arm.com * @return true if null 2079293Sandreas.hansson@arm.com */ 2089293Sandreas.hansson@arm.com bool isNull() const { return params()->null; } 2099293Sandreas.hansson@arm.com 2109293Sandreas.hansson@arm.com /** 2119293Sandreas.hansson@arm.com * Set the host memory backing store to be used by this memory 2129293Sandreas.hansson@arm.com * controller. 2139293Sandreas.hansson@arm.com * 2149293Sandreas.hansson@arm.com * @param pmem_addr Pointer to a segment of host memory 2159293Sandreas.hansson@arm.com */ 2169293Sandreas.hansson@arm.com void setBackingStore(uint8_t* pmem_addr); 2179293Sandreas.hansson@arm.com 2189293Sandreas.hansson@arm.com /** 2199293Sandreas.hansson@arm.com * Get the list of locked addresses to allow checkpointing. 2209293Sandreas.hansson@arm.com */ 2219293Sandreas.hansson@arm.com const std::list<LockedAddr>& getLockedAddrList() const 2229293Sandreas.hansson@arm.com { return lockedAddrList; } 2239293Sandreas.hansson@arm.com 2249293Sandreas.hansson@arm.com /** 2259293Sandreas.hansson@arm.com * Add a locked address to allow for checkpointing. 2269293Sandreas.hansson@arm.com */ 2279293Sandreas.hansson@arm.com void addLockedAddr(LockedAddr addr) { lockedAddrList.push_back(addr); } 2282391SN/A 2299053Sdam.sunwoo@arm.com /** read the system pointer 2309053Sdam.sunwoo@arm.com * Implemented for completeness with the setter 2319053Sdam.sunwoo@arm.com * @return pointer to the system object */ 2329053Sdam.sunwoo@arm.com System* system() const { return _system; } 2339053Sdam.sunwoo@arm.com 2349053Sdam.sunwoo@arm.com /** Set the system pointer on this memory 2359053Sdam.sunwoo@arm.com * This can't be done via a python parameter because the system needs 2369053Sdam.sunwoo@arm.com * pointers to all the memories and the reverse would create a cycle in the 2379053Sdam.sunwoo@arm.com * object graph. An init() this is set. 2389053Sdam.sunwoo@arm.com * @param sys system pointer to set 2399053Sdam.sunwoo@arm.com */ 2409053Sdam.sunwoo@arm.com void system(System *sys) { _system = sys; } 2419053Sdam.sunwoo@arm.com 2424762SN/A const Params * 2434762SN/A params() const 2444762SN/A { 2454762SN/A return dynamic_cast<const Params *>(_params); 2464762SN/A } 2474762SN/A 2488931Sandreas.hansson@arm.com /** 2498931Sandreas.hansson@arm.com * Get the address range 2508931Sandreas.hansson@arm.com * 2518931Sandreas.hansson@arm.com * @return a single contigous address range 2528931Sandreas.hansson@arm.com */ 2539235Sandreas.hansson@arm.com AddrRange getAddrRange() const; 2542391SN/A 2558931Sandreas.hansson@arm.com /** 2568931Sandreas.hansson@arm.com * Get the memory size. 2578931Sandreas.hansson@arm.com * 2588931Sandreas.hansson@arm.com * @return the size of the memory 2598931Sandreas.hansson@arm.com */ 2609098Sandreas.hansson@arm.com uint64_t size() const { return range.size(); } 2618923SN/A 2628931Sandreas.hansson@arm.com /** 2638931Sandreas.hansson@arm.com * Get the start address. 2648931Sandreas.hansson@arm.com * 2658931Sandreas.hansson@arm.com * @return the start address of the memory 2668931Sandreas.hansson@arm.com */ 2679405Sandreas.hansson@arm.com Addr start() const { return range.start(); } 2688923SN/A 2698931Sandreas.hansson@arm.com /** 2708931Sandreas.hansson@arm.com * Should this memory be passed to the kernel and part of the OS 2718931Sandreas.hansson@arm.com * physical memory layout. 2728931Sandreas.hansson@arm.com * 2738931Sandreas.hansson@arm.com * @return if this memory is reported 2748931Sandreas.hansson@arm.com */ 2758931Sandreas.hansson@arm.com bool isConfReported() const { return confTableReported; } 2762391SN/A 2778931Sandreas.hansson@arm.com /** 2788931Sandreas.hansson@arm.com * Some memories are used as shadow memories or should for other 2798931Sandreas.hansson@arm.com * reasons not be part of the global address map. 2808931Sandreas.hansson@arm.com * 2818931Sandreas.hansson@arm.com * @return if this memory is part of the address map 2828931Sandreas.hansson@arm.com */ 2838931Sandreas.hansson@arm.com bool isInAddrMap() const { return inAddrMap; } 2848931Sandreas.hansson@arm.com 2858931Sandreas.hansson@arm.com /** 2868931Sandreas.hansson@arm.com * Perform an untimed memory access and update all the state 2878931Sandreas.hansson@arm.com * (e.g. locked addresses) and statistics accordingly. The packet 2888931Sandreas.hansson@arm.com * is turned into a response if required. 2898931Sandreas.hansson@arm.com * 2908931Sandreas.hansson@arm.com * @param pkt Packet performing the access 2918931Sandreas.hansson@arm.com */ 2928931Sandreas.hansson@arm.com void access(PacketPtr pkt); 2938931Sandreas.hansson@arm.com 2948931Sandreas.hansson@arm.com /** 2958931Sandreas.hansson@arm.com * Perform an untimed memory read or write without changing 2968931Sandreas.hansson@arm.com * anything but the memory itself. No stats are affected by this 2978931Sandreas.hansson@arm.com * access. In addition to normal accesses this also facilitates 2988931Sandreas.hansson@arm.com * print requests. 2998931Sandreas.hansson@arm.com * 3008931Sandreas.hansson@arm.com * @param pkt Packet performing the access 3018931Sandreas.hansson@arm.com */ 3028931Sandreas.hansson@arm.com void functionalAccess(PacketPtr pkt); 3038931Sandreas.hansson@arm.com 3048931Sandreas.hansson@arm.com /** 3058719SN/A * Register Statistics 3068719SN/A */ 3078931Sandreas.hansson@arm.com virtual void regStats(); 3088719SN/A 3092391SN/A}; 3102391SN/A 3118931Sandreas.hansson@arm.com#endif //__ABSTRACT_MEMORY_HH__ 312