XBar.py revision 11334
111308Santhony.gutierrez@amd.com# Copyright (c) 2012, 2015 ARM Limited 211308Santhony.gutierrez@amd.com# All rights reserved. 311308Santhony.gutierrez@amd.com# 411308Santhony.gutierrez@amd.com# The license below extends only to copyright in the software and shall 511308Santhony.gutierrez@amd.com# not be construed as granting a license to any other intellectual 611308Santhony.gutierrez@amd.com# property including but not limited to intellectual property relating 711308Santhony.gutierrez@amd.com# to a hardware implementation of the functionality of the software 811308Santhony.gutierrez@amd.com# licensed hereunder. You may use the software subject to the license 911308Santhony.gutierrez@amd.com# terms below provided that you ensure that this notice is replicated 1011308Santhony.gutierrez@amd.com# unmodified and in its entirety in all distributions of the software, 1111308Santhony.gutierrez@amd.com# modified or unmodified, in source code or in binary form. 1211308Santhony.gutierrez@amd.com# 1311308Santhony.gutierrez@amd.com# Copyright (c) 2005-2008 The Regents of The University of Michigan 1411308Santhony.gutierrez@amd.com# All rights reserved. 1511308Santhony.gutierrez@amd.com# 1611308Santhony.gutierrez@amd.com# Redistribution and use in source and binary forms, with or without 1711308Santhony.gutierrez@amd.com# modification, are permitted provided that the following conditions are 1811308Santhony.gutierrez@amd.com# met: redistributions of source code must retain the above copyright 1911308Santhony.gutierrez@amd.com# notice, this list of conditions and the following disclaimer; 2011308Santhony.gutierrez@amd.com# redistributions in binary form must reproduce the above copyright 2111308Santhony.gutierrez@amd.com# notice, this list of conditions and the following disclaimer in the 2211308Santhony.gutierrez@amd.com# documentation and/or other materials provided with the distribution; 2311308Santhony.gutierrez@amd.com# neither the name of the copyright holders nor the names of its 2411308Santhony.gutierrez@amd.com# contributors may be used to endorse or promote products derived from 2511308Santhony.gutierrez@amd.com# this software without specific prior written permission. 2611308Santhony.gutierrez@amd.com# 2711308Santhony.gutierrez@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2811308Santhony.gutierrez@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2911308Santhony.gutierrez@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3011308Santhony.gutierrez@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3111308Santhony.gutierrez@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3211308Santhony.gutierrez@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3311308Santhony.gutierrez@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3411308Santhony.gutierrez@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3511308Santhony.gutierrez@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3611308Santhony.gutierrez@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3711308Santhony.gutierrez@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3811308Santhony.gutierrez@amd.com# 3911308Santhony.gutierrez@amd.com# Authors: Nathan Binkert 4011308Santhony.gutierrez@amd.com# Andreas Hansson 4111308Santhony.gutierrez@amd.com 4211308Santhony.gutierrez@amd.comfrom MemObject import MemObject 4311308Santhony.gutierrez@amd.comfrom System import System 4411308Santhony.gutierrez@amd.comfrom m5.params import * 4511308Santhony.gutierrez@amd.comfrom m5.proxy import * 4611308Santhony.gutierrez@amd.comfrom m5.SimObject import SimObject 4711308Santhony.gutierrez@amd.com 4811308Santhony.gutierrez@amd.comclass BaseXBar(MemObject): 4911308Santhony.gutierrez@amd.com type = 'BaseXBar' 5011308Santhony.gutierrez@amd.com abstract = True 5111308Santhony.gutierrez@amd.com cxx_header = "mem/xbar.hh" 5211308Santhony.gutierrez@amd.com 5311308Santhony.gutierrez@amd.com slave = VectorSlavePort("Vector port for connecting masters") 5411308Santhony.gutierrez@amd.com master = VectorMasterPort("Vector port for connecting slaves") 5511308Santhony.gutierrez@amd.com 5611308Santhony.gutierrez@amd.com # Latencies governing the time taken for the variuos paths a 5711308Santhony.gutierrez@amd.com # packet has through the crossbar. Note that the crossbar itself 5811308Santhony.gutierrez@amd.com # does not add the latency due to assumptions in the coherency 5911308Santhony.gutierrez@amd.com # mechanism. Instead the latency is annotated on the packet and 6011308Santhony.gutierrez@amd.com # left to the neighbouring modules. 6111308Santhony.gutierrez@amd.com # 6211308Santhony.gutierrez@amd.com # A request incurs the frontend latency, possibly snoop filter 6311308Santhony.gutierrez@amd.com # lookup latency, and forward latency. A response incurs the 6411308Santhony.gutierrez@amd.com # response latency. Frontend latency encompasses arbitration and 6511308Santhony.gutierrez@amd.com # deciding what to do when a request arrives. the forward latency 6611308Santhony.gutierrez@amd.com # is the latency involved once a decision is made to forward the 6711308Santhony.gutierrez@amd.com # request. The response latency, is similar to the forward 6811308Santhony.gutierrez@amd.com # latency, but for responses rather than requests. 6911308Santhony.gutierrez@amd.com frontend_latency = Param.Cycles("Frontend latency") 7011308Santhony.gutierrez@amd.com forward_latency = Param.Cycles("Forward latency") 7111308Santhony.gutierrez@amd.com response_latency = Param.Cycles("Response latency") 7211308Santhony.gutierrez@amd.com 7311308Santhony.gutierrez@amd.com # Width governing the throughput of the crossbar 7411308Santhony.gutierrez@amd.com width = Param.Unsigned("Datapath width per port (bytes)") 7511308Santhony.gutierrez@amd.com 7611308Santhony.gutierrez@amd.com # The default port can be left unconnected, or be used to connect 7711308Santhony.gutierrez@amd.com # a default slave port 7811308Santhony.gutierrez@amd.com default = MasterPort("Port for connecting an optional default slave") 7911308Santhony.gutierrez@amd.com 8011308Santhony.gutierrez@amd.com # The default port can be used unconditionally, or based on 8111308Santhony.gutierrez@amd.com # address range, in which case it may overlap with other 8211308Santhony.gutierrez@amd.com # ports. The default range is always checked first, thus creating 8311308Santhony.gutierrez@amd.com # a two-level hierarchical lookup. This is useful e.g. for the PCI 8411308Santhony.gutierrez@amd.com # xbar configuration. 8511308Santhony.gutierrez@amd.com use_default_range = Param.Bool(False, "Perform address mapping for " \ 8611308Santhony.gutierrez@amd.com "the default port") 8711308Santhony.gutierrez@amd.com 8811308Santhony.gutierrez@amd.comclass NoncoherentXBar(BaseXBar): 8911308Santhony.gutierrez@amd.com type = 'NoncoherentXBar' 9011308Santhony.gutierrez@amd.com cxx_header = "mem/noncoherent_xbar.hh" 9111308Santhony.gutierrez@amd.com 9211308Santhony.gutierrez@amd.comclass CoherentXBar(BaseXBar): 9311308Santhony.gutierrez@amd.com type = 'CoherentXBar' 9411308Santhony.gutierrez@amd.com cxx_header = "mem/coherent_xbar.hh" 9511308Santhony.gutierrez@amd.com 9611308Santhony.gutierrez@amd.com # The coherent crossbar additionally has snoop responses that are 9711308Santhony.gutierrez@amd.com # forwarded after a specific latency. 9811308Santhony.gutierrez@amd.com snoop_response_latency = Param.Cycles("Snoop response latency") 9911308Santhony.gutierrez@amd.com 10011308Santhony.gutierrez@amd.com # An optional snoop filter 10111308Santhony.gutierrez@amd.com snoop_filter = Param.SnoopFilter(NULL, "Selected snoop filter") 10211308Santhony.gutierrez@amd.com 10311308Santhony.gutierrez@amd.com # Determine how this crossbar handles packets where caches have 10411308Santhony.gutierrez@amd.com # already committed to responding, by establishing if the crossbar 10511308Santhony.gutierrez@amd.com # is the point of coherency or not. 10611308Santhony.gutierrez@amd.com point_of_coherency = Param.Bool(False, "Consider this crossbar the " \ 10711308Santhony.gutierrez@amd.com "point of coherency") 10811308Santhony.gutierrez@amd.com 10911308Santhony.gutierrez@amd.com system = Param.System(Parent.any, "System that the crossbar belongs to.") 11011308Santhony.gutierrez@amd.com 11111308Santhony.gutierrez@amd.comclass SnoopFilter(SimObject): 11211308Santhony.gutierrez@amd.com type = 'SnoopFilter' 11311308Santhony.gutierrez@amd.com cxx_header = "mem/snoop_filter.hh" 11411308Santhony.gutierrez@amd.com 11511308Santhony.gutierrez@amd.com # Lookup latency of the snoop filter, added to requests that pass 11611308Santhony.gutierrez@amd.com # through a coherent crossbar. 11711308Santhony.gutierrez@amd.com lookup_latency = Param.Cycles(1, "Lookup latency") 11811308Santhony.gutierrez@amd.com 11911308Santhony.gutierrez@amd.com system = Param.System(Parent.any, "System that the crossbar belongs to.") 12011308Santhony.gutierrez@amd.com 12111308Santhony.gutierrez@amd.com # Sanity check on max capacity to track, adjust if needed. 12211308Santhony.gutierrez@amd.com max_capacity = Param.MemorySize('8MB', "Maximum capacity of snoop filter") 12311308Santhony.gutierrez@amd.com 12411308Santhony.gutierrez@amd.com# We use a coherent crossbar to connect multiple masters to the L2 12511308Santhony.gutierrez@amd.com# caches. Normally this crossbar would be part of the cache itself. 12611308Santhony.gutierrez@amd.comclass L2XBar(CoherentXBar): 12711308Santhony.gutierrez@amd.com # 256-bit crossbar by default 12811308Santhony.gutierrez@amd.com width = 32 12911308Santhony.gutierrez@amd.com 13011308Santhony.gutierrez@amd.com # Assume that most of this is covered by the cache latencies, with 13111308Santhony.gutierrez@amd.com # no more than a single pipeline stage for any packet. 13211308Santhony.gutierrez@amd.com frontend_latency = 1 13311308Santhony.gutierrez@amd.com forward_latency = 0 13411308Santhony.gutierrez@amd.com response_latency = 1 13511308Santhony.gutierrez@amd.com snoop_response_latency = 1 13611308Santhony.gutierrez@amd.com 13711308Santhony.gutierrez@amd.com # Use a snoop-filter by default, and set the latency to zero as 13811308Santhony.gutierrez@amd.com # the lookup is assumed to overlap with the frontend latency of 13911308Santhony.gutierrez@amd.com # the crossbar 14011308Santhony.gutierrez@amd.com snoop_filter = SnoopFilter(lookup_latency = 0) 14111308Santhony.gutierrez@amd.com 14211308Santhony.gutierrez@amd.com# One of the key coherent crossbar instances is the system 14311308Santhony.gutierrez@amd.com# interconnect, tying together the CPU clusters, GPUs, and any I/O 14411308Santhony.gutierrez@amd.com# coherent masters, and DRAM controllers. 14511308Santhony.gutierrez@amd.comclass SystemXBar(CoherentXBar): 14611308Santhony.gutierrez@amd.com # 128-bit crossbar by default 14711308Santhony.gutierrez@amd.com width = 16 14811308Santhony.gutierrez@amd.com 14911308Santhony.gutierrez@amd.com # A handful pipeline stages for each portion of the latency 15011308Santhony.gutierrez@amd.com # contributions. 15111308Santhony.gutierrez@amd.com frontend_latency = 3 152 forward_latency = 4 153 response_latency = 2 154 snoop_response_latency = 4 155 156 # This specialisation of the coherent crossbar is to be considered 157 # the point of coherency, as there are no (coherent) downstream 158 # caches. 159 point_of_coherency = True 160 161# In addition to the system interconnect, we typically also have one 162# or more on-chip I/O crossbars. Note that at some point we might want 163# to also define an off-chip I/O crossbar such as PCIe. 164class IOXBar(NoncoherentXBar): 165 # 128-bit crossbar by default 166 width = 16 167 168 # Assume a simpler datapath than a coherent crossbar, incuring 169 # less pipeline stages for decision making and forwarding of 170 # requests. 171 frontend_latency = 2 172 forward_latency = 1 173 response_latency = 2 174