events.cc revision 11166 
1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2004-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Nathan Binkert
41 *          Ali Saidi
42 */
43
44#include <sstream>
45
46#include "arch/utility.hh"
47#include "base/trace.hh"
48#include "cpu/thread_context.hh"
49#include "debug/DebugPrintf.hh"
50#include "kern/linux/events.hh"
51#include "kern/linux/printk.hh"
52#include "kern/system_events.hh"
53#include "sim/arguments.hh"
54#include "sim/pseudo_inst.hh"
55#include "sim/system.hh"
56
57namespace Linux {
58
59void
60DebugPrintkEvent::process(ThreadContext *tc)
61{
62    if (DTRACE(DebugPrintf)) {
63        std::stringstream ss;
64        Arguments args(tc);
65        Printk(ss, args);
66        StringWrap name(tc->getSystemPtr()->name() + ".dprintk");
67        DPRINTFN("%s", ss.str());
68    }
69    SkipFuncEvent::process(tc);
70}
71
72void
73UDelayEvent::process(ThreadContext *tc)
74{
75    int arg_num  = 0;
76
77    // Get the time in native size
78    uint64_t time = TheISA::getArgument(tc, arg_num,  (uint16_t)-1, false);
79
80    // convert parameter to ns
81    if (argDivToNs)
82        time /= argDivToNs;
83
84    time *= argMultToNs;
85
86    SkipFuncEvent::process(tc);
87
88    // Currently, only ARM full-system simulation uses UDelayEvents to skip
89    // __delay and __loop_delay functions. One form involves setting quiesce
90    // time to 0 with the assumption that quiesce will not happen. To avoid
91    // the quiesce handling in this case, only execute the quiesce if time > 0.
92    if (time > 0) {
93        PseudoInst::quiesceNs(tc, time);
94    }
95}
96
97
98} // namespace linux
99