1/*
2 * Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Authors: Sooraj Puthoor,
34 *          Mark Wyse
35 */
36
37#ifndef __SCHEDULE_STAGE_HH__
38#define __SCHEDULE_STAGE_HH__
39
40#include <utility>
41#include <vector>
42
43#include "gpu-compute/exec_stage.hh"
44#include "gpu-compute/scheduler.hh"
45#include "gpu-compute/scoreboard_check_stage.hh"
46
47// Schedule or execution arbitration stage.
48// From the pool of ready waves in the ready list,
49// one wave is selected for each execution resource.
50// The selection is made based on a scheduling policy
51
52class ComputeUnit;
53class Wavefront;
54
55struct ComputeUnitParams;
56
57class ScheduleStage
58{
59  public:
60    ScheduleStage(const ComputeUnitParams *params);
61    ~ScheduleStage();
62    void init(ComputeUnit *cu);
63    void exec();
64    void arbitrate();
65    // Stats related variables and methods
66    std::string name() { return _name; }
67    void regStats();
68
69  private:
70    ComputeUnit *computeUnit;
71    uint32_t numSIMDs;
72    uint32_t numMemUnits;
73
74    // Each execution resource will have its own
75    // scheduler and a dispatch list
76    std::vector<Scheduler> scheduler;
77
78    // Stores the status of waves. A READY implies the
79    // wave is ready to be scheduled this cycle and
80    // is already present in the readyList
81    std::vector<std::vector<std::pair<Wavefront*, WAVE_STATUS>>*>
82        waveStatusList;
83
84    // List of waves which will be dispatched to
85    // each execution resource. A FILLED implies
86    // dispatch list is non-empty and
87    // execution unit has something to execute
88    // this cycle. Currently, the dispatch list of
89    // an execution resource can hold only one wave because
90    // an execution resource can execute only one wave in a cycle.
91    std::vector<std::pair<Wavefront*, DISPATCH_STATUS>> *dispatchList;
92
93    std::string _name;
94};
95
96#endif // __SCHEDULE_STAGE_HH__
97