global_memory_pipeline.hh revision 11693
11689SN/A/* 29444SAndreas.Sandberg@ARM.com * Copyright (c) 2014-2015 Advanced Micro Devices, Inc. 39920Syasuko.eckert@amd.com * All rights reserved. 47944SGiacomo.Gabrielli@arm.com * 57944SGiacomo.Gabrielli@arm.com * For use for simulation and test purposes only 67944SGiacomo.Gabrielli@arm.com * 77944SGiacomo.Gabrielli@arm.com * Redistribution and use in source and binary forms, with or without 87944SGiacomo.Gabrielli@arm.com * modification, are permitted provided that the following conditions are met: 97944SGiacomo.Gabrielli@arm.com * 107944SGiacomo.Gabrielli@arm.com * 1. Redistributions of source code must retain the above copyright notice, 117944SGiacomo.Gabrielli@arm.com * this list of conditions and the following disclaimer. 127944SGiacomo.Gabrielli@arm.com * 137944SGiacomo.Gabrielli@arm.com * 2. Redistributions in binary form must reproduce the above copyright notice, 147944SGiacomo.Gabrielli@arm.com * this list of conditions and the following disclaimer in the documentation 152326SN/A * and/or other materials provided with the distribution. 161689SN/A * 171689SN/A * 3. Neither the name of the copyright holder nor the names of its contributors 181689SN/A * may be used to endorse or promote products derived from this software 191689SN/A * without specific prior written permission. 201689SN/A * 211689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 221689SN/A * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 231689SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 241689SN/A * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 251689SN/A * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 261689SN/A * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 271689SN/A * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 281689SN/A * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 291689SN/A * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 301689SN/A * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 311689SN/A * POSSIBILITY OF SUCH DAMAGE. 321689SN/A * 331689SN/A * Author: John Kalamatianos, Sooraj Puthoor 341689SN/A */ 351689SN/A 361689SN/A#ifndef __GLOBAL_MEMORY_PIPELINE_HH__ 371689SN/A#define __GLOBAL_MEMORY_PIPELINE_HH__ 381689SN/A 391689SN/A#include <queue> 402665Ssaidi@eecs.umich.edu#include <string> 412665Ssaidi@eecs.umich.edu 422831Sksewell@umich.edu#include "gpu-compute/misc.hh" 431689SN/A#include "params/ComputeUnit.hh" 441689SN/A#include "sim/stats.hh" 459944Smatt.horsnell@ARM.com 469944Smatt.horsnell@ARM.com/* 479944Smatt.horsnell@ARM.com * @file global_memory_pipeline.hh 482064SN/A * 491060SN/A * The global memory pipeline issues newly created global memory packets 501060SN/A * from the pipeline to DTLB. The exec() method of the memory packet issues 512292SN/A * the packet to the DTLB if there is space available in the return fifo. 521717SN/A * This stage also retires previously issued loads and stores that have 538232Snate@binkert.org * returned from the memory sub-system. 544762Snate@binkert.org */ 556221Snate@binkert.org 564762Snate@binkert.orgclass ComputeUnit; 571060SN/A 588737Skoansin.tan@gmail.comclass GlobalMemPipeline 598737Skoansin.tan@gmail.com{ 608737Skoansin.tan@gmail.com public: 615529Snate@binkert.org GlobalMemPipeline(const ComputeUnitParams *params); 621061SN/A void init(ComputeUnit *cu); 632292SN/A void exec(); 645606Snate@binkert.org 658581Ssteve.reinhardt@amd.com std::queue<GPUDynInstPtr> &getGMReqFIFO() { return gmIssuedRequests; } 668581Ssteve.reinhardt@amd.com std::queue<GPUDynInstPtr> &getGMStRespFIFO() { return gmReturnedStores; } 671060SN/A std::queue<GPUDynInstPtr> &getGMLdRespFIFO() { return gmReturnedLoads; } 682292SN/A 692292SN/A bool 702292SN/A isGMLdRespFIFOWrRdy() const 712292SN/A { 722292SN/A return gmReturnedLoads.size() < gmQueueSize; 732292SN/A } 742326SN/A 752292SN/A bool 762292SN/A isGMStRespFIFOWrRdy() const 772292SN/A { 782292SN/A return gmReturnedStores.size() < gmQueueSize; 792292SN/A } 802292SN/A 815336Shines@cs.fsu.edu bool 822292SN/A isGMReqFIFOWrRdy(uint32_t pendReqs=0) const 834873Sstever@eecs.umich.edu { 842292SN/A return (gmIssuedRequests.size() + pendReqs) < gmQueueSize; 852292SN/A } 862292SN/A 874329Sktlim@umich.edu const std::string &name() const { return _name; } 885529Snate@binkert.org void regStats(); 894329Sktlim@umich.edu 904329Sktlim@umich.edu void 914329Sktlim@umich.edu incLoadVRFBankConflictCycles(int num_cycles) 922292SN/A { 932292SN/A loadVrfBankConflictCycles += num_cycles; 942292SN/A } 952292SN/A 962292SN/A private: 972292SN/A ComputeUnit *computeUnit; 985529Snate@binkert.org std::string _name; 991060SN/A int gmQueueSize; 1009920Syasuko.eckert@amd.com 1019920Syasuko.eckert@amd.com // number of cycles of delaying the update of a VGPR that is the 1029920Syasuko.eckert@amd.com // target of a load instruction (or the load component of an atomic) 1031060SN/A // The delay is due to VRF bank conflicts 1041060SN/A Stats::Scalar loadVrfBankConflictCycles; 1051060SN/A // Counters to track the inflight loads and stores 1062326SN/A // so that we can provide the proper backpressure 1071060SN/A // on the number of inflight memory operations. 1081060SN/A int inflightStores; 1091060SN/A int inflightLoads; 1101060SN/A 1112292SN/A // The size of global memory. 1126221Snate@binkert.org int globalMemSize; 1136221Snate@binkert.org 1146221Snate@binkert.org // Global Memory Request FIFO: all global memory requests 1151060SN/A // are issued to this FIFO from the memory pipelines 1161060SN/A std::queue<GPUDynInstPtr> gmIssuedRequests; 1172307SN/A 1182292SN/A // Globa Store Response FIFO: all responses of global memory 1192980Sgblack@eecs.umich.edu // stores are sent to this FIFO from TCP 1202292SN/A std::queue<GPUDynInstPtr> gmReturnedStores; 1212292SN/A 1222292SN/A // Global Load Response FIFO: all responses of global memory 1232292SN/A // loads are sent to this FIFO from TCP 1242292SN/A std::queue<GPUDynInstPtr> gmReturnedLoads; 1252292SN/A}; 1262292SN/A 1272292SN/A#endif // __GLOBAL_MEMORY_PIPELINE_HH__ 1282292SN/A