cmos.cc revision 10905:a6ca6831e775
1545SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3545SN/A * All rights reserved.
4545SN/A *
5545SN/A * Redistribution and use in source and binary forms, with or without
6545SN/A * modification, are permitted provided that the following conditions are
7545SN/A * met: redistributions of source code must retain the above copyright
8545SN/A * notice, this list of conditions and the following disclaimer;
9545SN/A * redistributions in binary form must reproduce the above copyright
10545SN/A * notice, this list of conditions and the following disclaimer in the
11545SN/A * documentation and/or other materials provided with the distribution;
12545SN/A * neither the name of the copyright holders nor the names of its
13545SN/A * contributors may be used to endorse or promote products derived from
14545SN/A * this software without specific prior written permission.
15545SN/A *
16545SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17545SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18545SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19545SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20545SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21545SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22545SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23545SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24545SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25545SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26545SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Gabe Black
292665Ssaidi@eecs.umich.edu */
30545SN/A
31545SN/A#include "debug/CMOS.hh"
321310SN/A#include "dev/x86/cmos.hh"
331310SN/A#include "dev/x86/intdev.hh"
34545SN/A#include "mem/packet_access.hh"
352542SN/A
363348Sbinkertn@umich.eduvoid
373348Sbinkertn@umich.eduX86ISA::Cmos::X86RTC::handleEvent()
382489SN/A{
39545SN/A    assert(intPin);
403090Sstever@eecs.umich.edu    intPin->raise();
411310SN/A    //XXX This is a hack.
422384SN/A    intPin->lower();
432489SN/A}
442522SN/A
45545SN/ATick
462489SN/AX86ISA::Cmos::read(PacketPtr pkt)
472489SN/A{
482489SN/A    assert(pkt->getSize() == 1);
492489SN/A    switch(pkt->getAddr() - pioAddr)
502489SN/A    {
513090Sstever@eecs.umich.edu      case 0x0:
523090Sstever@eecs.umich.edu        pkt->set(address);
532914Ssaidi@eecs.umich.edu        break;
54545SN/A      case 0x1:
55545SN/A        pkt->set(readRegister(address));
562489SN/A        break;
572384SN/A      default:
582384SN/A        panic("Read from undefined CMOS port.\n");
593349Sbinkertn@umich.edu    }
602384SN/A    pkt->makeAtomicResponse();
613090Sstever@eecs.umich.edu    return latency;
623090Sstever@eecs.umich.edu}
632384SN/A
642384SN/ATick
653091Sstever@eecs.umich.eduX86ISA::Cmos::write(PacketPtr pkt)
662901Ssaidi@eecs.umich.edu{
672384SN/A    assert(pkt->getSize() == 1);
682384SN/A    switch(pkt->getAddr() - pioAddr)
692565SN/A    {
702384SN/A      case 0x0:
712384SN/A        address = pkt->get<uint8_t>();
722384SN/A        break;
732784Ssaidi@eecs.umich.edu      case 0x1:
742784Ssaidi@eecs.umich.edu        writeRegister(address, pkt->get<uint8_t>());
752784Ssaidi@eecs.umich.edu        break;
762784Ssaidi@eecs.umich.edu      default:
772784Ssaidi@eecs.umich.edu        panic("Write to undefined CMOS port.\n");
782784Ssaidi@eecs.umich.edu    }
792784Ssaidi@eecs.umich.edu    pkt->makeAtomicResponse();
802784Ssaidi@eecs.umich.edu    return latency;
812784Ssaidi@eecs.umich.edu}
822784Ssaidi@eecs.umich.edu
832784Ssaidi@eecs.umich.eduuint8_t
842784Ssaidi@eecs.umich.eduX86ISA::Cmos::readRegister(uint8_t reg)
852784Ssaidi@eecs.umich.edu{
862784Ssaidi@eecs.umich.edu    assert(reg < numRegs);
872784Ssaidi@eecs.umich.edu    uint8_t val;
882784Ssaidi@eecs.umich.edu    if (reg <= 0xD) {
892784Ssaidi@eecs.umich.edu        val = rtc.readData(reg);
902784Ssaidi@eecs.umich.edu        DPRINTF(CMOS,
912784Ssaidi@eecs.umich.edu            "Reading CMOS RTC reg %x as %x.\n", reg, val);
922784Ssaidi@eecs.umich.edu    } else {
932565SN/A        val = regs[reg];
943349Sbinkertn@umich.edu        DPRINTF(CMOS,
952384SN/A            "Reading non-volitile CMOS address %x as %x.\n", reg, val);
962901Ssaidi@eecs.umich.edu    }
972565SN/A    return val;
982901Ssaidi@eecs.umich.edu}
992565SN/A
1002565SN/Avoid
1012565SN/AX86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val)
1022384SN/A{
1032901Ssaidi@eecs.umich.edu    assert(reg < numRegs);
1042901Ssaidi@eecs.umich.edu    if (reg <= 0xD) {
1052901Ssaidi@eecs.umich.edu        DPRINTF(CMOS, "Writing CMOS RTC reg %x with %x.\n",
1062901Ssaidi@eecs.umich.edu                reg, val);
1072901Ssaidi@eecs.umich.edu        rtc.writeData(reg, val);
1082901Ssaidi@eecs.umich.edu    } else {
1092901Ssaidi@eecs.umich.edu        DPRINTF(CMOS, "Writing non-volitile CMOS address %x with %x.\n",
1104435Ssaidi@eecs.umich.edu                reg, val);
1114435Ssaidi@eecs.umich.edu        regs[reg] = val;
1124435Ssaidi@eecs.umich.edu    }
1134435Ssaidi@eecs.umich.edu}
1144435Ssaidi@eecs.umich.edu
1154435Ssaidi@eecs.umich.eduvoid
1164435Ssaidi@eecs.umich.eduX86ISA::Cmos::startup()
1174435Ssaidi@eecs.umich.edu{
1183349Sbinkertn@umich.edu    rtc.startup();
1193349Sbinkertn@umich.edu}
1203918Ssaidi@eecs.umich.edu
1213349Sbinkertn@umich.eduvoid
1222384SN/AX86ISA::Cmos::serialize(CheckpointOut &cp) const
1232384SN/A{
1242384SN/A    SERIALIZE_SCALAR(address);
1252384SN/A    SERIALIZE_ARRAY(regs, numRegs);
1262384SN/A
1272657Ssaidi@eecs.umich.edu    // Serialize the timer
1282384SN/A    rtc.serialize("rtc", cp);
1293090Sstever@eecs.umich.edu}
1303090Sstever@eecs.umich.edu
1312521SN/Avoid
1322384SN/AX86ISA::Cmos::unserialize(CheckpointIn &cp)
1334435Ssaidi@eecs.umich.edu{
1344435Ssaidi@eecs.umich.edu    UNSERIALIZE_SCALAR(address);
1354435Ssaidi@eecs.umich.edu    UNSERIALIZE_ARRAY(regs, numRegs);
1364435Ssaidi@eecs.umich.edu
1374435Ssaidi@eecs.umich.edu    // Serialize the timer
1382489SN/A    rtc.unserialize("rtc", cp);
1392384SN/A}
1402901Ssaidi@eecs.umich.edu
1412565SN/AX86ISA::Cmos *
1422641Sstever@eecs.umich.eduCmosParams::create()
1432641Sstever@eecs.umich.edu{
1442565SN/A    return new X86ISA::Cmos(this);
1452565SN/A}
1462384SN/A