cmos.cc revision 10631:6d6bfdb036ce
11689SN/A/*
22325SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
31689SN/A * All rights reserved.
41689SN/A *
51689SN/A * Redistribution and use in source and binary forms, with or without
61689SN/A * modification, are permitted provided that the following conditions are
71689SN/A * met: redistributions of source code must retain the above copyright
81689SN/A * notice, this list of conditions and the following disclaimer;
91689SN/A * redistributions in binary form must reproduce the above copyright
101689SN/A * notice, this list of conditions and the following disclaimer in the
111689SN/A * documentation and/or other materials provided with the distribution;
121689SN/A * neither the name of the copyright holders nor the names of its
131689SN/A * contributors may be used to endorse or promote products derived from
141689SN/A * this software without specific prior written permission.
151689SN/A *
161689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
171689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
181689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
191689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
201689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
211689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
221689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
231689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
241689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
251689SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
261689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Gabe Black
292756Sksewell@umich.edu */
301689SN/A
311689SN/A#include "debug/CMOS.hh"
321858SN/A#include "dev/x86/cmos.hh"
332733Sktlim@umich.edu#include "dev/x86/intdev.hh"
341858SN/A#include "mem/packet_access.hh"
354762Snate@binkert.org
364762Snate@binkert.orgvoid
374762Snate@binkert.orgX86ISA::Cmos::X86RTC::handleEvent()
384762Snate@binkert.org{
394762Snate@binkert.org    assert(intPin);
404762Snate@binkert.org    intPin->raise();
414762Snate@binkert.org    //XXX This is a hack.
424762Snate@binkert.org    intPin->lower();
434762Snate@binkert.org}
441858SN/A
452356SN/ATick
461060SN/AX86ISA::Cmos::read(PacketPtr pkt)
471060SN/A{
481060SN/A    assert(pkt->getSize() == 1);
491060SN/A    switch(pkt->getAddr() - pioAddr)
501060SN/A    {
512794Sktlim@umich.edu      case 0x0:
522794Sktlim@umich.edu        pkt->set(address);
532794Sktlim@umich.edu        break;
542794Sktlim@umich.edu      case 0x1:
555529Snate@binkert.org        pkt->set(readRegister(address));
565529Snate@binkert.org        break;
572669Sktlim@umich.edu      default:
581060SN/A        panic("Read from undefined CMOS port.\n");
595529Snate@binkert.org    }
602292SN/A    pkt->makeAtomicResponse();
611060SN/A    return latency;
621060SN/A}
631060SN/A
642292SN/ATick
652733Sktlim@umich.eduX86ISA::Cmos::write(PacketPtr pkt)
662292SN/A{
672292SN/A    assert(pkt->getSize() == 1);
682292SN/A    switch(pkt->getAddr() - pioAddr)
692292SN/A    {
701060SN/A      case 0x0:
711755SN/A        address = pkt->get<uint8_t>();
721060SN/A        break;
731060SN/A      case 0x1:
741060SN/A        writeRegister(address, pkt->get<uint8_t>());
751060SN/A        break;
761060SN/A      default:
771060SN/A        panic("Write to undefined CMOS port.\n");
781755SN/A    }
791060SN/A    pkt->makeAtomicResponse();
801060SN/A    return latency;
811060SN/A}
821060SN/A
831060SN/Auint8_t
841060SN/AX86ISA::Cmos::readRegister(uint8_t reg)
855336Shines@cs.fsu.edu{
861060SN/A    assert(reg < numRegs);
874873Sstever@eecs.umich.edu    uint8_t val;
881060SN/A    if (reg <= 0xD) {
891060SN/A        val = rtc.readData(reg);
901060SN/A        DPRINTF(CMOS,
912829Sksewell@umich.edu            "Reading CMOS RTC reg %x as %x.\n", reg, val);
923221Sktlim@umich.edu    } else {
932829Sksewell@umich.edu        val = regs[reg];
942829Sksewell@umich.edu        DPRINTF(CMOS,
952829Sksewell@umich.edu            "Reading non-volitile CMOS address %x as %x.\n", reg, val);
962829Sksewell@umich.edu    }
972829Sksewell@umich.edu    return val;
982829Sksewell@umich.edu}
992829Sksewell@umich.edu
1002829Sksewell@umich.eduvoid
1012829Sksewell@umich.eduX86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val)
1022829Sksewell@umich.edu{
1032829Sksewell@umich.edu    assert(reg < numRegs);
1042829Sksewell@umich.edu    if (reg <= 0xD) {
1052829Sksewell@umich.edu        DPRINTF(CMOS, "Writing CMOS RTC reg %x with %x.\n",
1062829Sksewell@umich.edu                reg, val);
1072829Sksewell@umich.edu        rtc.writeData(reg, val);
1082829Sksewell@umich.edu    } else {
1092829Sksewell@umich.edu        DPRINTF(CMOS, "Writing non-volitile CMOS address %x with %x.\n",
1102829Sksewell@umich.edu                reg, val);
1112829Sksewell@umich.edu        regs[reg] = val;
1122829Sksewell@umich.edu    }
1132829Sksewell@umich.edu}
1145336Shines@cs.fsu.edu
1152829Sksewell@umich.eduvoid
1164873Sstever@eecs.umich.eduX86ISA::Cmos::startup()
1172829Sksewell@umich.edu{
1182829Sksewell@umich.edu    rtc.startup();
1192829Sksewell@umich.edu}
1202875Sksewell@umich.edu
1213859Sbinkertn@umich.eduvoid
1222875Sksewell@umich.eduX86ISA::Cmos::serialize(std::ostream &os)
1232875Sksewell@umich.edu{
1242875Sksewell@umich.edu    SERIALIZE_SCALAR(address);
1252875Sksewell@umich.edu    SERIALIZE_ARRAY(regs, numRegs);
1262875Sksewell@umich.edu
1272875Sksewell@umich.edu    // Serialize the timer
1283859Sbinkertn@umich.edu    rtc.serialize("rtc", os);
1292875Sksewell@umich.edu}
1302875Sksewell@umich.edu
1312875Sksewell@umich.eduvoid
1323859Sbinkertn@umich.eduX86ISA::Cmos::unserialize(Checkpoint *cp, const std::string &section)
1332875Sksewell@umich.edu{
1342875Sksewell@umich.edu    UNSERIALIZE_SCALAR(address);
1352875Sksewell@umich.edu    UNSERIALIZE_ARRAY(regs, numRegs);
1362875Sksewell@umich.edu
1372875Sksewell@umich.edu    // Serialize the timer
1382875Sksewell@umich.edu    rtc.unserialize("rtc", cp, section);
1392875Sksewell@umich.edu}
1403221Sktlim@umich.edu
1413221Sktlim@umich.eduX86ISA::Cmos *
1422875Sksewell@umich.eduCmosParams::create()
1432875Sksewell@umich.edu{
1442875Sksewell@umich.edu    return new X86ISA::Cmos(this);
1452875Sksewell@umich.edu}
1465336Shines@cs.fsu.edu