Pc.py revision 8839
111723Sar4jc@virginia.edu# Copyright (c) 2008 The Regents of The University of Michigan 211723Sar4jc@virginia.edu# All rights reserved. 311723Sar4jc@virginia.edu# 411723Sar4jc@virginia.edu# Redistribution and use in source and binary forms, with or without 511723Sar4jc@virginia.edu# modification, are permitted provided that the following conditions are 611723Sar4jc@virginia.edu# met: redistributions of source code must retain the above copyright 711723Sar4jc@virginia.edu# notice, this list of conditions and the following disclaimer; 811723Sar4jc@virginia.edu# redistributions in binary form must reproduce the above copyright 911723Sar4jc@virginia.edu# notice, this list of conditions and the following disclaimer in the 1011723Sar4jc@virginia.edu# documentation and/or other materials provided with the distribution; 1111723Sar4jc@virginia.edu# neither the name of the copyright holders nor the names of its 1211723Sar4jc@virginia.edu# contributors may be used to endorse or promote products derived from 1311723Sar4jc@virginia.edu# this software without specific prior written permission. 1411723Sar4jc@virginia.edu# 1511723Sar4jc@virginia.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1611723Sar4jc@virginia.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1711723Sar4jc@virginia.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1811723Sar4jc@virginia.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 1911723Sar4jc@virginia.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2011723Sar4jc@virginia.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2111723Sar4jc@virginia.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2211723Sar4jc@virginia.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2311723Sar4jc@virginia.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2411723Sar4jc@virginia.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2511723Sar4jc@virginia.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2611723Sar4jc@virginia.edu# 2711723Sar4jc@virginia.edu# Authors: Gabe Black 2811723Sar4jc@virginia.edu 2911723Sar4jc@virginia.edufrom m5.params import * 3011723Sar4jc@virginia.edufrom m5.proxy import * 3111723Sar4jc@virginia.edu 3211723Sar4jc@virginia.edufrom Device import IsaFake 3311723Sar4jc@virginia.edufrom Pci import PciConfigAll 3411723Sar4jc@virginia.edufrom Platform import Platform 3511723Sar4jc@virginia.edufrom SouthBridge import SouthBridge 3611964Sar4jc@virginia.edufrom Terminal import Terminal 3711964Sar4jc@virginia.edufrom Uart import Uart8250 3811964Sar4jc@virginia.edu 3912394Sar4jc@virginia.edudef x86IOAddress(port): 4011964Sar4jc@virginia.edu IO_address_space_base = 0x8000000000000000 4111964Sar4jc@virginia.edu return IO_address_space_base + port; 4211723Sar4jc@virginia.edu 4311723Sar4jc@virginia.educlass Pc(Platform): 4412695Sar4jc@virginia.edu type = 'Pc' 4511723Sar4jc@virginia.edu system = Param.System(Parent.any, "system") 4612695Sar4jc@virginia.edu 4711723Sar4jc@virginia.edu pciconfig = PciConfigAll() 4811723Sar4jc@virginia.edu 4912334Sgabeblack@google.com south_bridge = SouthBridge() 5012394Sar4jc@virginia.edu 5111723Sar4jc@virginia.edu # "Non-existant" port used for timing purposes by the linux kernel 5211964Sar4jc@virginia.edu i_dont_exist = IsaFake(pio_addr=x86IOAddress(0x80), pio_size=1) 5311723Sar4jc@virginia.edu 5411964Sar4jc@virginia.edu # Ports behind the pci config and data regsiters. These don't do anything, 5511854Sbrandon.potter@amd.com # but the linux kernel fiddles with them anway. 5611723Sar4jc@virginia.edu behind_pci = IsaFake(pio_addr=x86IOAddress(0xcf8), pio_size=8) 5711723Sar4jc@virginia.edu 5811800Sbrandon.potter@amd.com # Serial port and terminal 5911723Sar4jc@virginia.edu terminal = Terminal() 6011723Sar4jc@virginia.edu com_1 = Uart8250() 6111723Sar4jc@virginia.edu com_1.pio_addr = x86IOAddress(0x3f8) 6211723Sar4jc@virginia.edu com_1.terminal = terminal 6311723Sar4jc@virginia.edu 6412431Sgabeblack@google.com # Devices to catch access to non-existant serial ports. 6512448Sgabeblack@google.com fake_com_2 = IsaFake(pio_addr=x86IOAddress(0x2f8), pio_size=8) 6612448Sgabeblack@google.com fake_com_3 = IsaFake(pio_addr=x86IOAddress(0x3e8), pio_size=8) 6712432Sgabeblack@google.com fake_com_4 = IsaFake(pio_addr=x86IOAddress(0x2e8), pio_size=8) 6811723Sar4jc@virginia.edu 6912441Sgabeblack@google.com # A device to catch accesses to the non-existant floppy controller. 7011970Sar4jc@virginia.edu fake_floppy = IsaFake(pio_addr=x86IOAddress(0x3f2), pio_size=2) 7112393Sar4jc@virginia.edu 7211964Sar4jc@virginia.edu def attachIO(self, bus): 7311964Sar4jc@virginia.edu self.south_bridge.attachIO(bus) 7411964Sar4jc@virginia.edu self.i_dont_exist.pio = bus.master 7511970Sar4jc@virginia.edu self.behind_pci.pio = bus.master 7611905SBrandon.Potter@amd.com self.com_1.pio = bus.master 7711964Sar4jc@virginia.edu self.fake_com_2.pio = bus.master 7811723Sar4jc@virginia.edu self.fake_com_3.pio = bus.master 7911723Sar4jc@virginia.edu self.fake_com_4.pio = bus.master 8011723Sar4jc@virginia.edu self.fake_floppy.pio = bus.master 8111851Sbrandon.potter@amd.com self.pciconfig.pio = bus.default 8211723Sar4jc@virginia.edu bus.use_default_range = True 8311851Sbrandon.potter@amd.com