PciDevice.py revision 5834
1# Copyright (c) 2005-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Nathan Binkert 28 29from m5.SimObject import SimObject 30from m5.params import * 31from m5.proxy import * 32from Device import BasicPioDevice, DmaDevice, PioDevice 33 34class PciConfigAll(PioDevice): 35 type = 'PciConfigAll' 36 pio_latency = Param.Tick(1, "Programmed IO latency in simticks") 37 bus = Param.UInt8(0x00, "PCI bus to act as config space for") 38 size = Param.MemorySize32('16MB', "Size of config space") 39 40 41class PciDevice(DmaDevice): 42 type = 'PciDevice' 43 abstract = True 44 config = Port(Self.pio.peerObj.port, "PCI configuration space port") 45 pci_bus = Param.Int("PCI bus") 46 pci_dev = Param.Int("PCI device number") 47 pci_func = Param.Int("PCI function code") 48 pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks") 49 config_latency = Param.Latency('20ns', "Config read or write latency") 50 51 VendorID = Param.UInt16("Vendor ID") 52 DeviceID = Param.UInt16("Device ID") 53 Command = Param.UInt16(0, "Command") 54 Status = Param.UInt16(0, "Status") 55 Revision = Param.UInt8(0, "Device") 56 ProgIF = Param.UInt8(0, "Programming Interface") 57 SubClassCode = Param.UInt8(0, "Sub-Class Code") 58 ClassCode = Param.UInt8(0, "Class Code") 59 CacheLineSize = Param.UInt8(0, "System Cacheline Size") 60 LatencyTimer = Param.UInt8(0, "PCI Latency Timer") 61 HeaderType = Param.UInt8(0, "PCI Header Type") 62 BIST = Param.UInt8(0, "Built In Self Test") 63 64 BAR0 = Param.UInt32(0x00, "Base Address Register 0") 65 BAR1 = Param.UInt32(0x00, "Base Address Register 1") 66 BAR2 = Param.UInt32(0x00, "Base Address Register 2") 67 BAR3 = Param.UInt32(0x00, "Base Address Register 3") 68 BAR4 = Param.UInt32(0x00, "Base Address Register 4") 69 BAR5 = Param.UInt32(0x00, "Base Address Register 5") 70 BAR0Size = Param.MemorySize32('0B', "Base Address Register 0 Size") 71 BAR1Size = Param.MemorySize32('0B', "Base Address Register 1 Size") 72 BAR2Size = Param.MemorySize32('0B', "Base Address Register 2 Size") 73 BAR3Size = Param.MemorySize32('0B', "Base Address Register 3 Size") 74 BAR4Size = Param.MemorySize32('0B', "Base Address Register 4 Size") 75 BAR5Size = Param.MemorySize32('0B', "Base Address Register 5 Size") 76 BAR0LegacyIO = Param.Bool(False, "Whether BAR0 is hardwired legacy IO") 77 BAR1LegacyIO = Param.Bool(False, "Whether BAR1 is hardwired legacy IO") 78 BAR2LegacyIO = Param.Bool(False, "Whether BAR2 is hardwired legacy IO") 79 BAR3LegacyIO = Param.Bool(False, "Whether BAR3 is hardwired legacy IO") 80 BAR4LegacyIO = Param.Bool(False, "Whether BAR4 is hardwired legacy IO") 81 BAR5LegacyIO = Param.Bool(False, "Whether BAR5 is hardwired legacy IO") 82 83 CardbusCIS = Param.UInt32(0x00, "Cardbus Card Information Structure") 84 SubsystemID = Param.UInt16(0x00, "Subsystem ID") 85 SubsystemVendorID = Param.UInt16(0x00, "Subsystem Vendor ID") 86 ExpansionROM = Param.UInt32(0x00, "Expansion ROM Base Address") 87 InterruptLine = Param.UInt8(0x00, "Interrupt Line") 88 InterruptPin = Param.UInt8(0x00, "Interrupt Pin") 89 MaximumLatency = Param.UInt8(0x00, "Maximum Latency") 90 MinimumGrant = Param.UInt8(0x00, "Minimum Grant") 91 92 93