mc146818.hh revision 10905 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Miguel Serrano
31 */
32
33#ifndef __DEV_MC146818_HH__
34#define __DEV_MC146818_HH__
35
36#include "base/bitunion.hh"
37#include "sim/eventq_impl.hh"
38
39/** Real-Time Clock (MC146818) */
40class MC146818 : public EventManager
41{
42  protected:
43    virtual void handleEvent()
44    {
45        warn("No RTC event handler defined.\n");
46    }
47
48  private:
49    /** Event for RTC periodic interrupt */
50    struct RTCEvent : public Event
51    {
52        MC146818 * parent;
53        Tick interval;
54        Tick offset;
55
56        RTCEvent(MC146818 * _parent, Tick i);
57
58        /** Schedule the RTC periodic interrupt */
59        void scheduleIntr();
60
61        /** Event process to occur at interrupt*/
62        virtual void process();
63
64        /** Event description */
65        virtual const char *description() const;
66    };
67
68    /** Event for RTC periodic interrupt */
69    struct RTCTickEvent : public Event
70    {
71        MC146818 * parent;
72        Tick offset;
73
74        RTCTickEvent(MC146818 * _parent) :
75            parent(_parent), offset(SimClock::Int::s)
76        {}
77
78        /** Event process to occur at interrupt*/
79        void process();
80
81        /** Event description */
82        const char *description() const;
83    };
84
85  private:
86    std::string _name;
87    const std::string &name() const { return _name; }
88
89    /** RTC periodic interrupt event */
90    RTCEvent event;
91
92    /** RTC tick event */
93    RTCTickEvent tickEvent;
94
95    /** Data for real-time clock function */
96    union {
97        uint8_t clock_data[10];
98
99        struct {
100            uint8_t sec;
101            uint8_t sec_alrm;
102            uint8_t min;
103            uint8_t min_alrm;
104            uint8_t hour;
105            uint8_t hour_alrm;
106            uint8_t wday;
107            uint8_t mday;
108            uint8_t mon;
109            uint8_t year;
110        };
111    };
112
113    struct tm curTime;
114
115    void setTime(const struct tm time);
116
117    BitUnion8(RtcRegA)
118        Bitfield<7> uip;    /// 1 = date and time update in progress
119        Bitfield<6, 4> dv;  /// Divider configuration
120        /** Rate selection
121            0 = Disabled
122            For 32768 Hz time bases:
123              Freq = 32768Hz / 2**(n-1) for n >= 3
124              Freq = 256Hz if n = 1
125              Freq = 128Hz if n = 2
126            Othwerise:
127              Freq = 32768Hz / 2**(n-1)
128        */
129        Bitfield<3, 0> rs;
130    EndBitUnion(RtcRegA)
131
132    /// Is the DV field in regA set to disabled?
133    static inline bool rega_dv_disabled(const RtcRegA &reg);
134
135    BitUnion8(RtcRegB)
136        Bitfield<7> set;       /// stop clock updates
137        Bitfield<6> pie;       /// 1 = enable periodic clock interrupt
138        Bitfield<5> aie;       /// 1 = enable alarm interrupt
139        Bitfield<4> uie;       /// 1 = enable update-ended interrupt
140        Bitfield<3> sqwe;      /// 1 = output sqare wave at SQW pin
141        Bitfield<2> dm;        /// 0 = BCD, 1 = Binary coded time
142        Bitfield<1> format24h; /// 0 = 12 hours, 1 = 24 hours
143        Bitfield<0> dse;       /// USA Daylight Savings Time enable
144    EndBitUnion(RtcRegB)
145
146    /** RTC status register A */
147    RtcRegA stat_regA;
148
149    /** RTC status register B */
150    RtcRegB stat_regB;
151
152  public:
153    MC146818(EventManager *em, const std::string &name, const struct tm time,
154            bool bcd, Tick frequency);
155    virtual ~MC146818();
156
157    /** Start ticking */
158    virtual void startup();
159
160    /** RTC write data */
161    void writeData(const uint8_t addr, const uint8_t data);
162
163    /** RTC read data */
164    uint8_t readData(const uint8_t addr);
165
166    void tickClock();
167
168    /**
169      * Serialize this object to the given output stream.
170      * @param base The base name of the counter object.
171      * @param os The stream to serialize to.
172      */
173    void serialize(const std::string &base, CheckpointOut &cp) const;
174
175    /**
176     * Reconstruct the state of this object from a checkpoint.
177     * @param base The base name of the counter object.
178     * @param cp The checkpoint use.
179     * @param section The section name of this object
180     */
181    void unserialize(const std::string &base, CheckpointIn &cp);
182};
183
184#endif // __DEV_MC146818_HH__
185